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authorFugang Duan <B38611@freescale.com>2014-03-18 03:49:30 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:58:01 -0400
commit812723d444b26536da7d385e713dcee6175f64e8 (patch)
tree36b65c17024f39f8dfb9ec5004ed932a644a7c24
parentcb8f594b3c0c21df11292f44d74fb8be16fb0568 (diff)
ENGR00304199 ARM: dtsi: add enet2 support for imx6sx arm2 platforms
Add enet2 support for imx6sx 17x17/19x19 arm2 board. Since imx6sx has two enet interface, and all AR8031 ethernet daughter boards max7322 connect to same i2c bus, and same i2c slave address. Phy address also are the same in default. So need to change max7322 i2c slave address and phy address to others to avoid collision. Ar8031 ethernet daughter board rework: R9: switch to B, remove R22, install R21 with 10k. Signed-off-by: Fugang Duan <B38611@freescale.com>
-rw-r--r--arch/arm/boot/dts/imx6sx-17x17-arm2.dts15
-rw-r--r--arch/arm/boot/dts/imx6sx-19x19-arm2.dts15
2 files changed, 24 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6sx-17x17-arm2.dts b/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
index 8594ff5bdc1a..55491d9814ad 100644
--- a/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-17x17-arm2.dts
@@ -126,7 +126,7 @@
126 phy-mode = "rgmii"; 126 phy-mode = "rgmii";
127 fsl,num_tx_queues=<3>; 127 fsl,num_tx_queues=<3>;
128 fsl,num_rx_queues=<3>; 128 fsl,num_rx_queues=<3>;
129 pinctrl-assert-gpios = <&max7322 0 GPIO_ACTIVE_HIGH>; 129 pinctrl-assert-gpios = <&max7322_1 0 GPIO_ACTIVE_HIGH>;
130 status = "okay"; 130 status = "okay";
131}; 131};
132 132
@@ -136,7 +136,8 @@
136 phy-mode = "rgmii"; 136 phy-mode = "rgmii";
137 fsl,num_tx_queues=<3>; 137 fsl,num_tx_queues=<3>;
138 fsl,num_rx_queues=<3>; 138 fsl,num_rx_queues=<3>;
139 status = "disabled"; 139 pinctrl-assert-gpios = <&max7322_2 0 GPIO_ACTIVE_HIGH>;
140 status = "okay";
140}; 141};
141 142
142&flexcan1 { 143&flexcan1 {
@@ -278,7 +279,7 @@
278 pinctrl-0 = <&pinctrl_i2c2_1>; 279 pinctrl-0 = <&pinctrl_i2c2_1>;
279 status = "okay"; 280 status = "okay";
280 281
281 max7322: gpio@68 { 282 max7322_1: gpio@68 {
282 compatible = "maxim,max7322"; 283 compatible = "maxim,max7322";
283 reg = <0x68>; 284 reg = <0x68>;
284 gpio-controller; 285 gpio-controller;
@@ -286,6 +287,14 @@
286 resets = <&max7322_reset>; 287 resets = <&max7322_reset>;
287 }; 288 };
288 289
290 max7322_2: gpio@69 {
291 compatible = "maxim,max7322";
292 reg = <0x69>;
293 gpio-controller;
294 #gpio-cells = <2>;
295 resets = <&max7322_reset>;
296 };
297
289 codec: sgtl5000@0a { 298 codec: sgtl5000@0a {
290 compatible = "fsl,sgtl5000"; 299 compatible = "fsl,sgtl5000";
291 reg = <0x0a>; 300 reg = <0x0a>;
diff --git a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
index c46250e18409..dea59997b85c 100644
--- a/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-19x19-arm2.dts
@@ -52,7 +52,7 @@
52 phy-mode = "rgmii"; 52 phy-mode = "rgmii";
53 fsl,num_tx_queues=<3>; 53 fsl,num_tx_queues=<3>;
54 fsl,num_rx_queues=<3>; 54 fsl,num_rx_queues=<3>;
55 pinctrl-assert-gpios = <&max7322 0 GPIO_ACTIVE_HIGH>; 55 pinctrl-assert-gpios = <&max7322_1 0 GPIO_ACTIVE_HIGH>;
56 status = "okay"; 56 status = "okay";
57}; 57};
58 58
@@ -62,7 +62,8 @@
62 phy-mode = "rgmii"; 62 phy-mode = "rgmii";
63 fsl,num_tx_queues=<3>; 63 fsl,num_tx_queues=<3>;
64 fsl,num_rx_queues=<3>; 64 fsl,num_rx_queues=<3>;
65 status = "disabled"; 65 pinctrl-assert-gpios = <&max7322_2 0 GPIO_ACTIVE_HIGH>;
66 status = "okay";
66}; 67};
67 68
68&gpc { 69&gpc {
@@ -86,13 +87,21 @@
86 pinctrl-0 = <&pinctrl_i2c2_1>; 87 pinctrl-0 = <&pinctrl_i2c2_1>;
87 status = "okay"; 88 status = "okay";
88 89
89 max7322: gpio@68 { 90 max7322_1: gpio@68 {
90 compatible = "maxim,max7322"; 91 compatible = "maxim,max7322";
91 reg = <0x68>; 92 reg = <0x68>;
92 gpio-controller; 93 gpio-controller;
93 #gpio-cells = <2>; 94 #gpio-cells = <2>;
94 resets = <&max7322_reset>; 95 resets = <&max7322_reset>;
95 }; 96 };
97
98 max7322_2: gpio@69 {
99 compatible = "maxim,max7322";
100 reg = <0x69>;
101 gpio-controller;
102 #gpio-cells = <2>;
103 resets = <&max7322_reset>;
104 };
96}; 105};
97 106
98&i2c3 { 107&i2c3 {