diff options
author | Dong Aisheng <b29396@freescale.com> | 2014-02-20 03:46:19 -0500 |
---|---|---|
committer | Nitin Garg <nitin.garg@freescale.com> | 2014-04-16 09:57:44 -0400 |
commit | 80a72be45341c352bb178c83715ac4f3473893d7 (patch) | |
tree | e151403c4bab7ec92b0e4912f88dbc2ecd5155b4 | |
parent | cbc37eb56b7e7142209c8d99516ebc3e6ac4634e (diff) |
ENGR00300439-2 imx6sx: fix can_sel parent clock
The default parent of can_sel clock is invalid, need manually set it.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
-rw-r--r-- | arch/arm/mach-imx/clk-imx6sx.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index 1f1f62e5dceb..aed8729e5170 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c | |||
@@ -444,6 +444,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) | |||
444 | clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000); | 444 | clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000); |
445 | clk_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000); | 445 | clk_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000); |
446 | 446 | ||
447 | /* default parent of can_sel clock is invalid, manually set it here */ | ||
448 | clk_set_parent(clks[IMX6SX_CLK_CAN_SEL], clks[IMX6SX_CLK_PLL3_60M]); | ||
449 | |||
447 | /* Set initial power mode */ | 450 | /* Set initial power mode */ |
448 | imx6_set_lpm(WAIT_CLOCKED); | 451 | imx6_set_lpm(WAIT_CLOCKED); |
449 | 452 | ||