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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-01-25 03:39:35 -0500
committerShawn Guo <shawn.guo@linaro.org>2013-01-29 02:38:59 -0500
commit7ecc70a98ce387196819a2fa98e97eac07592230 (patch)
tree66de969bc0d19569556ef878ffc151fe02dee5ee
parente0f7d905242f5eedc4801ce588f7f588f4ec57cb (diff)
ARM: dts: cfa10049: Change the SPI3 bus to spi-gpio
The DAC found on the last chip select requires a word length of 12 bits, which is not supported by the SSP controller of the iMX28. Use bitbanging for that bus to support such a length. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r--arch/arm/boot/dts/imx28-cfa10049.dts78
1 files changed, 42 insertions, 36 deletions
diff --git a/arch/arm/boot/dts/imx28-cfa10049.dts b/arch/arm/boot/dts/imx28-cfa10049.dts
index 7890acc4161d..dd91244d139c 100644
--- a/arch/arm/boot/dts/imx28-cfa10049.dts
+++ b/arch/arm/boot/dts/imx28-cfa10049.dts
@@ -52,48 +52,17 @@
52 spi3_pins_cfa10049: spi3-cfa10049@0 { 52 spi3_pins_cfa10049: spi3-cfa10049@0 {
53 reg = <0>; 53 reg = <0>;
54 fsl,pinmux-ids = < 54 fsl,pinmux-ids = <
55 0x0181 /* MX28_PAD_GPMI_RDN__SSP3_SCK */ 55 0x0183 /* MX28_PAD_GPMI_RDN__GPIO_0_24 */
56 0x01c1 /* MX28_PAD_GPMI_RESETN__SSP3_CMD */ 56 0x01c3 /* MX28_PAD_GPMI_RESETN__GPIO_0_28 */
57 0x0111 /* MX28_PAD_GPMI_CE1N__SSP3_D3 */ 57 0x0113 /* MX28_PAD_GPMI_CE1N__GPIO_0_17 */
58 0x01a2 /* MX28_PAD_GPMI_ALE__SSP3_D4 */ 58 0x01a3 /* MX28_PAD_GPMI_ALE__GPIO_0_26 */
59 0x01b2 /* MX28_PAD_GPMI_CLE__SSP3_D5 */ 59 0x01b3 /* MX28_PAD_GPMI_CLE__GPIO_0_27 */
60 >; 60 >;
61 fsl,drive-strength = <1>; 61 fsl,drive-strength = <1>;
62 fsl,voltage = <1>; 62 fsl,voltage = <1>;
63 fsl,pull-up = <1>; 63 fsl,pull-up = <1>;
64 }; 64 };
65 }; 65 };
66
67 ssp3: ssp@80016000 {
68 compatible = "fsl,imx28-spi";
69 pinctrl-names = "default";
70 pinctrl-0 = <&spi3_pins_cfa10049>;
71 status = "okay";
72
73 gpio5: gpio5@0 {
74 compatible = "fairchild,74hc595";
75 gpio-controller;
76 #gpio-cells = <2>;
77 reg = <0>;
78 registers-number = <2>;
79 spi-max-frequency = <100000>;
80 };
81
82 gpio6: gpio6@1 {
83 compatible = "fairchild,74hc595";
84 gpio-controller;
85 #gpio-cells = <2>;
86 reg = <1>;
87 registers-number = <4>;
88 spi-max-frequency = <100000>;
89 };
90
91 dac0: dh2228@2 {
92 compatible = "rohm,dh2228fv";
93 reg = <2>;
94 spi-max-frequency = <100000>;
95 };
96 };
97 }; 66 };
98 67
99 apbx@80040000 { 68 apbx@80040000 {
@@ -177,4 +146,41 @@
177 status = "okay"; 146 status = "okay";
178 }; 147 };
179 }; 148 };
149
150 spi3 {
151 compatible = "spi-gpio";
152 pinctrl-names = "default";
153 pinctrl-0 = <&spi3_pins_cfa10049>;
154 status = "okay";
155 gpio-sck = <&gpio0 24 0>;
156 gpio-mosi = <&gpio0 28 0>;
157 cs-gpios = <&gpio0 17 0 &gpio0 26 0 &gpio0 27 0>;
158 num-chipselects = <3>;
159 #address-cells = <1>;
160 #size-cells = <0>;
161
162 gpio5: gpio5@0 {
163 compatible = "fairchild,74hc595";
164 gpio-controller;
165 #gpio-cells = <2>;
166 reg = <0>;
167 registers-number = <2>;
168 spi-max-frequency = <100000>;
169 };
170
171 gpio6: gpio6@1 {
172 compatible = "fairchild,74hc595";
173 gpio-controller;
174 #gpio-cells = <2>;
175 reg = <1>;
176 registers-number = <4>;
177 spi-max-frequency = <100000>;
178 };
179
180 dac0: dh2228@2 {
181 compatible = "rohm,dh2228fv";
182 reg = <2>;
183 spi-max-frequency = <100000>;
184 };
185 };
180}; 186};