ENGR00288421-1 ASoC: fsl_spdif: Use correct clock for Rx clock rate calculation

According to the Reference Manual, we should use system clock to calculate
rx clock rate instead of spdif own clock. Thus add system clock to spdif
driver and replace the incorrect one in rate calculation.

Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <b42378@freescale.com>

1 files changed, 9 insertions, 1 deletions

diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index bce6d0e18c5e..266f72453e18 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -82,6 +82,7 @@ struct fsl_spdif_priv {
         u8 rxclk_src;
         struct clk *txclk[SPDIF_TXRATE_MAX];
         struct clk *rxclk;
+        struct clk *sysclk;
         struct snd_dmaengine_dai_dma_data dma_params_tx;
         struct snd_dmaengine_dai_dma_data dma_params_rx;
 
@@ -760,7 +761,7 @@ static int spdif_get_rxclk_rate(struct fsl_spdif_priv *spdif_priv,
         clksrc = (phaseconf >> SRPC_CLKSRC_SEL_OFFSET) & 0xf;
         if (srpc_dpll_locked[clksrc] && (phaseconf & SRPC_DPLL_LOCKED)) {
                 /* Get bus clock from system */
-                busclk_freq = clk_get_rate(spdif_priv->rxclk);
+                busclk_freq = clk_get_rate(spdif_priv->sysclk);
         }
 
         /* FreqMeas_CLK = (BUS_CLK * FreqMeas) / 2 ^ 10 / GAINSEL / 128 */
@@ -1144,6 +1145,13 @@ static int fsl_spdif_probe(struct platform_device *pdev)
                 return ret;
         }
 
+        /* Get system clock for rx clock rate calculation */
+        spdif_priv->sysclk = devm_clk_get(&pdev->dev, "rxtx5");
+        if (IS_ERR(spdif_priv->sysclk)) {
+                dev_err(&pdev->dev, "no system clock(rxtx5) in devicetree\n");
+                return PTR_ERR(spdif_priv->sysclk);
+        }
+
         /* Select clock source for rx/tx clock */
         spdif_priv->rxclk = devm_clk_get(&pdev->dev, "rxtx1");
         if (IS_ERR(spdif_priv->rxclk)) {