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authorPeter De Schrijver <pdeschrijver@nvidia.com>2013-02-04 08:40:30 -0500
committerStephen Warren <swarren@nvidia.com>2013-03-11 16:29:43 -0400
commit6f88fb8af6c67f281b8e2cd607f08e0089c8ccbe (patch)
tree8d945e2d594c9334616b612bacbd380a89ed5400
parent1b14f3a57b0a1a9e0ca7091ca9f8c14fe23dfd70 (diff)
clocksource: tegra: move to of_clk_get
The new clockframework introduced DT IDs for each clock. To be able to remove the device registrations, this driver needs to be updated to use the DT IDs. Note that the actual removal of the clk_register_clkdev() calls will be done in a later series. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi2
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi2
-rw-r--r--drivers/clocksource/tegra20_timer.c4
3 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 9a428931d042..37701d8727d8 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -144,6 +144,7 @@
144 0 1 0x04 144 0 1 0x04
145 0 41 0x04 145 0 41 0x04
146 0 42 0x04>; 146 0 42 0x04>;
147 clocks = <&tegra_car 5>;
147 }; 148 };
148 149
149 tegra_car: clock { 150 tegra_car: clock {
@@ -303,6 +304,7 @@
303 compatible = "nvidia,tegra20-rtc"; 304 compatible = "nvidia,tegra20-rtc";
304 reg = <0x7000e000 0x100>; 305 reg = <0x7000e000 0x100>;
305 interrupts = <0 2 0x04>; 306 interrupts = <0 2 0x04>;
307 clocks = <&tegra_car 4>;
306 }; 308 };
307 309
308 i2c@7000c000 { 310 i2c@7000c000 {
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 767803e1fd55..7effa93ea9d9 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -147,6 +147,7 @@
147 0 42 0x04 147 0 42 0x04
148 0 121 0x04 148 0 121 0x04
149 0 122 0x04>; 149 0 122 0x04>;
150 clocks = <&tegra_car 5>;
150 }; 151 };
151 152
152 tegra_car: clock { 153 tegra_car: clock {
@@ -290,6 +291,7 @@
290 compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc"; 291 compatible = "nvidia,tegra30-rtc", "nvidia,tegra20-rtc";
291 reg = <0x7000e000 0x100>; 292 reg = <0x7000e000 0x100>;
292 interrupts = <0 2 0x04>; 293 interrupts = <0 2 0x04>;
294 clocks = <&tegra_car 4>;
293 }; 295 };
294 296
295 i2c@7000c000 { 297 i2c@7000c000 {
diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index 0bde03feb095..bc4b8ad78aea 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -189,7 +189,7 @@ static void __init tegra20_init_timer(void)
189 BUG(); 189 BUG();
190 } 190 }
191 191
192 clk = clk_get_sys("timer", NULL); 192 clk = of_clk_get(np, 0);
193 if (IS_ERR(clk)) { 193 if (IS_ERR(clk)) {
194 pr_warn("Unable to get timer clock. Assuming 12Mhz input clock.\n"); 194 pr_warn("Unable to get timer clock. Assuming 12Mhz input clock.\n");
195 rate = 12000000; 195 rate = 12000000;
@@ -216,7 +216,7 @@ static void __init tegra20_init_timer(void)
216 * rtc registers are used by read_persistent_clock, keep the rtc clock 216 * rtc registers are used by read_persistent_clock, keep the rtc clock
217 * enabled 217 * enabled
218 */ 218 */
219 clk = clk_get_sys("rtc-tegra", NULL); 219 clk = of_clk_get(np, 0);
220 if (IS_ERR(clk)) 220 if (IS_ERR(clk))
221 pr_warn("Unable to get rtc-tegra clock\n"); 221 pr_warn("Unable to get rtc-tegra clock\n");
222 else 222 else