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authorHeiko Stuebner <heiko@sntech.de>2013-01-29 13:25:22 -0500
committerKukjin Kim <kgene.kim@samsung.com>2013-02-03 18:52:49 -0500
commit6b6289171bfdee905608f5d6cbb3eb79b04fdd03 (patch)
treec04007a402c3f17932f7e6b8d1d20447e49c7fa9
parent20f6c781c7d801e142fccbc04ec9c6dc639f5943 (diff)
ARM: S3C24XX: move s3c2443 irq code to irq.c
Prequisite for further optimizations. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat
-rw-r--r--arch/arm/mach-s3c24xx/Makefile2
-rw-r--r--arch/arm/mach-s3c24xx/irq-s3c2443.c281
-rw-r--r--arch/arm/plat-s3c24xx/irq.c243
3 files changed, 244 insertions, 282 deletions
diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile
index 68d134f4efa0..1d67582da41a 100644
--- a/arch/arm/mach-s3c24xx/Makefile
+++ b/arch/arm/mach-s3c24xx/Makefile
@@ -39,7 +39,7 @@ obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o
39obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o 39obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o
40obj-$(CONFIG_S3C2440_PLL_16934400) += pll-s3c2440-16934400.o 40obj-$(CONFIG_S3C2440_PLL_16934400) += pll-s3c2440-16934400.o
41 41
42obj-$(CONFIG_CPU_S3C2443) += s3c2443.o irq-s3c2443.o clock-s3c2443.o 42obj-$(CONFIG_CPU_S3C2443) += s3c2443.o clock-s3c2443.o
43 43
44# PM 44# PM
45 45
diff --git a/arch/arm/mach-s3c24xx/irq-s3c2443.c b/arch/arm/mach-s3c24xx/irq-s3c2443.c
deleted file mode 100644
index 5e69109c0928..000000000000
--- a/arch/arm/mach-s3c24xx/irq-s3c2443.c
+++ /dev/null
@@ -1,281 +0,0 @@
1/* linux/arch/arm/mach-s3c2443/irq.c
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20*/
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/ioport.h>
26#include <linux/device.h>
27#include <linux/io.h>
28
29#include <mach/hardware.h>
30#include <asm/irq.h>
31
32#include <asm/mach/irq.h>
33
34#include <mach/regs-irq.h>
35#include <mach/regs-gpio.h>
36
37#include <plat/cpu.h>
38#include <plat/pm.h>
39#include <plat/irq.h>
40
41#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
42
43static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
44{
45 unsigned int subsrc, submsk;
46 unsigned int end;
47
48 /* read the current pending interrupts, and the mask
49 * for what it is available */
50
51 subsrc = __raw_readl(S3C2410_SUBSRCPND);
52 submsk = __raw_readl(S3C2410_INTSUBMSK);
53
54 subsrc &= ~submsk;
55 subsrc >>= (irq - S3C2410_IRQSUB(0));
56 subsrc &= (1 << len)-1;
57
58 end = len + irq;
59
60 for (; irq < end && subsrc; irq++) {
61 if (subsrc & 1)
62 generic_handle_irq(irq);
63
64 subsrc >>= 1;
65 }
66}
67
68/* WDT/AC97 sub interrupts */
69
70static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
71{
72 s3c2443_irq_demux(IRQ_S3C2443_WDT, 4);
73}
74
75#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
76#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
77
78static void s3c2443_irq_wdtac97_mask(struct irq_data *data)
79{
80 s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
81}
82
83static void s3c2443_irq_wdtac97_unmask(struct irq_data *data)
84{
85 s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
86}
87
88static void s3c2443_irq_wdtac97_ack(struct irq_data *data)
89{
90 s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
91}
92
93static struct irq_chip s3c2443_irq_wdtac97 = {
94 .irq_mask = s3c2443_irq_wdtac97_mask,
95 .irq_unmask = s3c2443_irq_wdtac97_unmask,
96 .irq_ack = s3c2443_irq_wdtac97_ack,
97};
98
99/* LCD sub interrupts */
100
101static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
102{
103 s3c2443_irq_demux(IRQ_S3C2443_LCD1, 4);
104}
105
106#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
107#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
108
109static void s3c2443_irq_lcd_mask(struct irq_data *data)
110{
111 s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
112}
113
114static void s3c2443_irq_lcd_unmask(struct irq_data *data)
115{
116 s3c_irqsub_unmask(data->irq, INTMSK_LCD);
117}
118
119static void s3c2443_irq_lcd_ack(struct irq_data *data)
120{
121 s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
122}
123
124static struct irq_chip s3c2443_irq_lcd = {
125 .irq_mask = s3c2443_irq_lcd_mask,
126 .irq_unmask = s3c2443_irq_lcd_unmask,
127 .irq_ack = s3c2443_irq_lcd_ack,
128};
129
130/* DMA sub interrupts */
131
132static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
133{
134 s3c2443_irq_demux(IRQ_S3C2443_DMA0, 6);
135}
136
137#define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
138#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
139
140static void s3c2443_irq_dma_mask(struct irq_data *data)
141{
142 s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
143}
144
145static void s3c2443_irq_dma_unmask(struct irq_data *data)
146{
147 s3c_irqsub_unmask(data->irq, INTMSK_DMA);
148}
149
150static void s3c2443_irq_dma_ack(struct irq_data *data)
151{
152 s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
153}
154
155static struct irq_chip s3c2443_irq_dma = {
156 .irq_mask = s3c2443_irq_dma_mask,
157 .irq_unmask = s3c2443_irq_dma_unmask,
158 .irq_ack = s3c2443_irq_dma_ack,
159};
160
161/* UART3 sub interrupts */
162
163static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
164{
165 s3c2443_irq_demux(IRQ_S3C2443_RX3, 3);
166}
167
168#define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
169#define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
170
171static void s3c2443_irq_uart3_mask(struct irq_data *data)
172{
173 s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
174}
175
176static void s3c2443_irq_uart3_unmask(struct irq_data *data)
177{
178 s3c_irqsub_unmask(data->irq, INTMSK_UART3);
179}
180
181static void s3c2443_irq_uart3_ack(struct irq_data *data)
182{
183 s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
184}
185
186static struct irq_chip s3c2443_irq_uart3 = {
187 .irq_mask = s3c2443_irq_uart3_mask,
188 .irq_unmask = s3c2443_irq_uart3_unmask,
189 .irq_ack = s3c2443_irq_uart3_ack,
190};
191
192/* CAM sub interrupts */
193
194static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
195{
196 s3c2443_irq_demux(IRQ_S3C2440_CAM_C, 4);
197}
198
199#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
200#define SUBMSK_CAM INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
201
202static void s3c2443_irq_cam_mask(struct irq_data *data)
203{
204 s3c_irqsub_mask(data->irq, INTMSK_CAM, SUBMSK_CAM);
205}
206
207static void s3c2443_irq_cam_unmask(struct irq_data *data)
208{
209 s3c_irqsub_unmask(data->irq, INTMSK_CAM);
210}
211
212static void s3c2443_irq_cam_ack(struct irq_data *data)
213{
214 s3c_irqsub_maskack(data->irq, INTMSK_CAM, SUBMSK_CAM);
215}
216
217static struct irq_chip s3c2443_irq_cam = {
218 .irq_mask = s3c2443_irq_cam_mask,
219 .irq_unmask = s3c2443_irq_cam_unmask,
220 .irq_ack = s3c2443_irq_cam_ack,
221};
222
223/* IRQ initialisation code */
224
225static int s3c2443_add_sub(unsigned int base,
226 void (*demux)(unsigned int,
227 struct irq_desc *),
228 struct irq_chip *chip,
229 unsigned int start, unsigned int end)
230{
231 unsigned int irqno;
232
233 irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
234 irq_set_chained_handler(base, demux);
235
236 for (irqno = start; irqno <= end; irqno++) {
237 irq_set_chip_and_handler(irqno, chip, handle_level_irq);
238 set_irq_flags(irqno, IRQF_VALID);
239 }
240
241 return 0;
242}
243
244static int s3c2443_irq_add(struct device *dev,
245 struct subsys_interface *sif)
246{
247 printk("S3C2443: IRQ Support\n");
248
249 s3c2443_add_sub(IRQ_CAM, s3c2443_irq_demux_cam, &s3c2443_irq_cam,
250 IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P);
251
252 s3c2443_add_sub(IRQ_LCD, s3c2443_irq_demux_lcd, &s3c2443_irq_lcd,
253 IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4);
254
255 s3c2443_add_sub(IRQ_S3C2443_DMA, s3c2443_irq_demux_dma,
256 &s3c2443_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
257
258 s3c2443_add_sub(IRQ_S3C2443_UART3, s3c2443_irq_demux_uart3,
259 &s3c2443_irq_uart3,
260 IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
261
262 s3c2443_add_sub(IRQ_WDT, s3c2443_irq_demux_wdtac97,
263 &s3c2443_irq_wdtac97,
264 IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
265
266 return 0;
267}
268
269static struct subsys_interface s3c2443_irq_interface = {
270 .name = "s3c2443_irq",
271 .subsys = &s3c2443_subsys,
272 .add_dev = s3c2443_irq_add,
273};
274
275static int __init s3c2443_irq_init(void)
276{
277 return subsys_interface_register(&s3c2443_irq_interface);
278}
279
280arch_initcall(s3c2443_irq_init);
281
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c
index 21b2c9d55e77..6f24e23944a5 100644
--- a/arch/arm/plat-s3c24xx/irq.c
+++ b/arch/arm/plat-s3c24xx/irq.c
@@ -730,3 +730,246 @@ void __init s3c2416_init_irq(void)
730} 730}
731 731
732#endif 732#endif
733
734#ifdef CONFIG_CPU_S3C2443
735#define INTMSK(start, end) ((1 << ((end) + 1 - (start))) - 1)
736
737static inline void s3c2443_irq_demux(unsigned int irq, unsigned int len)
738{
739 unsigned int subsrc, submsk;
740 unsigned int end;
741
742 /* read the current pending interrupts, and the mask
743 * for what it is available */
744
745 subsrc = __raw_readl(S3C2410_SUBSRCPND);
746 submsk = __raw_readl(S3C2410_INTSUBMSK);
747
748 subsrc &= ~submsk;
749 subsrc >>= (irq - S3C2410_IRQSUB(0));
750 subsrc &= (1 << len)-1;
751
752 end = len + irq;
753
754 for (; irq < end && subsrc; irq++) {
755 if (subsrc & 1)
756 generic_handle_irq(irq);
757
758 subsrc >>= 1;
759 }
760}
761
762/* WDT/AC97 sub interrupts */
763
764static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
765{
766 s3c2443_irq_demux(IRQ_S3C2443_WDT, 4);
767}
768
769#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
770#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
771
772static void s3c2443_irq_wdtac97_mask(struct irq_data *data)
773{
774 s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
775}
776
777static void s3c2443_irq_wdtac97_unmask(struct irq_data *data)
778{
779 s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
780}
781
782static void s3c2443_irq_wdtac97_ack(struct irq_data *data)
783{
784 s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
785}
786
787static struct irq_chip s3c2443_irq_wdtac97 = {
788 .irq_mask = s3c2443_irq_wdtac97_mask,
789 .irq_unmask = s3c2443_irq_wdtac97_unmask,
790 .irq_ack = s3c2443_irq_wdtac97_ack,
791};
792
793/* LCD sub interrupts */
794
795static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
796{
797 s3c2443_irq_demux(IRQ_S3C2443_LCD1, 4);
798}
799
800#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
801#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
802
803static void s3c2443_irq_lcd_mask(struct irq_data *data)
804{
805 s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
806}
807
808static void s3c2443_irq_lcd_unmask(struct irq_data *data)
809{
810 s3c_irqsub_unmask(data->irq, INTMSK_LCD);
811}
812
813static void s3c2443_irq_lcd_ack(struct irq_data *data)
814{
815 s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
816}
817
818static struct irq_chip s3c2443_irq_lcd = {
819 .irq_mask = s3c2443_irq_lcd_mask,
820 .irq_unmask = s3c2443_irq_lcd_unmask,
821 .irq_ack = s3c2443_irq_lcd_ack,
822};
823
824/* DMA sub interrupts */
825
826static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
827{
828 s3c2443_irq_demux(IRQ_S3C2443_DMA0, 6);
829}
830
831#define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
832#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
833
834static void s3c2443_irq_dma_mask(struct irq_data *data)
835{
836 s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
837}
838
839static void s3c2443_irq_dma_unmask(struct irq_data *data)
840{
841 s3c_irqsub_unmask(data->irq, INTMSK_DMA);
842}
843
844static void s3c2443_irq_dma_ack(struct irq_data *data)
845{
846 s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
847}
848
849static struct irq_chip s3c2443_irq_dma = {
850 .irq_mask = s3c2443_irq_dma_mask,
851 .irq_unmask = s3c2443_irq_dma_unmask,
852 .irq_ack = s3c2443_irq_dma_ack,
853};
854
855/* UART3 sub interrupts */
856
857static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
858{
859 s3c2443_irq_demux(IRQ_S3C2443_RX3, 3);
860}
861
862#define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
863#define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
864
865static void s3c2443_irq_uart3_mask(struct irq_data *data)
866{
867 s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
868}
869
870static void s3c2443_irq_uart3_unmask(struct irq_data *data)
871{
872 s3c_irqsub_unmask(data->irq, INTMSK_UART3);
873}
874
875static void s3c2443_irq_uart3_ack(struct irq_data *data)
876{
877 s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
878}
879
880static struct irq_chip s3c2443_irq_uart3 = {
881 .irq_mask = s3c2443_irq_uart3_mask,
882 .irq_unmask = s3c2443_irq_uart3_unmask,
883 .irq_ack = s3c2443_irq_uart3_ack,
884};
885
886/* CAM sub interrupts */
887
888static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
889{
890 s3c2443_irq_demux(IRQ_S3C2440_CAM_C, 4);
891}
892
893#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
894#define SUBMSK_CAM INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
895
896static void s3c2443_irq_cam_mask(struct irq_data *data)
897{
898 s3c_irqsub_mask(data->irq, INTMSK_CAM, SUBMSK_CAM);
899}
900
901static void s3c2443_irq_cam_unmask(struct irq_data *data)
902{
903 s3c_irqsub_unmask(data->irq, INTMSK_CAM);
904}
905
906static void s3c2443_irq_cam_ack(struct irq_data *data)
907{
908 s3c_irqsub_maskack(data->irq, INTMSK_CAM, SUBMSK_CAM);
909}
910
911static struct irq_chip s3c2443_irq_cam = {
912 .irq_mask = s3c2443_irq_cam_mask,
913 .irq_unmask = s3c2443_irq_cam_unmask,
914 .irq_ack = s3c2443_irq_cam_ack,
915};
916
917/* IRQ initialisation code */
918
919static int s3c2443_add_sub(unsigned int base,
920 void (*demux)(unsigned int,
921 struct irq_desc *),
922 struct irq_chip *chip,
923 unsigned int start, unsigned int end)
924{
925 unsigned int irqno;
926
927 irq_set_chip_and_handler(base, &s3c_irq_level_chip, handle_level_irq);
928 irq_set_chained_handler(base, demux);
929
930 for (irqno = start; irqno <= end; irqno++) {
931 irq_set_chip_and_handler(irqno, chip, handle_level_irq);
932 set_irq_flags(irqno, IRQF_VALID);
933 }
934
935 return 0;
936}
937
938static int s3c2443_irq_add(struct device *dev,
939 struct subsys_interface *sif)
940{
941 printk("S3C2443: IRQ Support\n");
942
943 s3c2443_add_sub(IRQ_CAM, s3c2443_irq_demux_cam, &s3c2443_irq_cam,
944 IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P);
945
946 s3c2443_add_sub(IRQ_LCD, s3c2443_irq_demux_lcd, &s3c2443_irq_lcd,
947 IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4);
948
949 s3c2443_add_sub(IRQ_S3C2443_DMA, s3c2443_irq_demux_dma,
950 &s3c2443_irq_dma, IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5);
951
952 s3c2443_add_sub(IRQ_S3C2443_UART3, s3c2443_irq_demux_uart3,
953 &s3c2443_irq_uart3,
954 IRQ_S3C2443_RX3, IRQ_S3C2443_ERR3);
955
956 s3c2443_add_sub(IRQ_WDT, s3c2443_irq_demux_wdtac97,
957 &s3c2443_irq_wdtac97,
958 IRQ_S3C2443_WDT, IRQ_S3C2443_AC97);
959
960 return 0;
961}
962
963static struct subsys_interface s3c2443_irq_interface = {
964 .name = "s3c2443_irq",
965 .subsys = &s3c2443_subsys,
966 .add_dev = s3c2443_irq_add,
967};
968
969static int __init s3c2443_irq_init(void)
970{
971 return subsys_interface_register(&s3c2443_irq_interface);
972}
973
974arch_initcall(s3c2443_irq_init);
975#endif
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-10 10:36:24 -0400