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authorDavid Howells <dhowells@redhat.com>2012-10-09 04:49:13 -0400
committerDavid Howells <dhowells@redhat.com>2012-10-09 04:49:13 -0400
commit674e95ca446369e9ca40e4e92b214a616a52bcd6 (patch)
treec26f11819af6715384e87e0346f37df53912e2cd
parent9e2d8656f5e8aa214e66b462680cf86b210b74a8 (diff)
UAPI: (Scripted) Disintegrate include/sound
Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Michael Kerrisk <mtk.manpages@gmail.com> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
Diffstat
-rw-r--r--include/sound/Kbuild10
-rw-r--r--include/sound/asequencer.h594
-rw-r--r--include/sound/asound.h935
-rw-r--r--include/sound/emu10k1.h355
-rw-r--r--include/sound/sb16_csp.h104
-rw-r--r--include/uapi/sound/Kbuild10
-rw-r--r--include/uapi/sound/asequencer.h614
-rw-r--r--include/uapi/sound/asound.h957
-rw-r--r--include/uapi/sound/asound_fm.h (renamed from include/sound/asound_fm.h)0
-rw-r--r--include/uapi/sound/compress_offload.h (renamed from include/sound/compress_offload.h)0
-rw-r--r--include/uapi/sound/compress_params.h (renamed from include/sound/compress_params.h)0
-rw-r--r--include/uapi/sound/emu10k1.h373
-rw-r--r--include/uapi/sound/hdsp.h (renamed from include/sound/hdsp.h)0
-rw-r--r--include/uapi/sound/hdspm.h (renamed from include/sound/hdspm.h)0
-rw-r--r--include/uapi/sound/sb16_csp.h122
-rw-r--r--include/uapi/sound/sfnt_info.h (renamed from include/sound/sfnt_info.h)0
16 files changed, 2084 insertions, 1990 deletions
diff --git a/include/sound/Kbuild b/include/sound/Kbuild
index 6df30ed1581c..e69de29bb2d1 100644
--- a/include/sound/Kbuild
+++ b/include/sound/Kbuild
@@ -1,10 +0,0 @@
1header-y += asequencer.h
2header-y += asound.h
3header-y += asound_fm.h
4header-y += emu10k1.h
5header-y += hdsp.h
6header-y += hdspm.h
7header-y += sb16_csp.h
8header-y += sfnt_info.h
9header-y += compress_params.h
10header-y += compress_offload.h
diff --git a/include/sound/asequencer.h b/include/sound/asequencer.h
index 1505e6d5ef82..75935ce739c5 100644
--- a/include/sound/asequencer.h
+++ b/include/sound/asequencer.h
@@ -22,294 +22,9 @@
22#ifndef __SOUND_ASEQUENCER_H 22#ifndef __SOUND_ASEQUENCER_H
23#define __SOUND_ASEQUENCER_H 23#define __SOUND_ASEQUENCER_H
24 24
25#ifdef __KERNEL__
26#include <linux/ioctl.h> 25#include <linux/ioctl.h>
27#include <sound/asound.h> 26#include <sound/asound.h>
28#endif 27#include <uapi/sound/asequencer.h>
29
30/** version of the sequencer */
31#define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION (1, 0, 1)
32
33/**
34 * definition of sequencer event types
35 */
36
37/** system messages
38 * event data type = #snd_seq_result
39 */
40#define SNDRV_SEQ_EVENT_SYSTEM 0
41#define SNDRV_SEQ_EVENT_RESULT 1
42
43/** note messages (channel specific)
44 * event data type = #snd_seq_ev_note
45 */
46#define SNDRV_SEQ_EVENT_NOTE 5
47#define SNDRV_SEQ_EVENT_NOTEON 6
48#define SNDRV_SEQ_EVENT_NOTEOFF 7
49#define SNDRV_SEQ_EVENT_KEYPRESS 8
50
51/** control messages (channel specific)
52 * event data type = #snd_seq_ev_ctrl
53 */
54#define SNDRV_SEQ_EVENT_CONTROLLER 10
55#define SNDRV_SEQ_EVENT_PGMCHANGE 11
56#define SNDRV_SEQ_EVENT_CHANPRESS 12
57#define SNDRV_SEQ_EVENT_PITCHBEND 13 /**< from -8192 to 8191 */
58#define SNDRV_SEQ_EVENT_CONTROL14 14 /**< 14 bit controller value */
59#define SNDRV_SEQ_EVENT_NONREGPARAM 15 /**< 14 bit NRPN address + 14 bit unsigned value */
60#define SNDRV_SEQ_EVENT_REGPARAM 16 /**< 14 bit RPN address + 14 bit unsigned value */
61
62/** synchronisation messages
63 * event data type = #snd_seq_ev_ctrl
64 */
65#define SNDRV_SEQ_EVENT_SONGPOS 20 /* Song Position Pointer with LSB and MSB values */
66#define SNDRV_SEQ_EVENT_SONGSEL 21 /* Song Select with song ID number */
67#define SNDRV_SEQ_EVENT_QFRAME 22 /* midi time code quarter frame */
68#define SNDRV_SEQ_EVENT_TIMESIGN 23 /* SMF Time Signature event */
69#define SNDRV_SEQ_EVENT_KEYSIGN 24 /* SMF Key Signature event */
70
71/** timer messages
72 * event data type = snd_seq_ev_queue_control
73 */
74#define SNDRV_SEQ_EVENT_START 30 /* midi Real Time Start message */
75#define SNDRV_SEQ_EVENT_CONTINUE 31 /* midi Real Time Continue message */
76#define SNDRV_SEQ_EVENT_STOP 32 /* midi Real Time Stop message */
77#define SNDRV_SEQ_EVENT_SETPOS_TICK 33 /* set tick queue position */
78#define SNDRV_SEQ_EVENT_SETPOS_TIME 34 /* set realtime queue position */
79#define SNDRV_SEQ_EVENT_TEMPO 35 /* (SMF) Tempo event */
80#define SNDRV_SEQ_EVENT_CLOCK 36 /* midi Real Time Clock message */
81#define SNDRV_SEQ_EVENT_TICK 37 /* midi Real Time Tick message */
82#define SNDRV_SEQ_EVENT_QUEUE_SKEW 38 /* skew queue tempo */
83
84/** others
85 * event data type = none
86 */
87#define SNDRV_SEQ_EVENT_TUNE_REQUEST 40 /* tune request */
88#define SNDRV_SEQ_EVENT_RESET 41 /* reset to power-on state */
89#define SNDRV_SEQ_EVENT_SENSING 42 /* "active sensing" event */
90
91/** echo back, kernel private messages
92 * event data type = any type
93 */
94#define SNDRV_SEQ_EVENT_ECHO 50 /* echo event */
95#define SNDRV_SEQ_EVENT_OSS 51 /* OSS raw event */
96
97/** system status messages (broadcast for subscribers)
98 * event data type = snd_seq_addr
99 */
100#define SNDRV_SEQ_EVENT_CLIENT_START 60 /* new client has connected */
101#define SNDRV_SEQ_EVENT_CLIENT_EXIT 61 /* client has left the system */
102#define SNDRV_SEQ_EVENT_CLIENT_CHANGE 62 /* client status/info has changed */
103#define SNDRV_SEQ_EVENT_PORT_START 63 /* new port was created */
104#define SNDRV_SEQ_EVENT_PORT_EXIT 64 /* port was deleted from system */
105#define SNDRV_SEQ_EVENT_PORT_CHANGE 65 /* port status/info has changed */
106
107/** port connection changes
108 * event data type = snd_seq_connect
109 */
110#define SNDRV_SEQ_EVENT_PORT_SUBSCRIBED 66 /* ports connected */
111#define SNDRV_SEQ_EVENT_PORT_UNSUBSCRIBED 67 /* ports disconnected */
112
113/* 70-89: synthesizer events - obsoleted */
114
115/** user-defined events with fixed length
116 * event data type = any
117 */
118#define SNDRV_SEQ_EVENT_USR0 90
119#define SNDRV_SEQ_EVENT_USR1 91
120#define SNDRV_SEQ_EVENT_USR2 92
121#define SNDRV_SEQ_EVENT_USR3 93
122#define SNDRV_SEQ_EVENT_USR4 94
123#define SNDRV_SEQ_EVENT_USR5 95
124#define SNDRV_SEQ_EVENT_USR6 96
125#define SNDRV_SEQ_EVENT_USR7 97
126#define SNDRV_SEQ_EVENT_USR8 98
127#define SNDRV_SEQ_EVENT_USR9 99
128
129/* 100-118: instrument layer - obsoleted */
130/* 119-129: reserved */
131
132/* 130-139: variable length events
133 * event data type = snd_seq_ev_ext
134 * (SNDRV_SEQ_EVENT_LENGTH_VARIABLE must be set)
135 */
136#define SNDRV_SEQ_EVENT_SYSEX 130 /* system exclusive data (variable length) */
137#define SNDRV_SEQ_EVENT_BOUNCE 131 /* error event */
138/* 132-134: reserved */
139#define SNDRV_SEQ_EVENT_USR_VAR0 135
140#define SNDRV_SEQ_EVENT_USR_VAR1 136
141#define SNDRV_SEQ_EVENT_USR_VAR2 137
142#define SNDRV_SEQ_EVENT_USR_VAR3 138
143#define SNDRV_SEQ_EVENT_USR_VAR4 139
144
145/* 150-151: kernel events with quote - DO NOT use in user clients */
146#define SNDRV_SEQ_EVENT_KERNEL_ERROR 150
147#define SNDRV_SEQ_EVENT_KERNEL_QUOTE 151 /* obsolete */
148
149/* 152-191: reserved */
150
151/* 192-254: hardware specific events */
152
153/* 255: special event */
154#define SNDRV_SEQ_EVENT_NONE 255
155
156
157typedef unsigned char snd_seq_event_type_t;
158
159/** event address */
160struct snd_seq_addr {
161 unsigned char client; /**< Client number: 0..255, 255 = broadcast to all clients */
162 unsigned char port; /**< Port within client: 0..255, 255 = broadcast to all ports */
163};
164
165/** port connection */
166struct snd_seq_connect {
167 struct snd_seq_addr sender;
168 struct snd_seq_addr dest;
169};
170
171
172#define SNDRV_SEQ_ADDRESS_UNKNOWN 253 /* unknown source */
173#define SNDRV_SEQ_ADDRESS_SUBSCRIBERS 254 /* send event to all subscribed ports */
174#define SNDRV_SEQ_ADDRESS_BROADCAST 255 /* send event to all queues/clients/ports/channels */
175#define SNDRV_SEQ_QUEUE_DIRECT 253 /* direct dispatch */
176
177 /* event mode flag - NOTE: only 8 bits available! */
178#define SNDRV_SEQ_TIME_STAMP_TICK (0<<0) /* timestamp in clock ticks */
179#define SNDRV_SEQ_TIME_STAMP_REAL (1<<0) /* timestamp in real time */
180#define SNDRV_SEQ_TIME_STAMP_MASK (1<<0)
181
182#define SNDRV_SEQ_TIME_MODE_ABS (0<<1) /* absolute timestamp */
183#define SNDRV_SEQ_TIME_MODE_REL (1<<1) /* relative to current time */
184#define SNDRV_SEQ_TIME_MODE_MASK (1<<1)
185
186#define SNDRV_SEQ_EVENT_LENGTH_FIXED (0<<2) /* fixed event size */
187#define SNDRV_SEQ_EVENT_LENGTH_VARIABLE (1<<2) /* variable event size */
188#define SNDRV_SEQ_EVENT_LENGTH_VARUSR (2<<2) /* variable event size - user memory space */
189#define SNDRV_SEQ_EVENT_LENGTH_MASK (3<<2)
190
191#define SNDRV_SEQ_PRIORITY_NORMAL (0<<4) /* normal priority */
192#define SNDRV_SEQ_PRIORITY_HIGH (1<<4) /* event should be processed before others */
193#define SNDRV_SEQ_PRIORITY_MASK (1<<4)
194
195
196 /* note event */
197struct snd_seq_ev_note {
198 unsigned char channel;
199 unsigned char note;
200 unsigned char velocity;
201 unsigned char off_velocity; /* only for SNDRV_SEQ_EVENT_NOTE */
202 unsigned int duration; /* only for SNDRV_SEQ_EVENT_NOTE */
203};
204
205 /* controller event */
206struct snd_seq_ev_ctrl {
207 unsigned char channel;
208 unsigned char unused1, unused2, unused3; /* pad */
209 unsigned int param;
210 signed int value;
211};
212
213 /* generic set of bytes (12x8 bit) */
214struct snd_seq_ev_raw8 {
215 unsigned char d[12]; /* 8 bit value */
216};
217
218 /* generic set of integers (3x32 bit) */
219struct snd_seq_ev_raw32 {
220 unsigned int d[3]; /* 32 bit value */
221};
222
223 /* external stored data */
224struct snd_seq_ev_ext {
225 unsigned int len; /* length of data */
226 void *ptr; /* pointer to data (note: maybe 64-bit) */
227} __attribute__((packed));
228
229struct snd_seq_result {
230 int event; /* processed event type */
231 int result;
232};
233
234
235struct snd_seq_real_time {
236 unsigned int tv_sec; /* seconds */
237 unsigned int tv_nsec; /* nanoseconds */
238};
239
240typedef unsigned int snd_seq_tick_time_t; /* midi ticks */
241
242union snd_seq_timestamp {
243 snd_seq_tick_time_t tick;
244 struct snd_seq_real_time time;
245};
246
247struct snd_seq_queue_skew {
248 unsigned int value;
249 unsigned int base;
250};
251
252 /* queue timer control */
253struct snd_seq_ev_queue_control {
254 unsigned char queue; /* affected queue */
255 unsigned char pad[3]; /* reserved */
256 union {
257 signed int value; /* affected value (e.g. tempo) */
258 union snd_seq_timestamp time; /* time */
259 unsigned int position; /* sync position */
260 struct snd_seq_queue_skew skew;
261 unsigned int d32[2];
262 unsigned char d8[8];
263 } param;
264};
265
266 /* quoted event - inside the kernel only */
267struct snd_seq_ev_quote {
268 struct snd_seq_addr origin; /* original sender */
269 unsigned short value; /* optional data */
270 struct snd_seq_event *event; /* quoted event */
271} __attribute__((packed));
272
273
274 /* sequencer event */
275struct snd_seq_event {
276 snd_seq_event_type_t type; /* event type */
277 unsigned char flags; /* event flags */
278 char tag;
279
280 unsigned char queue; /* schedule queue */
281 union snd_seq_timestamp time; /* schedule time */
282
283
284 struct snd_seq_addr source; /* source address */
285 struct snd_seq_addr dest; /* destination address */
286
287 union { /* event data... */
288 struct snd_seq_ev_note note;
289 struct snd_seq_ev_ctrl control;
290 struct snd_seq_ev_raw8 raw8;
291 struct snd_seq_ev_raw32 raw32;
292 struct snd_seq_ev_ext ext;
293 struct snd_seq_ev_queue_control queue;
294 union snd_seq_timestamp time;
295 struct snd_seq_addr addr;
296 struct snd_seq_connect connect;
297 struct snd_seq_result result;
298 struct snd_seq_ev_quote quote;
299 } data;
300};
301
302
303/*
304 * bounce event - stored as variable size data
305 */
306struct snd_seq_event_bounce {
307 int err;
308 struct snd_seq_event event;
309 /* external data follows here. */
310};
311
312#ifdef __KERNEL__
313 28
314/* helper macro */ 29/* helper macro */
315#define snd_seq_event_bounce_ext_data(ev) ((void*)((char *)(ev)->data.ext.ptr + sizeof(struct snd_seq_event_bounce))) 30#define snd_seq_event_bounce_ext_data(ev) ((void*)((char *)(ev)->data.ext.ptr + sizeof(struct snd_seq_event_bounce)))
@@ -368,311 +83,4 @@ struct snd_seq_event_bounce {
368/* queue sync port */ 83/* queue sync port */
369#define snd_seq_queue_sync_port(q) ((q) + 16) 84#define snd_seq_queue_sync_port(q) ((q) + 16)
370 85
371#endif /* __KERNEL__ */
372
373 /* system information */
374struct snd_seq_system_info {
375 int queues; /* maximum queues count */
376 int clients; /* maximum clients count */
377 int ports; /* maximum ports per client */
378 int channels; /* maximum channels per port */
379 int cur_clients; /* current clients */
380 int cur_queues; /* current queues */
381 char reserved[24];
382};
383
384
385 /* system running information */
386struct snd_seq_running_info {
387 unsigned char client; /* client id */
388 unsigned char big_endian; /* 1 = big-endian */
389 unsigned char cpu_mode; /* 4 = 32bit, 8 = 64bit */
390 unsigned char pad; /* reserved */
391 unsigned char reserved[12];
392};
393
394
395 /* known client numbers */
396#define SNDRV_SEQ_CLIENT_SYSTEM 0
397 /* internal client numbers */
398#define SNDRV_SEQ_CLIENT_DUMMY 14 /* midi through */
399#define SNDRV_SEQ_CLIENT_OSS 15 /* oss sequencer emulator */
400
401
402 /* client types */
403typedef int __bitwise snd_seq_client_type_t;
404#define NO_CLIENT ((__force snd_seq_client_type_t) 0)
405#define USER_CLIENT ((__force snd_seq_client_type_t) 1)
406#define KERNEL_CLIENT ((__force snd_seq_client_type_t) 2)
407
408 /* event filter flags */
409#define SNDRV_SEQ_FILTER_BROADCAST (1<<0) /* accept broadcast messages */
410#define SNDRV_SEQ_FILTER_MULTICAST (1<<1) /* accept multicast messages */
411#define SNDRV_SEQ_FILTER_BOUNCE (1<<2) /* accept bounce event in error */
412#define SNDRV_SEQ_FILTER_USE_EVENT (1<<31) /* use event filter */
413
414struct snd_seq_client_info {
415 int client; /* client number to inquire */
416 snd_seq_client_type_t type; /* client type */
417 char name[64]; /* client name */
418 unsigned int filter; /* filter flags */
419 unsigned char multicast_filter[8]; /* multicast filter bitmap */
420 unsigned char event_filter[32]; /* event filter bitmap */
421 int num_ports; /* RO: number of ports */
422 int event_lost; /* number of lost events */
423 char reserved[64]; /* for future use */
424};
425
426
427/* client pool size */
428struct snd_seq_client_pool {
429 int client; /* client number to inquire */
430 int output_pool; /* outgoing (write) pool size */
431 int input_pool; /* incoming (read) pool size */
432 int output_room; /* minimum free pool size for select/blocking mode */
433 int output_free; /* unused size */
434 int input_free; /* unused size */
435 char reserved[64];
436};
437
438
439/* Remove events by specified criteria */
440
441#define SNDRV_SEQ_REMOVE_INPUT (1<<0) /* Flush input queues */
442#define SNDRV_SEQ_REMOVE_OUTPUT (1<<1) /* Flush output queues */
443#define SNDRV_SEQ_REMOVE_DEST (1<<2) /* Restrict by destination q:client:port */
444#define SNDRV_SEQ_REMOVE_DEST_CHANNEL (1<<3) /* Restrict by channel */
445#define SNDRV_SEQ_REMOVE_TIME_BEFORE (1<<4) /* Restrict to before time */
446#define SNDRV_SEQ_REMOVE_TIME_AFTER (1<<5) /* Restrict to time or after */
447#define SNDRV_SEQ_REMOVE_TIME_TICK (1<<6) /* Time is in ticks */
448#define SNDRV_SEQ_REMOVE_EVENT_TYPE (1<<7) /* Restrict to event type */
449#define SNDRV_SEQ_REMOVE_IGNORE_OFF (1<<8) /* Do not flush off events */
450#define SNDRV_SEQ_REMOVE_TAG_MATCH (1<<9) /* Restrict to events with given tag */
451
452struct snd_seq_remove_events {
453 unsigned int remove_mode; /* Flags that determine what gets removed */
454
455 union snd_seq_timestamp time;
456
457 unsigned char queue; /* Queue for REMOVE_DEST */
458 struct snd_seq_addr dest; /* Address for REMOVE_DEST */
459 unsigned char channel; /* Channel for REMOVE_DEST */
460
461 int type; /* For REMOVE_EVENT_TYPE */
462 char tag; /* Tag for REMOVE_TAG */
463
464 int reserved[10]; /* To allow for future binary compatibility */
465
466};
467
468
469 /* known port numbers */
470#define SNDRV_SEQ_PORT_SYSTEM_TIMER 0
471#define SNDRV_SEQ_PORT_SYSTEM_ANNOUNCE 1
472
473 /* port capabilities (32 bits) */
474#define SNDRV_SEQ_PORT_CAP_READ (1<<0) /* readable from this port */
475#define SNDRV_SEQ_PORT_CAP_WRITE (1<<1) /* writable to this port */
476
477#define SNDRV_SEQ_PORT_CAP_SYNC_READ (1<<2)
478#define SNDRV_SEQ_PORT_CAP_SYNC_WRITE (1<<3)
479
480#define SNDRV_SEQ_PORT_CAP_DUPLEX (1<<4)
481
482#define SNDRV_SEQ_PORT_CAP_SUBS_READ (1<<5) /* allow read subscription */
483#define SNDRV_SEQ_PORT_CAP_SUBS_WRITE (1<<6) /* allow write subscription */
484#define SNDRV_SEQ_PORT_CAP_NO_EXPORT (1<<7) /* routing not allowed */
485
486 /* port type */
487#define SNDRV_SEQ_PORT_TYPE_SPECIFIC (1<<0) /* hardware specific */
488#define SNDRV_SEQ_PORT_TYPE_MIDI_GENERIC (1<<1) /* generic MIDI device */
489#define SNDRV_SEQ_PORT_TYPE_MIDI_GM (1<<2) /* General MIDI compatible device */
490#define SNDRV_SEQ_PORT_TYPE_MIDI_GS (1<<3) /* GS compatible device */
491#define SNDRV_SEQ_PORT_TYPE_MIDI_XG (1<<4) /* XG compatible device */
492#define SNDRV_SEQ_PORT_TYPE_MIDI_MT32 (1<<5) /* MT-32 compatible device */
493#define SNDRV_SEQ_PORT_TYPE_MIDI_GM2 (1<<6) /* General MIDI 2 compatible device */
494
495/* other standards...*/
496#define SNDRV_SEQ_PORT_TYPE_SYNTH (1<<10) /* Synth device (no MIDI compatible - direct wavetable) */
497#define SNDRV_SEQ_PORT_TYPE_DIRECT_SAMPLE (1<<11) /* Sampling device (support sample download) */
498#define SNDRV_SEQ_PORT_TYPE_SAMPLE (1<<12) /* Sampling device (sample can be downloaded at any time) */
499/*...*/
500#define SNDRV_SEQ_PORT_TYPE_HARDWARE (1<<16) /* driver for a hardware device */
501#define SNDRV_SEQ_PORT_TYPE_SOFTWARE (1<<17) /* implemented in software */
502#define SNDRV_SEQ_PORT_TYPE_SYNTHESIZER (1<<18) /* generates sound */
503#define SNDRV_SEQ_PORT_TYPE_PORT (1<<19) /* connects to other device(s) */
504#define SNDRV_SEQ_PORT_TYPE_APPLICATION (1<<20) /* application (sequencer/editor) */
505
506/* misc. conditioning flags */
507#define SNDRV_SEQ_PORT_FLG_GIVEN_PORT (1<<0)
508#define SNDRV_SEQ_PORT_FLG_TIMESTAMP (1<<1)
509#define SNDRV_SEQ_PORT_FLG_TIME_REAL (1<<2)
510
511struct snd_seq_port_info {
512 struct snd_seq_addr addr; /* client/port numbers */
513 char name[64]; /* port name */
514
515 unsigned int capability; /* port capability bits */
516 unsigned int type; /* port type bits */
517 int midi_channels; /* channels per MIDI port */
518 int midi_voices; /* voices per MIDI port */
519 int synth_voices; /* voices per SYNTH port */
520
521 int read_use; /* R/O: subscribers for output (from this port) */
522 int write_use; /* R/O: subscribers for input (to this port) */
523
524 void *kernel; /* reserved for kernel use (must be NULL) */
525 unsigned int flags; /* misc. conditioning */
526 unsigned char time_queue; /* queue # for timestamping */
527 char reserved[59]; /* for future use */
528};
529
530
531/* queue flags */
532#define SNDRV_SEQ_QUEUE_FLG_SYNC (1<<0) /* sync enabled */
533
534/* queue information */
535struct snd_seq_queue_info {
536 int queue; /* queue id */
537
538 /*
539 * security settings, only owner of this queue can start/stop timer
540 * etc. if the queue is locked for other clients
541 */
542 int owner; /* client id for owner of the queue */
543 unsigned locked:1; /* timing queue locked for other queues */
544 char name[64]; /* name of this queue */
545 unsigned int flags; /* flags */
546 char reserved[60]; /* for future use */
547
548};
549
550/* queue info/status */
551struct snd_seq_queue_status {
552 int queue; /* queue id */
553 int events; /* read-only - queue size */
554 snd_seq_tick_time_t tick; /* current tick */
555 struct snd_seq_real_time time; /* current time */
556 int running; /* running state of queue */
557 int flags; /* various flags */
558 char reserved[64]; /* for the future */
559};
560
561
562/* queue tempo */
563struct snd_seq_queue_tempo {
564 int queue; /* sequencer queue */
565 unsigned int tempo; /* current tempo, us/tick */
566 int ppq; /* time resolution, ticks/quarter */
567 unsigned int skew_value; /* queue skew */
568 unsigned int skew_base; /* queue skew base */
569 char reserved[24]; /* for the future */
570};
571
572
573/* sequencer timer sources */
574#define SNDRV_SEQ_TIMER_ALSA 0 /* ALSA timer */
575#define SNDRV_SEQ_TIMER_MIDI_CLOCK 1 /* Midi Clock (CLOCK event) */
576#define SNDRV_SEQ_TIMER_MIDI_TICK 2 /* Midi Timer Tick (TICK event) */
577
578/* queue timer info */
579struct snd_seq_queue_timer {
580 int queue; /* sequencer queue */
581 int type; /* source timer type */
582 union {
583 struct {
584 struct snd_timer_id id; /* ALSA's timer ID */
585 unsigned int resolution; /* resolution in Hz */
586 } alsa;
587 } u;
588 char reserved[64]; /* for the future use */
589};
590
591
592struct snd_seq_queue_client {
593 int queue; /* sequencer queue */
594 int client; /* sequencer client */
595 int used; /* queue is used with this client
596 (must be set for accepting events) */
597 /* per client watermarks */
598 char reserved[64]; /* for future use */
599};
600
601
602#define SNDRV_SEQ_PORT_SUBS_EXCLUSIVE (1<<0) /* exclusive connection */
603#define SNDRV_SEQ_PORT_SUBS_TIMESTAMP (1<<1)
604#define SNDRV_SEQ_PORT_SUBS_TIME_REAL (1<<2)
605
606struct snd_seq_port_subscribe {
607 struct snd_seq_addr sender; /* sender address */
608 struct snd_seq_addr dest; /* destination address */
609 unsigned int voices; /* number of voices to be allocated (0 = don't care) */
610 unsigned int flags; /* modes */
611 unsigned char queue; /* input time-stamp queue (optional) */
612 unsigned char pad[3]; /* reserved */
613 char reserved[64];
614};
615
616/* type of query subscription */
617#define SNDRV_SEQ_QUERY_SUBS_READ 0
618#define SNDRV_SEQ_QUERY_SUBS_WRITE 1
619
620struct snd_seq_query_subs {
621 struct snd_seq_addr root; /* client/port id to be searched */
622 int type; /* READ or WRITE */
623 int index; /* 0..N-1 */
624 int num_subs; /* R/O: number of subscriptions on this port */
625 struct snd_seq_addr addr; /* R/O: result */
626 unsigned char queue; /* R/O: result */
627 unsigned int flags; /* R/O: result */
628 char reserved[64]; /* for future use */
629};
630
631
632/*
633 * IOCTL commands
634 */
635
636#define SNDRV_SEQ_IOCTL_PVERSION _IOR ('S', 0x00, int)
637#define SNDRV_SEQ_IOCTL_CLIENT_ID _IOR ('S', 0x01, int)
638#define SNDRV_SEQ_IOCTL_SYSTEM_INFO _IOWR('S', 0x02, struct snd_seq_system_info)
639#define SNDRV_SEQ_IOCTL_RUNNING_MODE _IOWR('S', 0x03, struct snd_seq_running_info)
640
641#define SNDRV_SEQ_IOCTL_GET_CLIENT_INFO _IOWR('S', 0x10, struct snd_seq_client_info)
642#define SNDRV_SEQ_IOCTL_SET_CLIENT_INFO _IOW ('S', 0x11, struct snd_seq_client_info)
643
644#define SNDRV_SEQ_IOCTL_CREATE_PORT _IOWR('S', 0x20, struct snd_seq_port_info)
645#define SNDRV_SEQ_IOCTL_DELETE_PORT _IOW ('S', 0x21, struct snd_seq_port_info)
646#define SNDRV_SEQ_IOCTL_GET_PORT_INFO _IOWR('S', 0x22, struct snd_seq_port_info)
647#define SNDRV_SEQ_IOCTL_SET_PORT_INFO _IOW ('S', 0x23, struct snd_seq_port_info)
648
649#define SNDRV_SEQ_IOCTL_SUBSCRIBE_PORT _IOW ('S', 0x30, struct snd_seq_port_subscribe)
650#define SNDRV_SEQ_IOCTL_UNSUBSCRIBE_PORT _IOW ('S', 0x31, struct snd_seq_port_subscribe)
651
652#define SNDRV_SEQ_IOCTL_CREATE_QUEUE _IOWR('S', 0x32, struct snd_seq_queue_info)
653#define SNDRV_SEQ_IOCTL_DELETE_QUEUE _IOW ('S', 0x33, struct snd_seq_queue_info)
654#define SNDRV_SEQ_IOCTL_GET_QUEUE_INFO _IOWR('S', 0x34, struct snd_seq_queue_info)
655#define SNDRV_SEQ_IOCTL_SET_QUEUE_INFO _IOWR('S', 0x35, struct snd_seq_queue_info)
656#define SNDRV_SEQ_IOCTL_GET_NAMED_QUEUE _IOWR('S', 0x36, struct snd_seq_queue_info)
657#define SNDRV_SEQ_IOCTL_GET_QUEUE_STATUS _IOWR('S', 0x40, struct snd_seq_queue_status)
658#define SNDRV_SEQ_IOCTL_GET_QUEUE_TEMPO _IOWR('S', 0x41, struct snd_seq_queue_tempo)
659#define SNDRV_SEQ_IOCTL_SET_QUEUE_TEMPO _IOW ('S', 0x42, struct snd_seq_queue_tempo)
660#define SNDRV_SEQ_IOCTL_GET_QUEUE_OWNER _IOWR('S', 0x43, struct snd_seq_queue_owner)
661#define SNDRV_SEQ_IOCTL_SET_QUEUE_OWNER _IOW ('S', 0x44, struct snd_seq_queue_owner)
662#define SNDRV_SEQ_IOCTL_GET_QUEUE_TIMER _IOWR('S', 0x45, struct snd_seq_queue_timer)
663#define SNDRV_SEQ_IOCTL_SET_QUEUE_TIMER _IOW ('S', 0x46, struct snd_seq_queue_timer)
664/* XXX
665#define SNDRV_SEQ_IOCTL_GET_QUEUE_SYNC _IOWR('S', 0x53, struct snd_seq_queue_sync)
666#define SNDRV_SEQ_IOCTL_SET_QUEUE_SYNC _IOW ('S', 0x54, struct snd_seq_queue_sync)
667*/
668#define SNDRV_SEQ_IOCTL_GET_QUEUE_CLIENT _IOWR('S', 0x49, struct snd_seq_queue_client)
669#define SNDRV_SEQ_IOCTL_SET_QUEUE_CLIENT _IOW ('S', 0x4a, struct snd_seq_queue_client)
670#define SNDRV_SEQ_IOCTL_GET_CLIENT_POOL _IOWR('S', 0x4b, struct snd_seq_client_pool)
671#define SNDRV_SEQ_IOCTL_SET_CLIENT_POOL _IOW ('S', 0x4c, struct snd_seq_client_pool)
672#define SNDRV_SEQ_IOCTL_REMOVE_EVENTS _IOW ('S', 0x4e, struct snd_seq_remove_events)
673#define SNDRV_SEQ_IOCTL_QUERY_SUBS _IOWR('S', 0x4f, struct snd_seq_query_subs)
674#define SNDRV_SEQ_IOCTL_GET_SUBSCRIPTION _IOWR('S', 0x50, struct snd_seq_port_subscribe)
675#define SNDRV_SEQ_IOCTL_QUERY_NEXT_CLIENT _IOWR('S', 0x51, struct snd_seq_client_info)
676#define SNDRV_SEQ_IOCTL_QUERY_NEXT_PORT _IOWR('S', 0x52, struct snd_seq_port_info)
677
678#endif /* __SOUND_ASEQUENCER_H */ 86#endif /* __SOUND_ASEQUENCER_H */
diff --git a/include/sound/asound.h b/include/sound/asound.h
index dfe7d441748c..c2dff5369d33 100644
--- a/include/sound/asound.h
+++ b/include/sound/asound.h
@@ -19,13 +19,9 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 * 20 *
21 */ 21 */
22
23#ifndef __SOUND_ASOUND_H 22#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H 23#define __SOUND_ASOUND_H
25 24
26#include <linux/types.h>
27
28#ifdef __KERNEL__
29#include <linux/ioctl.h> 25#include <linux/ioctl.h>
30#include <linux/time.h> 26#include <linux/time.h>
31#include <asm/byteorder.h> 27#include <asm/byteorder.h>
@@ -40,934 +36,5 @@
40#endif 36#endif
41#endif 37#endif
42 38
43#endif /* __KERNEL__ **/ 39#include <uapi/sound/asound.h>
44
45/*
46 * protocol version
47 */
48
49#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
50#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
51#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
52#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
53#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
54 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
55 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
56 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
57
58/****************************************************************************
59 * *
60 * Digital audio interface *
61 * *
62 ****************************************************************************/
63
64struct snd_aes_iec958 {
65 unsigned char status[24]; /* AES/IEC958 channel status bits */
66 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
67 unsigned char pad; /* nothing */
68 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
69};
70
71/****************************************************************************
72 * *
73 * CEA-861 Audio InfoFrame. Used in HDMI and DisplayPort *
74 * *
75 ****************************************************************************/
76
77struct snd_cea_861_aud_if {
78 unsigned char db1_ct_cc; /* coding type and channel count */
79 unsigned char db2_sf_ss; /* sample frequency and size */
80 unsigned char db3; /* not used, all zeros */
81 unsigned char db4_ca; /* channel allocation code */
82 unsigned char db5_dminh_lsv; /* downmix inhibit & level-shit values */
83};
84
85/****************************************************************************
86 * *
87 * Section for driver hardware dependent interface - /dev/snd/hw? *
88 * *
89 ****************************************************************************/
90
91#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
92
93enum {
94 SNDRV_HWDEP_IFACE_OPL2 = 0,
95 SNDRV_HWDEP_IFACE_OPL3,
96 SNDRV_HWDEP_IFACE_OPL4,
97 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
98 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
99 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
100 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
101 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
102 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
103 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
104 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
105 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
106 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
107 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
108 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
109 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
110 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */
111 SNDRV_HWDEP_IFACE_USB_STREAM, /* direct access to usb stream */
112
113 /* Don't forget to change the following: */
114 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_USB_STREAM
115};
116
117struct snd_hwdep_info {
118 unsigned int device; /* WR: device number */
119 int card; /* R: card number */
120 unsigned char id[64]; /* ID (user selectable) */
121 unsigned char name[80]; /* hwdep name */
122 int iface; /* hwdep interface */
123 unsigned char reserved[64]; /* reserved for future */
124};
125
126/* generic DSP loader */
127struct snd_hwdep_dsp_status {
128 unsigned int version; /* R: driver-specific version */
129 unsigned char id[32]; /* R: driver-specific ID string */
130 unsigned int num_dsps; /* R: number of DSP images to transfer */
131 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
132 unsigned int chip_ready; /* R: 1 = initialization finished */
133 unsigned char reserved[16]; /* reserved for future use */
134};
135
136struct snd_hwdep_dsp_image {
137 unsigned int index; /* W: DSP index */
138 unsigned char name[64]; /* W: ID (e.g. file name) */
139 unsigned char __user *image; /* W: binary image */
140 size_t length; /* W: size of image in bytes */
141 unsigned long driver_data; /* W: driver-specific data */
142};
143
144#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
145#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
146#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
147#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
148
149/*****************************************************************************
150 * *
151 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
152 * *
153 *****************************************************************************/
154
155#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 10)
156
157typedef unsigned long snd_pcm_uframes_t;
158typedef signed long snd_pcm_sframes_t;
159
160enum {
161 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
162 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
163 SNDRV_PCM_CLASS_MODEM, /* software modem class */
164 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
165 /* Don't forget to change the following: */
166 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
167};
168
169enum {
170 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
171 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
172 /* Don't forget to change the following: */
173 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
174};
175
176enum {
177 SNDRV_PCM_STREAM_PLAYBACK = 0,
178 SNDRV_PCM_STREAM_CAPTURE,
179 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
180};
181
182typedef int __bitwise snd_pcm_access_t;
183#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
184#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
185#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
186#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
187#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
188#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
189
190typedef int __bitwise snd_pcm_format_t;
191#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
192#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
193#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
194#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
195#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
196#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
197#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
198#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
199#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
200#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
201#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
202#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
203#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
204#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
205#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
206#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
207#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
208#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
209#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
210#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
211#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
212#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
213#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
214#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
215#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
216#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
217#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
218#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
219#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
220#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
221#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
222#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
223#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
224#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
225#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
226#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
227#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
228#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
229#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44) /* 8 samples in 3 bytes */
230#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45) /* 1 sample in 1 byte */
231#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46) /* 8 Samples in 5 bytes */
232#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47) /* 1 sample in 1 byte */
233#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_G723_40_1B
234
235#ifdef SNDRV_LITTLE_ENDIAN
236#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
237#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
238#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
239#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
240#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
241#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
242#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
243#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
244#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
245#endif
246#ifdef SNDRV_BIG_ENDIAN
247#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
248#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
249#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
250#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
251#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
252#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
253#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
254#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
255#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
256#endif
257
258typedef int __bitwise snd_pcm_subformat_t;
259#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
260#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
261
262#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
263#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
264#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
265#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
266#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
267#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
268#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
269#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
270#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
271#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
272#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
273#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
274#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
275#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
276#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 /* period wakeup can be disabled */
277#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 /* internal kernel flag - FIFO size is in frames */
278
279typedef int __bitwise snd_pcm_state_t;
280#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
281#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
282#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
283#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
284#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
285#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
286#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
287#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
288#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
289#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
290
291enum {
292 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
293 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
294 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
295};
296
297union snd_pcm_sync_id {
298 unsigned char id[16];
299 unsigned short id16[8];
300 unsigned int id32[4];
301};
302
303struct snd_pcm_info {
304 unsigned int device; /* RO/WR (control): device number */
305 unsigned int subdevice; /* RO/WR (control): subdevice number */
306 int stream; /* RO/WR (control): stream direction */
307 int card; /* R: card number */
308 unsigned char id[64]; /* ID (user selectable) */
309 unsigned char name[80]; /* name of this device */
310 unsigned char subname[32]; /* subdevice name */
311 int dev_class; /* SNDRV_PCM_CLASS_* */
312 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
313 unsigned int subdevices_count;
314 unsigned int subdevices_avail;
315 union snd_pcm_sync_id sync; /* hardware synchronization ID */
316 unsigned char reserved[64]; /* reserved for future... */
317};
318
319typedef int snd_pcm_hw_param_t;
320#define SNDRV_PCM_HW_PARAM_ACCESS 0 /* Access type */
321#define SNDRV_PCM_HW_PARAM_FORMAT 1 /* Format */
322#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 /* Subformat */
323#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
324#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
325
326#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 /* Bits per sample */
327#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 /* Bits per frame */
328#define SNDRV_PCM_HW_PARAM_CHANNELS 10 /* Channels */
329#define SNDRV_PCM_HW_PARAM_RATE 11 /* Approx rate */
330#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 /* Approx distance between
331 * interrupts in us
332 */
333#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 /* Approx frames between
334 * interrupts
335 */
336#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 /* Approx bytes between
337 * interrupts
338 */
339#define SNDRV_PCM_HW_PARAM_PERIODS 15 /* Approx interrupts per
340 * buffer
341 */
342#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 /* Approx duration of buffer
343 * in us
344 */
345#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 /* Size of buffer in frames */
346#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 /* Size of buffer in bytes */
347#define SNDRV_PCM_HW_PARAM_TICK_TIME 19 /* Approx tick duration in us */
348#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
349#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
350
351#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
352#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1) /* export buffer */
353#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2) /* disable period wakeups */
354
355struct snd_interval {
356 unsigned int min, max;
357 unsigned int openmin:1,
358 openmax:1,
359 integer:1,
360 empty:1;
361};
362
363#define SNDRV_MASK_MAX 256
364
365struct snd_mask {
366 __u32 bits[(SNDRV_MASK_MAX+31)/32];
367};
368
369struct snd_pcm_hw_params {
370 unsigned int flags;
371 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
372 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
373 struct snd_mask mres[5]; /* reserved masks */
374 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
375 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
376 struct snd_interval ires[9]; /* reserved intervals */
377 unsigned int rmask; /* W: requested masks */
378 unsigned int cmask; /* R: changed masks */
379 unsigned int info; /* R: Info flags for returned setup */
380 unsigned int msbits; /* R: used most significant bits */
381 unsigned int rate_num; /* R: rate numerator */
382 unsigned int rate_den; /* R: rate denominator */
383 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
384 unsigned char reserved[64]; /* reserved for future */
385};
386
387enum {
388 SNDRV_PCM_TSTAMP_NONE = 0,
389 SNDRV_PCM_TSTAMP_ENABLE,
390 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
391};
392
393struct snd_pcm_sw_params {
394 int tstamp_mode; /* timestamp mode */
395 unsigned int period_step;
396 unsigned int sleep_min; /* min ticks to sleep */
397 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
398 snd_pcm_uframes_t xfer_align; /* obsolete: xfer size need to be a multiple */
399 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
400 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
401 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
402 snd_pcm_uframes_t silence_size; /* silence block size */
403 snd_pcm_uframes_t boundary; /* pointers wrap point */
404 unsigned char reserved[64]; /* reserved for future */
405};
406
407struct snd_pcm_channel_info {
408 unsigned int channel;
409 __kernel_off_t offset; /* mmap offset */
410 unsigned int first; /* offset to first sample in bits */
411 unsigned int step; /* samples distance in bits */
412};
413
414struct snd_pcm_status {
415 snd_pcm_state_t state; /* stream state */
416 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
417 struct timespec tstamp; /* reference timestamp */
418 snd_pcm_uframes_t appl_ptr; /* appl ptr */
419 snd_pcm_uframes_t hw_ptr; /* hw ptr */
420 snd_pcm_sframes_t delay; /* current delay in frames */
421 snd_pcm_uframes_t avail; /* number of frames available */
422 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
423 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
424 snd_pcm_state_t suspended_state; /* suspended stream state */
425 unsigned char reserved[60]; /* must be filled with zero */
426};
427
428struct snd_pcm_mmap_status {
429 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
430 int pad1; /* Needed for 64 bit alignment */
431 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
432 struct timespec tstamp; /* Timestamp */
433 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
434};
435
436struct snd_pcm_mmap_control {
437 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
438 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
439};
440
441#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
442#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
443#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
444
445struct snd_pcm_sync_ptr {
446 unsigned int flags;
447 union {
448 struct snd_pcm_mmap_status status;
449 unsigned char reserved[64];
450 } s;
451 union {
452 struct snd_pcm_mmap_control control;
453 unsigned char reserved[64];
454 } c;
455};
456
457struct snd_xferi {
458 snd_pcm_sframes_t result;
459 void __user *buf;
460 snd_pcm_uframes_t frames;
461};
462
463struct snd_xfern {
464 snd_pcm_sframes_t result;
465 void __user * __user *bufs;
466 snd_pcm_uframes_t frames;
467};
468
469enum {
470 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
471 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */
472 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
473};
474
475/* channel positions */
476enum {
477 SNDRV_CHMAP_UNKNOWN = 0,
478 SNDRV_CHMAP_NA, /* N/A, silent */
479 SNDRV_CHMAP_MONO, /* mono stream */
480 /* this follows the alsa-lib mixer channel value + 3 */
481 SNDRV_CHMAP_FL, /* front left */
482 SNDRV_CHMAP_FR, /* front right */
483 SNDRV_CHMAP_RL, /* rear left */
484 SNDRV_CHMAP_RR, /* rear right */
485 SNDRV_CHMAP_FC, /* front center */
486 SNDRV_CHMAP_LFE, /* LFE */
487 SNDRV_CHMAP_SL, /* side left */
488 SNDRV_CHMAP_SR, /* side right */
489 SNDRV_CHMAP_RC, /* rear center */
490 /* new definitions */
491 SNDRV_CHMAP_FLC, /* front left center */
492 SNDRV_CHMAP_FRC, /* front right center */
493 SNDRV_CHMAP_RLC, /* rear left center */
494 SNDRV_CHMAP_RRC, /* rear right center */
495 SNDRV_CHMAP_FLW, /* front left wide */
496 SNDRV_CHMAP_FRW, /* front right wide */
497 SNDRV_CHMAP_FLH, /* front left high */
498 SNDRV_CHMAP_FCH, /* front center high */
499 SNDRV_CHMAP_FRH, /* front right high */
500 SNDRV_CHMAP_TC, /* top center */
501 SNDRV_CHMAP_TFL, /* top front left */
502 SNDRV_CHMAP_TFR, /* top front right */
503 SNDRV_CHMAP_TFC, /* top front center */
504 SNDRV_CHMAP_TRL, /* top rear left */
505 SNDRV_CHMAP_TRR, /* top rear right */
506 SNDRV_CHMAP_TRC, /* top rear center */
507 SNDRV_CHMAP_LAST = SNDRV_CHMAP_TRC,
508};
509
510#define SNDRV_CHMAP_POSITION_MASK 0xffff
511#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
512#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
513
514#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
515#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
516#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
517#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
518#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
519#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
520#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
521#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
522#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
523#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
524#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
525#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
526#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
527#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
528#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
529#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
530#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
531#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
532#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
533#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
534#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
535#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
536#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
537#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
538#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
539#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
540#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
541#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
542#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
543
544/*****************************************************************************
545 * *
546 * MIDI v1.0 interface *
547 * *
548 *****************************************************************************/
549
550/*
551 * Raw MIDI section - /dev/snd/midi??
552 */
553
554#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
555
556enum {
557 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
558 SNDRV_RAWMIDI_STREAM_INPUT,
559 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
560};
561
562#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
563#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
564#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
565
566struct snd_rawmidi_info {
567 unsigned int device; /* RO/WR (control): device number */
568 unsigned int subdevice; /* RO/WR (control): subdevice number */
569 int stream; /* WR: stream */
570 int card; /* R: card number */
571 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
572 unsigned char id[64]; /* ID (user selectable) */
573 unsigned char name[80]; /* name of device */
574 unsigned char subname[32]; /* name of active or selected subdevice */
575 unsigned int subdevices_count;
576 unsigned int subdevices_avail;
577 unsigned char reserved[64]; /* reserved for future use */
578};
579
580struct snd_rawmidi_params {
581 int stream;
582 size_t buffer_size; /* queue size in bytes */
583 size_t avail_min; /* minimum avail bytes for wakeup */
584 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
585 unsigned char reserved[16]; /* reserved for future use */
586};
587
588struct snd_rawmidi_status {
589 int stream;
590 struct timespec tstamp; /* Timestamp */
591 size_t avail; /* available bytes */
592 size_t xruns; /* count of overruns since last status (in bytes) */
593 unsigned char reserved[16]; /* reserved for future use */
594};
595
596#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
597#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
598#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
599#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
600#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
601#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
602
603/*
604 * Timer section - /dev/snd/timer
605 */
606
607#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
608
609enum {
610 SNDRV_TIMER_CLASS_NONE = -1,
611 SNDRV_TIMER_CLASS_SLAVE = 0,
612 SNDRV_TIMER_CLASS_GLOBAL,
613 SNDRV_TIMER_CLASS_CARD,
614 SNDRV_TIMER_CLASS_PCM,
615 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
616};
617
618/* slave timer classes */
619enum {
620 SNDRV_TIMER_SCLASS_NONE = 0,
621 SNDRV_TIMER_SCLASS_APPLICATION,
622 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
623 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
624 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
625};
626
627/* global timers (device member) */
628#define SNDRV_TIMER_GLOBAL_SYSTEM 0
629#define SNDRV_TIMER_GLOBAL_RTC 1
630#define SNDRV_TIMER_GLOBAL_HPET 2
631#define SNDRV_TIMER_GLOBAL_HRTIMER 3
632
633/* info flags */
634#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
635
636struct snd_timer_id {
637 int dev_class;
638 int dev_sclass;
639 int card;
640 int device;
641 int subdevice;
642};
643
644struct snd_timer_ginfo {
645 struct snd_timer_id tid; /* requested timer ID */
646 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
647 int card; /* card number */
648 unsigned char id[64]; /* timer identification */
649 unsigned char name[80]; /* timer name */
650 unsigned long reserved0; /* reserved for future use */
651 unsigned long resolution; /* average period resolution in ns */
652 unsigned long resolution_min; /* minimal period resolution in ns */
653 unsigned long resolution_max; /* maximal period resolution in ns */
654 unsigned int clients; /* active timer clients */
655 unsigned char reserved[32];
656};
657
658struct snd_timer_gparams {
659 struct snd_timer_id tid; /* requested timer ID */
660 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
661 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
662 unsigned char reserved[32];
663};
664
665struct snd_timer_gstatus {
666 struct snd_timer_id tid; /* requested timer ID */
667 unsigned long resolution; /* current period resolution in ns */
668 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
669 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
670 unsigned char reserved[32];
671};
672
673struct snd_timer_select {
674 struct snd_timer_id id; /* bind to timer ID */
675 unsigned char reserved[32]; /* reserved */
676};
677
678struct snd_timer_info {
679 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
680 int card; /* card number */
681 unsigned char id[64]; /* timer identificator */
682 unsigned char name[80]; /* timer name */
683 unsigned long reserved0; /* reserved for future use */
684 unsigned long resolution; /* average period resolution in ns */
685 unsigned char reserved[64]; /* reserved */
686};
687
688#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
689#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
690#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
691
692struct snd_timer_params {
693 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
694 unsigned int ticks; /* requested resolution in ticks */
695 unsigned int queue_size; /* total size of queue (32-1024) */
696 unsigned int reserved0; /* reserved, was: failure locations */
697 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
698 unsigned char reserved[60]; /* reserved */
699};
700
701struct snd_timer_status {
702 struct timespec tstamp; /* Timestamp - last update */
703 unsigned int resolution; /* current period resolution in ns */
704 unsigned int lost; /* counter of master tick lost */
705 unsigned int overrun; /* count of read queue overruns */
706 unsigned int queue; /* used queue size */
707 unsigned char reserved[64]; /* reserved */
708};
709
710#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
711#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
712#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
713#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
714#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
715#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
716#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
717#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
718#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
719#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
720/* The following four ioctls are changed since 1.0.9 due to confliction */
721#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
722#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
723#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
724#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
725
726struct snd_timer_read {
727 unsigned int resolution;
728 unsigned int ticks;
729};
730
731enum {
732 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
733 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
734 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
735 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
736 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
737 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
738 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
739 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
740 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
741 /* master timer events for slave timer instances */
742 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
743 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
744 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
745 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
746 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
747 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
748};
749
750struct snd_timer_tread {
751 int event;
752 struct timespec tstamp;
753 unsigned int val;
754};
755
756/****************************************************************************
757 * *
758 * Section for driver control interface - /dev/snd/control? *
759 * *
760 ****************************************************************************/
761
762#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
763
764struct snd_ctl_card_info {
765 int card; /* card number */
766 int pad; /* reserved for future (was type) */
767 unsigned char id[16]; /* ID of card (user selectable) */
768 unsigned char driver[16]; /* Driver name */
769 unsigned char name[32]; /* Short name of soundcard */
770 unsigned char longname[80]; /* name + info text about soundcard */
771 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
772 unsigned char mixername[80]; /* visual mixer identification */
773 unsigned char components[128]; /* card components / fine identification, delimited with one space (AC97 etc..) */
774};
775
776typedef int __bitwise snd_ctl_elem_type_t;
777#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
778#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
779#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
780#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
781#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
782#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
783#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
784#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
785
786typedef int __bitwise snd_ctl_elem_iface_t;
787#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
788#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
789#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
790#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
791#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
792#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
793#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
794#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
795
796#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
797#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
798#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
799#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
800#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3) /* when was control changed */
801#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
802#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
803#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
804#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */
805#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
806#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
807#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
808#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */
809#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
810/* bits 30 and 31 are obsoleted (for indirect access) */
811
812/* for further details see the ACPI and PCI power management specification */
813#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
814#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
815#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
816#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
817#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
818#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
819
820struct snd_ctl_elem_id {
821 unsigned int numid; /* numeric identifier, zero = invalid */
822 snd_ctl_elem_iface_t iface; /* interface identifier */
823 unsigned int device; /* device/client number */
824 unsigned int subdevice; /* subdevice (substream) number */
825 unsigned char name[44]; /* ASCII name of item */
826 unsigned int index; /* index of item */
827};
828
829struct snd_ctl_elem_list {
830 unsigned int offset; /* W: first element ID to get */
831 unsigned int space; /* W: count of element IDs to get */
832 unsigned int used; /* R: count of element IDs set */
833 unsigned int count; /* R: count of all elements */
834 struct snd_ctl_elem_id __user *pids; /* R: IDs */
835 unsigned char reserved[50];
836};
837
838struct snd_ctl_elem_info {
839 struct snd_ctl_elem_id id; /* W: element ID */
840 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
841 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
842 unsigned int count; /* count of values */
843 __kernel_pid_t owner; /* owner's PID of this control */
844 union {
845 struct {
846 long min; /* R: minimum value */
847 long max; /* R: maximum value */
848 long step; /* R: step (0 variable) */
849 } integer;
850 struct {
851 long long min; /* R: minimum value */
852 long long max; /* R: maximum value */
853 long long step; /* R: step (0 variable) */
854 } integer64;
855 struct {
856 unsigned int items; /* R: number of items */
857 unsigned int item; /* W: item number */
858 char name[64]; /* R: value name */
859 __u64 names_ptr; /* W: names list (ELEM_ADD only) */
860 unsigned int names_length;
861 } enumerated;
862 unsigned char reserved[128];
863 } value;
864 union {
865 unsigned short d[4]; /* dimensions */
866 unsigned short *d_ptr; /* indirect - obsoleted */
867 } dimen;
868 unsigned char reserved[64-4*sizeof(unsigned short)];
869};
870
871struct snd_ctl_elem_value {
872 struct snd_ctl_elem_id id; /* W: element ID */
873 unsigned int indirect: 1; /* W: indirect access - obsoleted */
874 union {
875 union {
876 long value[128];
877 long *value_ptr; /* obsoleted */
878 } integer;
879 union {
880 long long value[64];
881 long long *value_ptr; /* obsoleted */
882 } integer64;
883 union {
884 unsigned int item[128];
885 unsigned int *item_ptr; /* obsoleted */
886 } enumerated;
887 union {
888 unsigned char data[512];
889 unsigned char *data_ptr; /* obsoleted */
890 } bytes;
891 struct snd_aes_iec958 iec958;
892 } value; /* RO */
893 struct timespec tstamp;
894 unsigned char reserved[128-sizeof(struct timespec)];
895};
896
897struct snd_ctl_tlv {
898 unsigned int numid; /* control element numeric identification */
899 unsigned int length; /* in bytes aligned to 4 */
900 unsigned int tlv[0]; /* first TLV */
901};
902
903#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
904#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
905#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
906#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
907#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
908#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
909#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
910#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
911#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
912#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
913#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
914#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
915#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
916#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
917#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
918#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
919#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
920#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
921#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
922#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
923#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
924#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
925#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
926#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
927#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
928
929/*
930 * Read interface.
931 */
932
933enum sndrv_ctl_event_type {
934 SNDRV_CTL_EVENT_ELEM = 0,
935 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
936};
937
938#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
939#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
940#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
941#define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */
942#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
943
944struct snd_ctl_event {
945 int type; /* event type - SNDRV_CTL_EVENT_* */
946 union {
947 struct {
948 unsigned int mask;
949 struct snd_ctl_elem_id id;
950 } elem;
951 unsigned char data8[60];
952 } data;
953};
954
955/*
956 * Control names
957 */
958
959#define SNDRV_CTL_NAME_NONE ""
960#define SNDRV_CTL_NAME_PLAYBACK "Playback "
961#define SNDRV_CTL_NAME_CAPTURE "Capture "
962
963#define SNDRV_CTL_NAME_IEC958_NONE ""
964#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
965#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
966#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
967#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
968#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
969#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
970#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
971#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
972
973#endif /* __SOUND_ASOUND_H */ 40#endif /* __SOUND_ASOUND_H */
diff --git a/include/sound/emu10k1.h b/include/sound/emu10k1.h
index 1a33f48ebe78..3707288ae9bf 100644
--- a/include/sound/emu10k1.h
+++ b/include/sound/emu10k1.h
@@ -1,8 +1,3 @@
1#ifndef __SOUND_EMU10K1_H
2#define __SOUND_EMU10K1_H
3
4#include <linux/types.h>
5
6/* 1/*
7 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>, 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
8 * Creative Labs, Inc. 3 * Creative Labs, Inc.
@@ -24,8 +19,9 @@
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * 20 *
26 */ 21 */
22#ifndef __SOUND_EMU10K1_H
23#define __SOUND_EMU10K1_H
27 24
28#ifdef __KERNEL__
29 25
30#include <sound/pcm.h> 26#include <sound/pcm.h>
31#include <sound/rawmidi.h> 27#include <sound/rawmidi.h>
@@ -38,6 +34,7 @@
38#include <linux/mutex.h> 34#include <linux/mutex.h>
39 35
40#include <asm/io.h> 36#include <asm/io.h>
37#include <uapi/sound/emu10k1.h>
41 38
42/* ------------------- DEFINES -------------------- */ 39/* ------------------- DEFINES -------------------- */
43 40
@@ -1899,350 +1896,4 @@ int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
1899int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu, 1896int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
1900 struct snd_emu10k1_fx8010_irq *irq); 1897 struct snd_emu10k1_fx8010_irq *irq);
1901 1898
1902#endif /* __KERNEL__ */
1903
1904/*
1905 * ---- FX8010 ----
1906 */
1907
1908#define EMU10K1_CARD_CREATIVE 0x00000000
1909#define EMU10K1_CARD_EMUAPS 0x00000001
1910
1911#define EMU10K1_FX8010_PCM_COUNT 8
1912
1913/* instruction set */
1914#define iMAC0 0x00 /* R = A + (X * Y >> 31) ; saturation */
1915#define iMAC1 0x01 /* R = A + (-X * Y >> 31) ; saturation */
1916#define iMAC2 0x02 /* R = A + (X * Y >> 31) ; wraparound */
1917#define iMAC3 0x03 /* R = A + (-X * Y >> 31) ; wraparound */
1918#define iMACINT0 0x04 /* R = A + X * Y ; saturation */
1919#define iMACINT1 0x05 /* R = A + X * Y ; wraparound (31-bit) */
1920#define iACC3 0x06 /* R = A + X + Y ; saturation */
1921#define iMACMV 0x07 /* R = A, acc += X * Y >> 31 */
1922#define iANDXOR 0x08 /* R = (A & X) ^ Y */
1923#define iTSTNEG 0x09 /* R = (A >= Y) ? X : ~X */
1924#define iLIMITGE 0x0a /* R = (A >= Y) ? X : Y */
1925#define iLIMITLT 0x0b /* R = (A < Y) ? X : Y */
1926#define iLOG 0x0c /* R = linear_data, A (log_data), X (max_exp), Y (format_word) */
1927#define iEXP 0x0d /* R = log_data, A (linear_data), X (max_exp), Y (format_word) */
1928#define iINTERP 0x0e /* R = A + (X * (Y - A) >> 31) ; saturation */
1929#define iSKIP 0x0f /* R = A (cc_reg), X (count), Y (cc_test) */
1930
1931/* GPRs */
1932#define FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x0f */
1933#define EXTIN(x) (0x10 + (x)) /* x = 0x00 - 0x0f */
1934#define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f physical outs -> FXWC low 16 bits */
1935#define FXBUS2(x) (0x30 + (x)) /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bits */
1936 /* NB: 0x31 and 0x32 are shared with Center/LFE on SB live 5.1 */
1937
1938#define C_00000000 0x40
1939#define C_00000001 0x41
1940#define C_00000002 0x42
1941#define C_00000003 0x43
1942#define C_00000004 0x44
1943#define C_00000008 0x45
1944#define C_00000010 0x46
1945#define C_00000020 0x47
1946#define C_00000100 0x48
1947#define C_00010000 0x49
1948#define C_00080000 0x4a
1949#define C_10000000 0x4b
1950#define C_20000000 0x4c
1951#define C_40000000 0x4d
1952#define C_80000000 0x4e
1953#define C_7fffffff 0x4f
1954#define C_ffffffff 0x50
1955#define C_fffffffe 0x51
1956#define C_c0000000 0x52
1957#define C_4f1bbcdc 0x53
1958#define C_5a7ef9db 0x54
1959#define C_00100000 0x55 /* ?? */
1960#define GPR_ACCU 0x56 /* ACCUM, accumulator */
1961#define GPR_COND 0x57 /* CCR, condition register */
1962#define GPR_NOISE0 0x58 /* noise source */
1963#define GPR_NOISE1 0x59 /* noise source */
1964#define GPR_IRQ 0x5a /* IRQ register */
1965#define GPR_DBAC 0x5b /* TRAM Delay Base Address Counter */
1966#define GPR(x) (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */
1967#define ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
1968#define ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
1969#define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
1970#define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
1971
1972#define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
1973#define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
1974#define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
1975#define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
1976#define A_ITRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
1977#define A_ETRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
1978
1979#define A_FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x3f FX buses */
1980#define A_EXTIN(x) (0x40 + (x)) /* x = 0x00 - 0x0f physical ins */
1981#define A_P16VIN(x) (0x50 + (x)) /* x = 0x00 - 0x0f p16v ins (A2 only) "EMU32 inputs" */
1982#define A_EXTOUT(x) (0x60 + (x)) /* x = 0x00 - 0x1f physical outs -> A_FXWC1 0x79-7f unknown */
1983#define A_FXBUS2(x) (0x80 + (x)) /* x = 0x00 - 0x1f extra outs used for EFX capture -> A_FXWC2 */
1984#define A_EMU32OUTH(x) (0xa0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_10 - _1F" - ??? */
1985#define A_EMU32OUTL(x) (0xb0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_1 - _F" - ??? */
1986#define A3_EMU32IN(x) (0x160 + (x)) /* x = 0x00 - 0x3f "EMU32_IN_00 - _3F" - Only when .device = 0x0008 */
1987#define A3_EMU32OUT(x) (0x1E0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_00 - _3F" - Only when .device = 0x0008 */
1988#define A_GPR(x) (A_FXGPREGBASE + (x))
1989
1990/* cc_reg constants */
1991#define CC_REG_NORMALIZED C_00000001
1992#define CC_REG_BORROW C_00000002
1993#define CC_REG_MINUS C_00000004
1994#define CC_REG_ZERO C_00000008
1995#define CC_REG_SATURATE C_00000010
1996#define CC_REG_NONZERO C_00000100
1997
1998/* FX buses */
1999#define FXBUS_PCM_LEFT 0x00
2000#define FXBUS_PCM_RIGHT 0x01
2001#define FXBUS_PCM_LEFT_REAR 0x02
2002#define FXBUS_PCM_RIGHT_REAR 0x03
2003#define FXBUS_MIDI_LEFT 0x04
2004#define FXBUS_MIDI_RIGHT 0x05
2005#define FXBUS_PCM_CENTER 0x06
2006#define FXBUS_PCM_LFE 0x07
2007#define FXBUS_PCM_LEFT_FRONT 0x08
2008#define FXBUS_PCM_RIGHT_FRONT 0x09
2009#define FXBUS_MIDI_REVERB 0x0c
2010#define FXBUS_MIDI_CHORUS 0x0d
2011#define FXBUS_PCM_LEFT_SIDE 0x0e
2012#define FXBUS_PCM_RIGHT_SIDE 0x0f
2013#define FXBUS_PT_LEFT 0x14
2014#define FXBUS_PT_RIGHT 0x15
2015
2016/* Inputs */
2017#define EXTIN_AC97_L 0x00 /* AC'97 capture channel - left */
2018#define EXTIN_AC97_R 0x01 /* AC'97 capture channel - right */
2019#define EXTIN_SPDIF_CD_L 0x02 /* internal S/PDIF CD - onboard - left */
2020#define EXTIN_SPDIF_CD_R 0x03 /* internal S/PDIF CD - onboard - right */
2021#define EXTIN_ZOOM_L 0x04 /* Zoom Video I2S - left */
2022#define EXTIN_ZOOM_R 0x05 /* Zoom Video I2S - right */
2023#define EXTIN_TOSLINK_L 0x06 /* LiveDrive - TOSLink Optical - left */
2024#define EXTIN_TOSLINK_R 0x07 /* LiveDrive - TOSLink Optical - right */
2025#define EXTIN_LINE1_L 0x08 /* LiveDrive - Line/Mic 1 - left */
2026#define EXTIN_LINE1_R 0x09 /* LiveDrive - Line/Mic 1 - right */
2027#define EXTIN_COAX_SPDIF_L 0x0a /* LiveDrive - Coaxial S/PDIF - left */
2028#define EXTIN_COAX_SPDIF_R 0x0b /* LiveDrive - Coaxial S/PDIF - right */
2029#define EXTIN_LINE2_L 0x0c /* LiveDrive - Line/Mic 2 - left */
2030#define EXTIN_LINE2_R 0x0d /* LiveDrive - Line/Mic 2 - right */
2031
2032/* Outputs */
2033#define EXTOUT_AC97_L 0x00 /* AC'97 playback channel - left */
2034#define EXTOUT_AC97_R 0x01 /* AC'97 playback channel - right */
2035#define EXTOUT_TOSLINK_L 0x02 /* LiveDrive - TOSLink Optical - left */
2036#define EXTOUT_TOSLINK_R 0x03 /* LiveDrive - TOSLink Optical - right */
2037#define EXTOUT_AC97_CENTER 0x04 /* SB Live 5.1 - center */
2038#define EXTOUT_AC97_LFE 0x05 /* SB Live 5.1 - LFE */
2039#define EXTOUT_HEADPHONE_L 0x06 /* LiveDrive - Headphone - left */
2040#define EXTOUT_HEADPHONE_R 0x07 /* LiveDrive - Headphone - right */
2041#define EXTOUT_REAR_L 0x08 /* Rear channel - left */
2042#define EXTOUT_REAR_R 0x09 /* Rear channel - right */
2043#define EXTOUT_ADC_CAP_L 0x0a /* ADC Capture buffer - left */
2044#define EXTOUT_ADC_CAP_R 0x0b /* ADC Capture buffer - right */
2045#define EXTOUT_MIC_CAP 0x0c /* MIC Capture buffer */
2046#define EXTOUT_AC97_REAR_L 0x0d /* SB Live 5.1 (c) 2003 - Rear Left */
2047#define EXTOUT_AC97_REAR_R 0x0e /* SB Live 5.1 (c) 2003 - Rear Right */
2048#define EXTOUT_ACENTER 0x11 /* Analog Center */
2049#define EXTOUT_ALFE 0x12 /* Analog LFE */
2050
2051/* Audigy Inputs */
2052#define A_EXTIN_AC97_L 0x00 /* AC'97 capture channel - left */
2053#define A_EXTIN_AC97_R 0x01 /* AC'97 capture channel - right */
2054#define A_EXTIN_SPDIF_CD_L 0x02 /* digital CD left */
2055#define A_EXTIN_SPDIF_CD_R 0x03 /* digital CD left */
2056#define A_EXTIN_OPT_SPDIF_L 0x04 /* audigy drive Optical SPDIF - left */
2057#define A_EXTIN_OPT_SPDIF_R 0x05 /* right */
2058#define A_EXTIN_LINE2_L 0x08 /* audigy drive line2/mic2 - left */
2059#define A_EXTIN_LINE2_R 0x09 /* right */
2060#define A_EXTIN_ADC_L 0x0a /* Philips ADC - left */
2061#define A_EXTIN_ADC_R 0x0b /* right */
2062#define A_EXTIN_AUX2_L 0x0c /* audigy drive aux2 - left */
2063#define A_EXTIN_AUX2_R 0x0d /* - right */
2064
2065/* Audigiy Outputs */
2066#define A_EXTOUT_FRONT_L 0x00 /* digital front left */
2067#define A_EXTOUT_FRONT_R 0x01 /* right */
2068#define A_EXTOUT_CENTER 0x02 /* digital front center */
2069#define A_EXTOUT_LFE 0x03 /* digital front lfe */
2070#define A_EXTOUT_HEADPHONE_L 0x04 /* headphone audigy drive left */
2071#define A_EXTOUT_HEADPHONE_R 0x05 /* right */
2072#define A_EXTOUT_REAR_L 0x06 /* digital rear left */
2073#define A_EXTOUT_REAR_R 0x07 /* right */
2074#define A_EXTOUT_AFRONT_L 0x08 /* analog front left */
2075#define A_EXTOUT_AFRONT_R 0x09 /* right */
2076#define A_EXTOUT_ACENTER 0x0a /* analog center */
2077#define A_EXTOUT_ALFE 0x0b /* analog LFE */
2078#define A_EXTOUT_ASIDE_L 0x0c /* analog side left - Audigy 2 ZS */
2079#define A_EXTOUT_ASIDE_R 0x0d /* right - Audigy 2 ZS */
2080#define A_EXTOUT_AREAR_L 0x0e /* analog rear left */
2081#define A_EXTOUT_AREAR_R 0x0f /* right */
2082#define A_EXTOUT_AC97_L 0x10 /* AC97 left (front) */
2083#define A_EXTOUT_AC97_R 0x11 /* right */
2084#define A_EXTOUT_ADC_CAP_L 0x16 /* ADC capture buffer left */
2085#define A_EXTOUT_ADC_CAP_R 0x17 /* right */
2086#define A_EXTOUT_MIC_CAP 0x18 /* Mic capture buffer */
2087
2088/* Audigy constants */
2089#define A_C_00000000 0xc0
2090#define A_C_00000001 0xc1
2091#define A_C_00000002 0xc2
2092#define A_C_00000003 0xc3
2093#define A_C_00000004 0xc4
2094#define A_C_00000008 0xc5
2095#define A_C_00000010 0xc6
2096#define A_C_00000020 0xc7
2097#define A_C_00000100 0xc8
2098#define A_C_00010000 0xc9
2099#define A_C_00000800 0xca
2100#define A_C_10000000 0xcb
2101#define A_C_20000000 0xcc
2102#define A_C_40000000 0xcd
2103#define A_C_80000000 0xce
2104#define A_C_7fffffff 0xcf
2105#define A_C_ffffffff 0xd0
2106#define A_C_fffffffe 0xd1
2107#define A_C_c0000000 0xd2
2108#define A_C_4f1bbcdc 0xd3
2109#define A_C_5a7ef9db 0xd4
2110#define A_C_00100000 0xd5
2111#define A_GPR_ACCU 0xd6 /* ACCUM, accumulator */
2112#define A_GPR_COND 0xd7 /* CCR, condition register */
2113#define A_GPR_NOISE0 0xd8 /* noise source */
2114#define A_GPR_NOISE1 0xd9 /* noise source */
2115#define A_GPR_IRQ 0xda /* IRQ register */
2116#define A_GPR_DBAC 0xdb /* TRAM Delay Base Address Counter - internal */
2117#define A_GPR_DBACE 0xde /* TRAM Delay Base Address Counter - external */
2118
2119/* definitions for debug register */
2120#define EMU10K1_DBG_ZC 0x80000000 /* zero tram counter */
2121#define EMU10K1_DBG_SATURATION_OCCURED 0x02000000 /* saturation control */
2122#define EMU10K1_DBG_SATURATION_ADDR 0x01ff0000 /* saturation address */
2123#define EMU10K1_DBG_SINGLE_STEP 0x00008000 /* single step mode */
2124#define EMU10K1_DBG_STEP 0x00004000 /* start single step */
2125#define EMU10K1_DBG_CONDITION_CODE 0x00003e00 /* condition code */
2126#define EMU10K1_DBG_SINGLE_STEP_ADDR 0x000001ff /* single step address */
2127
2128/* tank memory address line */
2129#ifndef __KERNEL__
2130#define TANKMEMADDRREG_ADDR_MASK 0x000fffff /* 20 bit tank address field */
2131#define TANKMEMADDRREG_CLEAR 0x00800000 /* Clear tank memory */
2132#define TANKMEMADDRREG_ALIGN 0x00400000 /* Align read or write relative to tank access */
2133#define TANKMEMADDRREG_WRITE 0x00200000 /* Write to tank memory */
2134#define TANKMEMADDRREG_READ 0x00100000 /* Read from tank memory */
2135#endif
2136
2137struct snd_emu10k1_fx8010_info {
2138 unsigned int internal_tram_size; /* in samples */
2139 unsigned int external_tram_size; /* in samples */
2140 char fxbus_names[16][32]; /* names of FXBUSes */
2141 char extin_names[16][32]; /* names of external inputs */
2142 char extout_names[32][32]; /* names of external outputs */
2143 unsigned int gpr_controls; /* count of GPR controls */
2144};
2145
2146#define EMU10K1_GPR_TRANSLATION_NONE 0
2147#define EMU10K1_GPR_TRANSLATION_TABLE100 1
2148#define EMU10K1_GPR_TRANSLATION_BASS 2
2149#define EMU10K1_GPR_TRANSLATION_TREBLE 3
2150#define EMU10K1_GPR_TRANSLATION_ONOFF 4
2151
2152struct snd_emu10k1_fx8010_control_gpr {
2153 struct snd_ctl_elem_id id; /* full control ID definition */
2154 unsigned int vcount; /* visible count */
2155 unsigned int count; /* count of GPR (1..16) */
2156 unsigned short gpr[32]; /* GPR number(s) */
2157 unsigned int value[32]; /* initial values */
2158 unsigned int min; /* minimum range */
2159 unsigned int max; /* maximum range */
2160 unsigned int translation; /* translation type (EMU10K1_GPR_TRANSLATION*) */
2161 const unsigned int *tlv;
2162};
2163
2164/* old ABI without TLV support */
2165struct snd_emu10k1_fx8010_control_old_gpr {
2166 struct snd_ctl_elem_id id;
2167 unsigned int vcount;
2168 unsigned int count;
2169 unsigned short gpr[32];
2170 unsigned int value[32];
2171 unsigned int min;
2172 unsigned int max;
2173 unsigned int translation;
2174};
2175
2176struct snd_emu10k1_fx8010_code {
2177 char name[128];
2178
2179 DECLARE_BITMAP(gpr_valid, 0x200); /* bitmask of valid initializers */
2180 __u32 __user *gpr_map; /* initializers */
2181
2182 unsigned int gpr_add_control_count; /* count of GPR controls to add/replace */
2183 struct snd_emu10k1_fx8010_control_gpr __user *gpr_add_controls; /* GPR controls to add/replace */
2184
2185 unsigned int gpr_del_control_count; /* count of GPR controls to remove */
2186 struct snd_ctl_elem_id __user *gpr_del_controls; /* IDs of GPR controls to remove */
2187
2188 unsigned int gpr_list_control_count; /* count of GPR controls to list */
2189 unsigned int gpr_list_control_total; /* total count of GPR controls */
2190 struct snd_emu10k1_fx8010_control_gpr __user *gpr_list_controls; /* listed GPR controls */
2191
2192 DECLARE_BITMAP(tram_valid, 0x100); /* bitmask of valid initializers */
2193 __u32 __user *tram_data_map; /* data initializers */
2194 __u32 __user *tram_addr_map; /* map initializers */
2195
2196 DECLARE_BITMAP(code_valid, 1024); /* bitmask of valid instructions */
2197 __u32 __user *code; /* one instruction - 64 bits */
2198};
2199
2200struct snd_emu10k1_fx8010_tram {
2201 unsigned int address; /* 31.bit == 1 -> external TRAM */
2202 unsigned int size; /* size in samples (4 bytes) */
2203 unsigned int *samples; /* pointer to samples (20-bit) */
2204 /* NULL->clear memory */
2205};
2206
2207struct snd_emu10k1_fx8010_pcm_rec {
2208 unsigned int substream; /* substream number */
2209 unsigned int res1; /* reserved */
2210 unsigned int channels; /* 16-bit channels count, zero = remove this substream */
2211 unsigned int tram_start; /* ring buffer position in TRAM (in samples) */
2212 unsigned int buffer_size; /* count of buffered samples */
2213 unsigned short gpr_size; /* GPR containing size of ringbuffer in samples (host) */
2214 unsigned short gpr_ptr; /* GPR containing current pointer in the ring buffer (host = reset, FX8010) */
2215 unsigned short gpr_count; /* GPR containing count of samples between two interrupts (host) */
2216 unsigned short gpr_tmpcount; /* GPR containing current count of samples to interrupt (host = set, FX8010) */
2217 unsigned short gpr_trigger; /* GPR containing trigger (activate) information (host) */
2218 unsigned short gpr_running; /* GPR containing info if PCM is running (FX8010) */
2219 unsigned char pad; /* reserved */
2220 unsigned char etram[32]; /* external TRAM address & data (one per channel) */
2221 unsigned int res2; /* reserved */
2222};
2223
2224#define SNDRV_EMU10K1_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
2225
2226#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, struct snd_emu10k1_fx8010_info)
2227#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, struct snd_emu10k1_fx8010_code)
2228#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, struct snd_emu10k1_fx8010_code)
2229#define SNDRV_EMU10K1_IOCTL_TRAM_SETUP _IOW ('H', 0x20, int)
2230#define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW ('H', 0x21, struct snd_emu10k1_fx8010_tram)
2231#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, struct snd_emu10k1_fx8010_tram)
2232#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, struct snd_emu10k1_fx8010_pcm_rec)
2233#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, struct snd_emu10k1_fx8010_pcm_rec)
2234#define SNDRV_EMU10K1_IOCTL_PVERSION _IOR ('H', 0x40, int)
2235#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80)
2236#define SNDRV_EMU10K1_IOCTL_CONTINUE _IO ('H', 0x81)
2237#define SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER _IO ('H', 0x82)
2238#define SNDRV_EMU10K1_IOCTL_SINGLE_STEP _IOW ('H', 0x83, int)
2239#define SNDRV_EMU10K1_IOCTL_DBG_READ _IOR ('H', 0x84, int)
2240
2241/* typedefs for compatibility to user-space */
2242typedef struct snd_emu10k1_fx8010_info emu10k1_fx8010_info_t;
2243typedef struct snd_emu10k1_fx8010_control_gpr emu10k1_fx8010_control_gpr_t;
2244typedef struct snd_emu10k1_fx8010_code emu10k1_fx8010_code_t;
2245typedef struct snd_emu10k1_fx8010_tram emu10k1_fx8010_tram_t;
2246typedef struct snd_emu10k1_fx8010_pcm_rec emu10k1_fx8010_pcm_t;
2247
2248#endif /* __SOUND_EMU10K1_H */ 1899#endif /* __SOUND_EMU10K1_H */
diff --git a/include/sound/sb16_csp.h b/include/sound/sb16_csp.h
index 7e950560e591..c7c7788005e4 100644
--- a/include/sound/sb16_csp.h
+++ b/include/sound/sb16_csp.h
@@ -1,6 +1,3 @@
1#ifndef __SOUND_SB16_CSP_H
2#define __SOUND_SB16_CSP_H
3
4/* 1/*
5 * Copyright (c) 1999 by Uros Bizjak <uros@kss-loka.si> 2 * Copyright (c) 1999 by Uros Bizjak <uros@kss-loka.si>
6 * Takashi Iwai <tiwai@suse.de> 3 * Takashi Iwai <tiwai@suse.de>
@@ -22,106 +19,13 @@
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 * 20 *
24 */ 21 */
22#ifndef __SOUND_SB16_CSP_H
23#define __SOUND_SB16_CSP_H
25 24
26/* CSP modes */
27#define SNDRV_SB_CSP_MODE_NONE 0x00
28#define SNDRV_SB_CSP_MODE_DSP_READ 0x01 /* Record from DSP */
29#define SNDRV_SB_CSP_MODE_DSP_WRITE 0x02 /* Play to DSP */
30#define SNDRV_SB_CSP_MODE_QSOUND 0x04 /* QSound */
31
32/* CSP load flags */
33#define SNDRV_SB_CSP_LOAD_FROMUSER 0x01
34#define SNDRV_SB_CSP_LOAD_INITBLOCK 0x02
35
36/* CSP sample width */
37#define SNDRV_SB_CSP_SAMPLE_8BIT 0x01
38#define SNDRV_SB_CSP_SAMPLE_16BIT 0x02
39
40/* CSP channels */
41#define SNDRV_SB_CSP_MONO 0x01
42#define SNDRV_SB_CSP_STEREO 0x02
43
44/* CSP rates */
45#define SNDRV_SB_CSP_RATE_8000 0x01
46#define SNDRV_SB_CSP_RATE_11025 0x02
47#define SNDRV_SB_CSP_RATE_22050 0x04
48#define SNDRV_SB_CSP_RATE_44100 0x08
49#define SNDRV_SB_CSP_RATE_ALL 0x0f
50
51/* CSP running state */
52#define SNDRV_SB_CSP_ST_IDLE 0x00
53#define SNDRV_SB_CSP_ST_LOADED 0x01
54#define SNDRV_SB_CSP_ST_RUNNING 0x02
55#define SNDRV_SB_CSP_ST_PAUSED 0x04
56#define SNDRV_SB_CSP_ST_AUTO 0x08
57#define SNDRV_SB_CSP_ST_QSOUND 0x10
58
59/* maximum QSound value (180 degrees right) */
60#define SNDRV_SB_CSP_QSOUND_MAX_RIGHT 0x20
61
62/* maximum microcode RIFF file size */
63#define SNDRV_SB_CSP_MAX_MICROCODE_FILE_SIZE 0x3000
64
65/* microcode header */
66struct snd_sb_csp_mc_header {
67 char codec_name[16]; /* id name of codec */
68 unsigned short func_req; /* requested function */
69};
70
71/* microcode to be loaded */
72struct snd_sb_csp_microcode {
73 struct snd_sb_csp_mc_header info;
74 unsigned char data[SNDRV_SB_CSP_MAX_MICROCODE_FILE_SIZE];
75};
76
77/* start CSP with sample_width in mono/stereo */
78struct snd_sb_csp_start {
79 int sample_width; /* sample width, look above */
80 int channels; /* channels, look above */
81};
82
83/* CSP information */
84struct snd_sb_csp_info {
85 char codec_name[16]; /* id name of codec */
86 unsigned short func_nr; /* function number */
87 unsigned int acc_format; /* accepted PCM formats */
88 unsigned short acc_channels; /* accepted channels */
89 unsigned short acc_width; /* accepted sample width */
90 unsigned short acc_rates; /* accepted sample rates */
91 unsigned short csp_mode; /* CSP mode, see above */
92 unsigned short run_channels; /* current channels */
93 unsigned short run_width; /* current sample width */
94 unsigned short version; /* version id: 0x10 - 0x1f */
95 unsigned short state; /* state bits */
96};
97
98/* HWDEP controls */
99/* get CSP information */
100#define SNDRV_SB_CSP_IOCTL_INFO _IOR('H', 0x10, struct snd_sb_csp_info)
101/* load microcode to CSP */
102/* NOTE: struct snd_sb_csp_microcode overflows the max size (13 bits)
103 * defined for some architectures like MIPS, and it leads to build errors.
104 * (x86 and co have 14-bit size, thus it's valid, though.)
105 * As a workaround for skipping the size-limit check, here we don't use the
106 * normal _IOW() macro but _IOC() with the manual argument.
107 */
108#define SNDRV_SB_CSP_IOCTL_LOAD_CODE \
109 _IOC(_IOC_WRITE, 'H', 0x11, sizeof(struct snd_sb_csp_microcode))
110/* unload microcode from CSP */
111#define SNDRV_SB_CSP_IOCTL_UNLOAD_CODE _IO('H', 0x12)
112/* start CSP */
113#define SNDRV_SB_CSP_IOCTL_START _IOW('H', 0x13, struct snd_sb_csp_start)
114/* stop CSP */
115#define SNDRV_SB_CSP_IOCTL_STOP _IO('H', 0x14)
116/* pause CSP and DMA transfer */
117#define SNDRV_SB_CSP_IOCTL_PAUSE _IO('H', 0x15)
118/* restart CSP and DMA transfer */
119#define SNDRV_SB_CSP_IOCTL_RESTART _IO('H', 0x16)
120
121#ifdef __KERNEL__
122#include <sound/sb.h> 25#include <sound/sb.h>
123#include <sound/hwdep.h> 26#include <sound/hwdep.h>
124#include <linux/firmware.h> 27#include <linux/firmware.h>
28#include <uapi/sound/sb16_csp.h>
125 29
126struct snd_sb_csp; 30struct snd_sb_csp;
127 31
@@ -183,6 +87,4 @@ struct snd_sb_csp {
183}; 87};
184 88
185int snd_sb_csp_new(struct snd_sb *chip, int device, struct snd_hwdep ** rhwdep); 89int snd_sb_csp_new(struct snd_sb *chip, int device, struct snd_hwdep ** rhwdep);
186#endif
187
188#endif /* __SOUND_SB16_CSP */ 90#endif /* __SOUND_SB16_CSP */
diff --git a/include/uapi/sound/Kbuild b/include/uapi/sound/Kbuild
index aafaa5aa54d4..0f7d279ebde3 100644
--- a/include/uapi/sound/Kbuild
+++ b/include/uapi/sound/Kbuild
@@ -1 +1,11 @@
1# UAPI Header export list 1# UAPI Header export list
2header-y += asequencer.h
3header-y += asound.h
4header-y += asound_fm.h
5header-y += compress_offload.h
6header-y += compress_params.h
7header-y += emu10k1.h
8header-y += hdsp.h
9header-y += hdspm.h
10header-y += sb16_csp.h
11header-y += sfnt_info.h
diff --git a/include/uapi/sound/asequencer.h b/include/uapi/sound/asequencer.h
new file mode 100644
index 000000000000..09c8a00ea503
--- /dev/null
+++ b/include/uapi/sound/asequencer.h
@@ -0,0 +1,614 @@
1/*
2 * Main header file for the ALSA sequencer
3 * Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
4 * (c) 1998-1999 by Jaroslav Kysela <perex@perex.cz>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22#ifndef _UAPI__SOUND_ASEQUENCER_H
23#define _UAPI__SOUND_ASEQUENCER_H
24
25
26/** version of the sequencer */
27#define SNDRV_SEQ_VERSION SNDRV_PROTOCOL_VERSION (1, 0, 1)
28
29/**
30 * definition of sequencer event types
31 */
32
33/** system messages
34 * event data type = #snd_seq_result
35 */
36#define SNDRV_SEQ_EVENT_SYSTEM 0
37#define SNDRV_SEQ_EVENT_RESULT 1
38
39/** note messages (channel specific)
40 * event data type = #snd_seq_ev_note
41 */
42#define SNDRV_SEQ_EVENT_NOTE 5
43#define SNDRV_SEQ_EVENT_NOTEON 6
44#define SNDRV_SEQ_EVENT_NOTEOFF 7
45#define SNDRV_SEQ_EVENT_KEYPRESS 8
46
47/** control messages (channel specific)
48 * event data type = #snd_seq_ev_ctrl
49 */
50#define SNDRV_SEQ_EVENT_CONTROLLER 10
51#define SNDRV_SEQ_EVENT_PGMCHANGE 11
52#define SNDRV_SEQ_EVENT_CHANPRESS 12
53#define SNDRV_SEQ_EVENT_PITCHBEND 13 /**< from -8192 to 8191 */
54#define SNDRV_SEQ_EVENT_CONTROL14 14 /**< 14 bit controller value */
55#define SNDRV_SEQ_EVENT_NONREGPARAM 15 /**< 14 bit NRPN address + 14 bit unsigned value */
56#define SNDRV_SEQ_EVENT_REGPARAM 16 /**< 14 bit RPN address + 14 bit unsigned value */
57
58/** synchronisation messages
59 * event data type = #snd_seq_ev_ctrl
60 */
61#define SNDRV_SEQ_EVENT_SONGPOS 20 /* Song Position Pointer with LSB and MSB values */
62#define SNDRV_SEQ_EVENT_SONGSEL 21 /* Song Select with song ID number */
63#define SNDRV_SEQ_EVENT_QFRAME 22 /* midi time code quarter frame */
64#define SNDRV_SEQ_EVENT_TIMESIGN 23 /* SMF Time Signature event */
65#define SNDRV_SEQ_EVENT_KEYSIGN 24 /* SMF Key Signature event */
66
67/** timer messages
68 * event data type = snd_seq_ev_queue_control
69 */
70#define SNDRV_SEQ_EVENT_START 30 /* midi Real Time Start message */
71#define SNDRV_SEQ_EVENT_CONTINUE 31 /* midi Real Time Continue message */
72#define SNDRV_SEQ_EVENT_STOP 32 /* midi Real Time Stop message */
73#define SNDRV_SEQ_EVENT_SETPOS_TICK 33 /* set tick queue position */
74#define SNDRV_SEQ_EVENT_SETPOS_TIME 34 /* set realtime queue position */
75#define SNDRV_SEQ_EVENT_TEMPO 35 /* (SMF) Tempo event */
76#define SNDRV_SEQ_EVENT_CLOCK 36 /* midi Real Time Clock message */
77#define SNDRV_SEQ_EVENT_TICK 37 /* midi Real Time Tick message */
78#define SNDRV_SEQ_EVENT_QUEUE_SKEW 38 /* skew queue tempo */
79
80/** others
81 * event data type = none
82 */
83#define SNDRV_SEQ_EVENT_TUNE_REQUEST 40 /* tune request */
84#define SNDRV_SEQ_EVENT_RESET 41 /* reset to power-on state */
85#define SNDRV_SEQ_EVENT_SENSING 42 /* "active sensing" event */
86
87/** echo back, kernel private messages
88 * event data type = any type
89 */
90#define SNDRV_SEQ_EVENT_ECHO 50 /* echo event */
91#define SNDRV_SEQ_EVENT_OSS 51 /* OSS raw event */
92
93/** system status messages (broadcast for subscribers)
94 * event data type = snd_seq_addr
95 */
96#define SNDRV_SEQ_EVENT_CLIENT_START 60 /* new client has connected */
97#define SNDRV_SEQ_EVENT_CLIENT_EXIT 61 /* client has left the system */
98#define SNDRV_SEQ_EVENT_CLIENT_CHANGE 62 /* client status/info has changed */
99#define SNDRV_SEQ_EVENT_PORT_START 63 /* new port was created */
100#define SNDRV_SEQ_EVENT_PORT_EXIT 64 /* port was deleted from system */
101#define SNDRV_SEQ_EVENT_PORT_CHANGE 65 /* port status/info has changed */
102
103/** port connection changes
104 * event data type = snd_seq_connect
105 */
106#define SNDRV_SEQ_EVENT_PORT_SUBSCRIBED 66 /* ports connected */
107#define SNDRV_SEQ_EVENT_PORT_UNSUBSCRIBED 67 /* ports disconnected */
108
109/* 70-89: synthesizer events - obsoleted */
110
111/** user-defined events with fixed length
112 * event data type = any
113 */
114#define SNDRV_SEQ_EVENT_USR0 90
115#define SNDRV_SEQ_EVENT_USR1 91
116#define SNDRV_SEQ_EVENT_USR2 92
117#define SNDRV_SEQ_EVENT_USR3 93
118#define SNDRV_SEQ_EVENT_USR4 94
119#define SNDRV_SEQ_EVENT_USR5 95
120#define SNDRV_SEQ_EVENT_USR6 96
121#define SNDRV_SEQ_EVENT_USR7 97
122#define SNDRV_SEQ_EVENT_USR8 98
123#define SNDRV_SEQ_EVENT_USR9 99
124
125/* 100-118: instrument layer - obsoleted */
126/* 119-129: reserved */
127
128/* 130-139: variable length events
129 * event data type = snd_seq_ev_ext
130 * (SNDRV_SEQ_EVENT_LENGTH_VARIABLE must be set)
131 */
132#define SNDRV_SEQ_EVENT_SYSEX 130 /* system exclusive data (variable length) */
133#define SNDRV_SEQ_EVENT_BOUNCE 131 /* error event */
134/* 132-134: reserved */
135#define SNDRV_SEQ_EVENT_USR_VAR0 135
136#define SNDRV_SEQ_EVENT_USR_VAR1 136
137#define SNDRV_SEQ_EVENT_USR_VAR2 137
138#define SNDRV_SEQ_EVENT_USR_VAR3 138
139#define SNDRV_SEQ_EVENT_USR_VAR4 139
140
141/* 150-151: kernel events with quote - DO NOT use in user clients */
142#define SNDRV_SEQ_EVENT_KERNEL_ERROR 150
143#define SNDRV_SEQ_EVENT_KERNEL_QUOTE 151 /* obsolete */
144
145/* 152-191: reserved */
146
147/* 192-254: hardware specific events */
148
149/* 255: special event */
150#define SNDRV_SEQ_EVENT_NONE 255
151
152
153typedef unsigned char snd_seq_event_type_t;
154
155/** event address */
156struct snd_seq_addr {
157 unsigned char client; /**< Client number: 0..255, 255 = broadcast to all clients */
158 unsigned char port; /**< Port within client: 0..255, 255 = broadcast to all ports */
159};
160
161/** port connection */
162struct snd_seq_connect {
163 struct snd_seq_addr sender;
164 struct snd_seq_addr dest;
165};
166
167
168#define SNDRV_SEQ_ADDRESS_UNKNOWN 253 /* unknown source */
169#define SNDRV_SEQ_ADDRESS_SUBSCRIBERS 254 /* send event to all subscribed ports */
170#define SNDRV_SEQ_ADDRESS_BROADCAST 255 /* send event to all queues/clients/ports/channels */
171#define SNDRV_SEQ_QUEUE_DIRECT 253 /* direct dispatch */
172
173 /* event mode flag - NOTE: only 8 bits available! */
174#define SNDRV_SEQ_TIME_STAMP_TICK (0<<0) /* timestamp in clock ticks */
175#define SNDRV_SEQ_TIME_STAMP_REAL (1<<0) /* timestamp in real time */
176#define SNDRV_SEQ_TIME_STAMP_MASK (1<<0)
177
178#define SNDRV_SEQ_TIME_MODE_ABS (0<<1) /* absolute timestamp */
179#define SNDRV_SEQ_TIME_MODE_REL (1<<1) /* relative to current time */
180#define SNDRV_SEQ_TIME_MODE_MASK (1<<1)
181
182#define SNDRV_SEQ_EVENT_LENGTH_FIXED (0<<2) /* fixed event size */
183#define SNDRV_SEQ_EVENT_LENGTH_VARIABLE (1<<2) /* variable event size */
184#define SNDRV_SEQ_EVENT_LENGTH_VARUSR (2<<2) /* variable event size - user memory space */
185#define SNDRV_SEQ_EVENT_LENGTH_MASK (3<<2)
186
187#define SNDRV_SEQ_PRIORITY_NORMAL (0<<4) /* normal priority */
188#define SNDRV_SEQ_PRIORITY_HIGH (1<<4) /* event should be processed before others */
189#define SNDRV_SEQ_PRIORITY_MASK (1<<4)
190
191
192 /* note event */
193struct snd_seq_ev_note {
194 unsigned char channel;
195 unsigned char note;
196 unsigned char velocity;
197 unsigned char off_velocity; /* only for SNDRV_SEQ_EVENT_NOTE */
198 unsigned int duration; /* only for SNDRV_SEQ_EVENT_NOTE */
199};
200
201 /* controller event */
202struct snd_seq_ev_ctrl {
203 unsigned char channel;
204 unsigned char unused1, unused2, unused3; /* pad */
205 unsigned int param;
206 signed int value;
207};
208
209 /* generic set of bytes (12x8 bit) */
210struct snd_seq_ev_raw8 {
211 unsigned char d[12]; /* 8 bit value */
212};
213
214 /* generic set of integers (3x32 bit) */
215struct snd_seq_ev_raw32 {
216 unsigned int d[3]; /* 32 bit value */
217};
218
219 /* external stored data */
220struct snd_seq_ev_ext {
221 unsigned int len; /* length of data */
222 void *ptr; /* pointer to data (note: maybe 64-bit) */
223} __attribute__((packed));
224
225struct snd_seq_result {
226 int event; /* processed event type */
227 int result;
228};
229
230
231struct snd_seq_real_time {
232 unsigned int tv_sec; /* seconds */
233 unsigned int tv_nsec; /* nanoseconds */
234};
235
236typedef unsigned int snd_seq_tick_time_t; /* midi ticks */
237
238union snd_seq_timestamp {
239 snd_seq_tick_time_t tick;
240 struct snd_seq_real_time time;
241};
242
243struct snd_seq_queue_skew {
244 unsigned int value;
245 unsigned int base;
246};
247
248 /* queue timer control */
249struct snd_seq_ev_queue_control {
250 unsigned char queue; /* affected queue */
251 unsigned char pad[3]; /* reserved */
252 union {
253 signed int value; /* affected value (e.g. tempo) */
254 union snd_seq_timestamp time; /* time */
255 unsigned int position; /* sync position */
256 struct snd_seq_queue_skew skew;
257 unsigned int d32[2];
258 unsigned char d8[8];
259 } param;
260};
261
262 /* quoted event - inside the kernel only */
263struct snd_seq_ev_quote {
264 struct snd_seq_addr origin; /* original sender */
265 unsigned short value; /* optional data */
266 struct snd_seq_event *event; /* quoted event */
267} __attribute__((packed));
268
269
270 /* sequencer event */
271struct snd_seq_event {
272 snd_seq_event_type_t type; /* event type */
273 unsigned char flags; /* event flags */
274 char tag;
275
276 unsigned char queue; /* schedule queue */
277 union snd_seq_timestamp time; /* schedule time */
278
279
280 struct snd_seq_addr source; /* source address */
281 struct snd_seq_addr dest; /* destination address */
282
283 union { /* event data... */
284 struct snd_seq_ev_note note;
285 struct snd_seq_ev_ctrl control;
286 struct snd_seq_ev_raw8 raw8;
287 struct snd_seq_ev_raw32 raw32;
288 struct snd_seq_ev_ext ext;
289 struct snd_seq_ev_queue_control queue;
290 union snd_seq_timestamp time;
291 struct snd_seq_addr addr;
292 struct snd_seq_connect connect;
293 struct snd_seq_result result;
294 struct snd_seq_ev_quote quote;
295 } data;
296};
297
298
299/*
300 * bounce event - stored as variable size data
301 */
302struct snd_seq_event_bounce {
303 int err;
304 struct snd_seq_event event;
305 /* external data follows here. */
306};
307
308
309 /* system information */
310struct snd_seq_system_info {
311 int queues; /* maximum queues count */
312 int clients; /* maximum clients count */
313 int ports; /* maximum ports per client */
314 int channels; /* maximum channels per port */
315 int cur_clients; /* current clients */
316 int cur_queues; /* current queues */
317 char reserved[24];
318};
319
320
321 /* system running information */
322struct snd_seq_running_info {
323 unsigned char client; /* client id */
324 unsigned char big_endian; /* 1 = big-endian */
325 unsigned char cpu_mode; /* 4 = 32bit, 8 = 64bit */
326 unsigned char pad; /* reserved */
327 unsigned char reserved[12];
328};
329
330
331 /* known client numbers */
332#define SNDRV_SEQ_CLIENT_SYSTEM 0
333 /* internal client numbers */
334#define SNDRV_SEQ_CLIENT_DUMMY 14 /* midi through */
335#define SNDRV_SEQ_CLIENT_OSS 15 /* oss sequencer emulator */
336
337
338 /* client types */
339typedef int __bitwise snd_seq_client_type_t;
340#define NO_CLIENT ((__force snd_seq_client_type_t) 0)
341#define USER_CLIENT ((__force snd_seq_client_type_t) 1)
342#define KERNEL_CLIENT ((__force snd_seq_client_type_t) 2)
343
344 /* event filter flags */
345#define SNDRV_SEQ_FILTER_BROADCAST (1<<0) /* accept broadcast messages */
346#define SNDRV_SEQ_FILTER_MULTICAST (1<<1) /* accept multicast messages */
347#define SNDRV_SEQ_FILTER_BOUNCE (1<<2) /* accept bounce event in error */
348#define SNDRV_SEQ_FILTER_USE_EVENT (1<<31) /* use event filter */
349
350struct snd_seq_client_info {
351 int client; /* client number to inquire */
352 snd_seq_client_type_t type; /* client type */
353 char name[64]; /* client name */
354 unsigned int filter; /* filter flags */
355 unsigned char multicast_filter[8]; /* multicast filter bitmap */
356 unsigned char event_filter[32]; /* event filter bitmap */
357 int num_ports; /* RO: number of ports */
358 int event_lost; /* number of lost events */
359 char reserved[64]; /* for future use */
360};
361
362
363/* client pool size */
364struct snd_seq_client_pool {
365 int client; /* client number to inquire */
366 int output_pool; /* outgoing (write) pool size */
367 int input_pool; /* incoming (read) pool size */
368 int output_room; /* minimum free pool size for select/blocking mode */
369 int output_free; /* unused size */
370 int input_free; /* unused size */
371 char reserved[64];
372};
373
374
375/* Remove events by specified criteria */
376
377#define SNDRV_SEQ_REMOVE_INPUT (1<<0) /* Flush input queues */
378#define SNDRV_SEQ_REMOVE_OUTPUT (1<<1) /* Flush output queues */
379#define SNDRV_SEQ_REMOVE_DEST (1<<2) /* Restrict by destination q:client:port */
380#define SNDRV_SEQ_REMOVE_DEST_CHANNEL (1<<3) /* Restrict by channel */
381#define SNDRV_SEQ_REMOVE_TIME_BEFORE (1<<4) /* Restrict to before time */
382#define SNDRV_SEQ_REMOVE_TIME_AFTER (1<<5) /* Restrict to time or after */
383#define SNDRV_SEQ_REMOVE_TIME_TICK (1<<6) /* Time is in ticks */
384#define SNDRV_SEQ_REMOVE_EVENT_TYPE (1<<7) /* Restrict to event type */
385#define SNDRV_SEQ_REMOVE_IGNORE_OFF (1<<8) /* Do not flush off events */
386#define SNDRV_SEQ_REMOVE_TAG_MATCH (1<<9) /* Restrict to events with given tag */
387
388struct snd_seq_remove_events {
389 unsigned int remove_mode; /* Flags that determine what gets removed */
390
391 union snd_seq_timestamp time;
392
393 unsigned char queue; /* Queue for REMOVE_DEST */
394 struct snd_seq_addr dest; /* Address for REMOVE_DEST */
395 unsigned char channel; /* Channel for REMOVE_DEST */
396
397 int type; /* For REMOVE_EVENT_TYPE */
398 char tag; /* Tag for REMOVE_TAG */
399
400 int reserved[10]; /* To allow for future binary compatibility */
401
402};
403
404
405 /* known port numbers */
406#define SNDRV_SEQ_PORT_SYSTEM_TIMER 0
407#define SNDRV_SEQ_PORT_SYSTEM_ANNOUNCE 1
408
409 /* port capabilities (32 bits) */
410#define SNDRV_SEQ_PORT_CAP_READ (1<<0) /* readable from this port */
411#define SNDRV_SEQ_PORT_CAP_WRITE (1<<1) /* writable to this port */
412
413#define SNDRV_SEQ_PORT_CAP_SYNC_READ (1<<2)
414#define SNDRV_SEQ_PORT_CAP_SYNC_WRITE (1<<3)
415
416#define SNDRV_SEQ_PORT_CAP_DUPLEX (1<<4)
417
418#define SNDRV_SEQ_PORT_CAP_SUBS_READ (1<<5) /* allow read subscription */
419#define SNDRV_SEQ_PORT_CAP_SUBS_WRITE (1<<6) /* allow write subscription */
420#define SNDRV_SEQ_PORT_CAP_NO_EXPORT (1<<7) /* routing not allowed */
421
422 /* port type */
423#define SNDRV_SEQ_PORT_TYPE_SPECIFIC (1<<0) /* hardware specific */
424#define SNDRV_SEQ_PORT_TYPE_MIDI_GENERIC (1<<1) /* generic MIDI device */
425#define SNDRV_SEQ_PORT_TYPE_MIDI_GM (1<<2) /* General MIDI compatible device */
426#define SNDRV_SEQ_PORT_TYPE_MIDI_GS (1<<3) /* GS compatible device */
427#define SNDRV_SEQ_PORT_TYPE_MIDI_XG (1<<4) /* XG compatible device */
428#define SNDRV_SEQ_PORT_TYPE_MIDI_MT32 (1<<5) /* MT-32 compatible device */
429#define SNDRV_SEQ_PORT_TYPE_MIDI_GM2 (1<<6) /* General MIDI 2 compatible device */
430
431/* other standards...*/
432#define SNDRV_SEQ_PORT_TYPE_SYNTH (1<<10) /* Synth device (no MIDI compatible - direct wavetable) */
433#define SNDRV_SEQ_PORT_TYPE_DIRECT_SAMPLE (1<<11) /* Sampling device (support sample download) */
434#define SNDRV_SEQ_PORT_TYPE_SAMPLE (1<<12) /* Sampling device (sample can be downloaded at any time) */
435/*...*/
436#define SNDRV_SEQ_PORT_TYPE_HARDWARE (1<<16) /* driver for a hardware device */
437#define SNDRV_SEQ_PORT_TYPE_SOFTWARE (1<<17) /* implemented in software */
438#define SNDRV_SEQ_PORT_TYPE_SYNTHESIZER (1<<18) /* generates sound */
439#define SNDRV_SEQ_PORT_TYPE_PORT (1<<19) /* connects to other device(s) */
440#define SNDRV_SEQ_PORT_TYPE_APPLICATION (1<<20) /* application (sequencer/editor) */
441
442/* misc. conditioning flags */
443#define SNDRV_SEQ_PORT_FLG_GIVEN_PORT (1<<0)
444#define SNDRV_SEQ_PORT_FLG_TIMESTAMP (1<<1)
445#define SNDRV_SEQ_PORT_FLG_TIME_REAL (1<<2)
446
447struct snd_seq_port_info {
448 struct snd_seq_addr addr; /* client/port numbers */
449 char name[64]; /* port name */
450
451 unsigned int capability; /* port capability bits */
452 unsigned int type; /* port type bits */
453 int midi_channels; /* channels per MIDI port */
454 int midi_voices; /* voices per MIDI port */
455 int synth_voices; /* voices per SYNTH port */
456
457 int read_use; /* R/O: subscribers for output (from this port) */
458 int write_use; /* R/O: subscribers for input (to this port) */
459
460 void *kernel; /* reserved for kernel use (must be NULL) */
461 unsigned int flags; /* misc. conditioning */
462 unsigned char time_queue; /* queue # for timestamping */
463 char reserved[59]; /* for future use */
464};
465
466
467/* queue flags */
468#define SNDRV_SEQ_QUEUE_FLG_SYNC (1<<0) /* sync enabled */
469
470/* queue information */
471struct snd_seq_queue_info {
472 int queue; /* queue id */
473
474 /*
475 * security settings, only owner of this queue can start/stop timer
476 * etc. if the queue is locked for other clients
477 */
478 int owner; /* client id for owner of the queue */
479 unsigned locked:1; /* timing queue locked for other queues */
480 char name[64]; /* name of this queue */
481 unsigned int flags; /* flags */
482 char reserved[60]; /* for future use */
483
484};
485
486/* queue info/status */
487struct snd_seq_queue_status {
488 int queue; /* queue id */
489 int events; /* read-only - queue size */
490 snd_seq_tick_time_t tick; /* current tick */
491 struct snd_seq_real_time time; /* current time */
492 int running; /* running state of queue */
493 int flags; /* various flags */
494 char reserved[64]; /* for the future */
495};
496
497
498/* queue tempo */
499struct snd_seq_queue_tempo {
500 int queue; /* sequencer queue */
501 unsigned int tempo; /* current tempo, us/tick */
502 int ppq; /* time resolution, ticks/quarter */
503 unsigned int skew_value; /* queue skew */
504 unsigned int skew_base; /* queue skew base */
505 char reserved[24]; /* for the future */
506};
507
508
509/* sequencer timer sources */
510#define SNDRV_SEQ_TIMER_ALSA 0 /* ALSA timer */
511#define SNDRV_SEQ_TIMER_MIDI_CLOCK 1 /* Midi Clock (CLOCK event) */
512#define SNDRV_SEQ_TIMER_MIDI_TICK 2 /* Midi Timer Tick (TICK event) */
513
514/* queue timer info */
515struct snd_seq_queue_timer {
516 int queue; /* sequencer queue */
517 int type; /* source timer type */
518 union {
519 struct {
520 struct snd_timer_id id; /* ALSA's timer ID */
521 unsigned int resolution; /* resolution in Hz */
522 } alsa;
523 } u;
524 char reserved[64]; /* for the future use */
525};
526
527
528struct snd_seq_queue_client {
529 int queue; /* sequencer queue */
530 int client; /* sequencer client */
531 int used; /* queue is used with this client
532 (must be set for accepting events) */
533 /* per client watermarks */
534 char reserved[64]; /* for future use */
535};
536
537
538#define SNDRV_SEQ_PORT_SUBS_EXCLUSIVE (1<<0) /* exclusive connection */
539#define SNDRV_SEQ_PORT_SUBS_TIMESTAMP (1<<1)
540#define SNDRV_SEQ_PORT_SUBS_TIME_REAL (1<<2)
541
542struct snd_seq_port_subscribe {
543 struct snd_seq_addr sender; /* sender address */
544 struct snd_seq_addr dest; /* destination address */
545 unsigned int voices; /* number of voices to be allocated (0 = don't care) */
546 unsigned int flags; /* modes */
547 unsigned char queue; /* input time-stamp queue (optional) */
548 unsigned char pad[3]; /* reserved */
549 char reserved[64];
550};
551
552/* type of query subscription */
553#define SNDRV_SEQ_QUERY_SUBS_READ 0
554#define SNDRV_SEQ_QUERY_SUBS_WRITE 1
555
556struct snd_seq_query_subs {
557 struct snd_seq_addr root; /* client/port id to be searched */
558 int type; /* READ or WRITE */
559 int index; /* 0..N-1 */
560 int num_subs; /* R/O: number of subscriptions on this port */
561 struct snd_seq_addr addr; /* R/O: result */
562 unsigned char queue; /* R/O: result */
563 unsigned int flags; /* R/O: result */
564 char reserved[64]; /* for future use */
565};
566
567
568/*
569 * IOCTL commands
570 */
571
572#define SNDRV_SEQ_IOCTL_PVERSION _IOR ('S', 0x00, int)
573#define SNDRV_SEQ_IOCTL_CLIENT_ID _IOR ('S', 0x01, int)
574#define SNDRV_SEQ_IOCTL_SYSTEM_INFO _IOWR('S', 0x02, struct snd_seq_system_info)
575#define SNDRV_SEQ_IOCTL_RUNNING_MODE _IOWR('S', 0x03, struct snd_seq_running_info)
576
577#define SNDRV_SEQ_IOCTL_GET_CLIENT_INFO _IOWR('S', 0x10, struct snd_seq_client_info)
578#define SNDRV_SEQ_IOCTL_SET_CLIENT_INFO _IOW ('S', 0x11, struct snd_seq_client_info)
579
580#define SNDRV_SEQ_IOCTL_CREATE_PORT _IOWR('S', 0x20, struct snd_seq_port_info)
581#define SNDRV_SEQ_IOCTL_DELETE_PORT _IOW ('S', 0x21, struct snd_seq_port_info)
582#define SNDRV_SEQ_IOCTL_GET_PORT_INFO _IOWR('S', 0x22, struct snd_seq_port_info)
583#define SNDRV_SEQ_IOCTL_SET_PORT_INFO _IOW ('S', 0x23, struct snd_seq_port_info)
584
585#define SNDRV_SEQ_IOCTL_SUBSCRIBE_PORT _IOW ('S', 0x30, struct snd_seq_port_subscribe)
586#define SNDRV_SEQ_IOCTL_UNSUBSCRIBE_PORT _IOW ('S', 0x31, struct snd_seq_port_subscribe)
587
588#define SNDRV_SEQ_IOCTL_CREATE_QUEUE _IOWR('S', 0x32, struct snd_seq_queue_info)
589#define SNDRV_SEQ_IOCTL_DELETE_QUEUE _IOW ('S', 0x33, struct snd_seq_queue_info)
590#define SNDRV_SEQ_IOCTL_GET_QUEUE_INFO _IOWR('S', 0x34, struct snd_seq_queue_info)
591#define SNDRV_SEQ_IOCTL_SET_QUEUE_INFO _IOWR('S', 0x35, struct snd_seq_queue_info)
592#define SNDRV_SEQ_IOCTL_GET_NAMED_QUEUE _IOWR('S', 0x36, struct snd_seq_queue_info)
593#define SNDRV_SEQ_IOCTL_GET_QUEUE_STATUS _IOWR('S', 0x40, struct snd_seq_queue_status)
594#define SNDRV_SEQ_IOCTL_GET_QUEUE_TEMPO _IOWR('S', 0x41, struct snd_seq_queue_tempo)
595#define SNDRV_SEQ_IOCTL_SET_QUEUE_TEMPO _IOW ('S', 0x42, struct snd_seq_queue_tempo)
596#define SNDRV_SEQ_IOCTL_GET_QUEUE_OWNER _IOWR('S', 0x43, struct snd_seq_queue_owner)
597#define SNDRV_SEQ_IOCTL_SET_QUEUE_OWNER _IOW ('S', 0x44, struct snd_seq_queue_owner)
598#define SNDRV_SEQ_IOCTL_GET_QUEUE_TIMER _IOWR('S', 0x45, struct snd_seq_queue_timer)
599#define SNDRV_SEQ_IOCTL_SET_QUEUE_TIMER _IOW ('S', 0x46, struct snd_seq_queue_timer)
600/* XXX
601#define SNDRV_SEQ_IOCTL_GET_QUEUE_SYNC _IOWR('S', 0x53, struct snd_seq_queue_sync)
602#define SNDRV_SEQ_IOCTL_SET_QUEUE_SYNC _IOW ('S', 0x54, struct snd_seq_queue_sync)
603*/
604#define SNDRV_SEQ_IOCTL_GET_QUEUE_CLIENT _IOWR('S', 0x49, struct snd_seq_queue_client)
605#define SNDRV_SEQ_IOCTL_SET_QUEUE_CLIENT _IOW ('S', 0x4a, struct snd_seq_queue_client)
606#define SNDRV_SEQ_IOCTL_GET_CLIENT_POOL _IOWR('S', 0x4b, struct snd_seq_client_pool)
607#define SNDRV_SEQ_IOCTL_SET_CLIENT_POOL _IOW ('S', 0x4c, struct snd_seq_client_pool)
608#define SNDRV_SEQ_IOCTL_REMOVE_EVENTS _IOW ('S', 0x4e, struct snd_seq_remove_events)
609#define SNDRV_SEQ_IOCTL_QUERY_SUBS _IOWR('S', 0x4f, struct snd_seq_query_subs)
610#define SNDRV_SEQ_IOCTL_GET_SUBSCRIPTION _IOWR('S', 0x50, struct snd_seq_port_subscribe)
611#define SNDRV_SEQ_IOCTL_QUERY_NEXT_CLIENT _IOWR('S', 0x51, struct snd_seq_client_info)
612#define SNDRV_SEQ_IOCTL_QUERY_NEXT_PORT _IOWR('S', 0x52, struct snd_seq_port_info)
613
614#endif /* _UAPI__SOUND_ASEQUENCER_H */
diff --git a/include/uapi/sound/asound.h b/include/uapi/sound/asound.h
new file mode 100644
index 000000000000..92b104e496b5
--- /dev/null
+++ b/include/uapi/sound/asound.h
@@ -0,0 +1,957 @@
1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef _UAPI__SOUND_ASOUND_H
24#define _UAPI__SOUND_ASOUND_H
25
26#include <linux/types.h>
27
28
29/*
30 * protocol version
31 */
32
33#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
34#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
35#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
36#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
37#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
38 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
39 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
40 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
41
42/****************************************************************************
43 * *
44 * Digital audio interface *
45 * *
46 ****************************************************************************/
47
48struct snd_aes_iec958 {
49 unsigned char status[24]; /* AES/IEC958 channel status bits */
50 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
51 unsigned char pad; /* nothing */
52 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
53};
54
55/****************************************************************************
56 * *
57 * CEA-861 Audio InfoFrame. Used in HDMI and DisplayPort *
58 * *
59 ****************************************************************************/
60
61struct snd_cea_861_aud_if {
62 unsigned char db1_ct_cc; /* coding type and channel count */
63 unsigned char db2_sf_ss; /* sample frequency and size */
64 unsigned char db3; /* not used, all zeros */
65 unsigned char db4_ca; /* channel allocation code */
66 unsigned char db5_dminh_lsv; /* downmix inhibit & level-shit values */
67};
68
69/****************************************************************************
70 * *
71 * Section for driver hardware dependent interface - /dev/snd/hw? *
72 * *
73 ****************************************************************************/
74
75#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
76
77enum {
78 SNDRV_HWDEP_IFACE_OPL2 = 0,
79 SNDRV_HWDEP_IFACE_OPL3,
80 SNDRV_HWDEP_IFACE_OPL4,
81 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
82 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
83 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
84 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
85 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
86 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
87 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
88 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
89 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
90 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
91 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
92 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
93 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
94 SNDRV_HWDEP_IFACE_HDA, /* HD-audio */
95 SNDRV_HWDEP_IFACE_USB_STREAM, /* direct access to usb stream */
96
97 /* Don't forget to change the following: */
98 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_USB_STREAM
99};
100
101struct snd_hwdep_info {
102 unsigned int device; /* WR: device number */
103 int card; /* R: card number */
104 unsigned char id[64]; /* ID (user selectable) */
105 unsigned char name[80]; /* hwdep name */
106 int iface; /* hwdep interface */
107 unsigned char reserved[64]; /* reserved for future */
108};
109
110/* generic DSP loader */
111struct snd_hwdep_dsp_status {
112 unsigned int version; /* R: driver-specific version */
113 unsigned char id[32]; /* R: driver-specific ID string */
114 unsigned int num_dsps; /* R: number of DSP images to transfer */
115 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
116 unsigned int chip_ready; /* R: 1 = initialization finished */
117 unsigned char reserved[16]; /* reserved for future use */
118};
119
120struct snd_hwdep_dsp_image {
121 unsigned int index; /* W: DSP index */
122 unsigned char name[64]; /* W: ID (e.g. file name) */
123 unsigned char __user *image; /* W: binary image */
124 size_t length; /* W: size of image in bytes */
125 unsigned long driver_data; /* W: driver-specific data */
126};
127
128#define SNDRV_HWDEP_IOCTL_PVERSION _IOR ('H', 0x00, int)
129#define SNDRV_HWDEP_IOCTL_INFO _IOR ('H', 0x01, struct snd_hwdep_info)
130#define SNDRV_HWDEP_IOCTL_DSP_STATUS _IOR('H', 0x02, struct snd_hwdep_dsp_status)
131#define SNDRV_HWDEP_IOCTL_DSP_LOAD _IOW('H', 0x03, struct snd_hwdep_dsp_image)
132
133/*****************************************************************************
134 * *
135 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
136 * *
137 *****************************************************************************/
138
139#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 10)
140
141typedef unsigned long snd_pcm_uframes_t;
142typedef signed long snd_pcm_sframes_t;
143
144enum {
145 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
146 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
147 SNDRV_PCM_CLASS_MODEM, /* software modem class */
148 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
149 /* Don't forget to change the following: */
150 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
151};
152
153enum {
154 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
155 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
156 /* Don't forget to change the following: */
157 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
158};
159
160enum {
161 SNDRV_PCM_STREAM_PLAYBACK = 0,
162 SNDRV_PCM_STREAM_CAPTURE,
163 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
164};
165
166typedef int __bitwise snd_pcm_access_t;
167#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
168#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
169#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
170#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
171#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
172#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
173
174typedef int __bitwise snd_pcm_format_t;
175#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
176#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
177#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
178#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
179#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
180#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
181#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
182#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
183#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
184#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
185#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
186#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
187#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
188#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
189#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
190#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
191#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
192#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
193#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
194#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
195#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
196#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
197#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
198#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
199#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
200#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
201#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
202#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
203#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
204#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
205#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
206#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
207#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
208#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
209#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
210#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
211#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
212#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
213#define SNDRV_PCM_FORMAT_G723_24 ((__force snd_pcm_format_t) 44) /* 8 samples in 3 bytes */
214#define SNDRV_PCM_FORMAT_G723_24_1B ((__force snd_pcm_format_t) 45) /* 1 sample in 1 byte */
215#define SNDRV_PCM_FORMAT_G723_40 ((__force snd_pcm_format_t) 46) /* 8 Samples in 5 bytes */
216#define SNDRV_PCM_FORMAT_G723_40_1B ((__force snd_pcm_format_t) 47) /* 1 sample in 1 byte */
217#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_G723_40_1B
218
219#ifdef SNDRV_LITTLE_ENDIAN
220#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
221#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
222#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
223#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
224#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
225#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
226#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
227#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
228#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
229#endif
230#ifdef SNDRV_BIG_ENDIAN
231#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
232#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
233#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
234#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
235#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
236#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
237#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
238#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
239#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
240#endif
241
242typedef int __bitwise snd_pcm_subformat_t;
243#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
244#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
245
246#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
247#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
248#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
249#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
250#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
251#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
252#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
253#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
254#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
255#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
256#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
257#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
258#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
259#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
260#define SNDRV_PCM_INFO_NO_PERIOD_WAKEUP 0x00800000 /* period wakeup can be disabled */
261#define SNDRV_PCM_INFO_FIFO_IN_FRAMES 0x80000000 /* internal kernel flag - FIFO size is in frames */
262
263typedef int __bitwise snd_pcm_state_t;
264#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
265#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
266#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
267#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
268#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
269#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
270#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
271#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
272#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
273#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
274
275enum {
276 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
277 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
278 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
279};
280
281union snd_pcm_sync_id {
282 unsigned char id[16];
283 unsigned short id16[8];
284 unsigned int id32[4];
285};
286
287struct snd_pcm_info {
288 unsigned int device; /* RO/WR (control): device number */
289 unsigned int subdevice; /* RO/WR (control): subdevice number */
290 int stream; /* RO/WR (control): stream direction */
291 int card; /* R: card number */
292 unsigned char id[64]; /* ID (user selectable) */
293 unsigned char name[80]; /* name of this device */
294 unsigned char subname[32]; /* subdevice name */
295 int dev_class; /* SNDRV_PCM_CLASS_* */
296 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
297 unsigned int subdevices_count;
298 unsigned int subdevices_avail;
299 union snd_pcm_sync_id sync; /* hardware synchronization ID */
300 unsigned char reserved[64]; /* reserved for future... */
301};
302
303typedef int snd_pcm_hw_param_t;
304#define SNDRV_PCM_HW_PARAM_ACCESS 0 /* Access type */
305#define SNDRV_PCM_HW_PARAM_FORMAT 1 /* Format */
306#define SNDRV_PCM_HW_PARAM_SUBFORMAT 2 /* Subformat */
307#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
308#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
309
310#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS 8 /* Bits per sample */
311#define SNDRV_PCM_HW_PARAM_FRAME_BITS 9 /* Bits per frame */
312#define SNDRV_PCM_HW_PARAM_CHANNELS 10 /* Channels */
313#define SNDRV_PCM_HW_PARAM_RATE 11 /* Approx rate */
314#define SNDRV_PCM_HW_PARAM_PERIOD_TIME 12 /* Approx distance between
315 * interrupts in us
316 */
317#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE 13 /* Approx frames between
318 * interrupts
319 */
320#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES 14 /* Approx bytes between
321 * interrupts
322 */
323#define SNDRV_PCM_HW_PARAM_PERIODS 15 /* Approx interrupts per
324 * buffer
325 */
326#define SNDRV_PCM_HW_PARAM_BUFFER_TIME 16 /* Approx duration of buffer
327 * in us
328 */
329#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE 17 /* Size of buffer in frames */
330#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES 18 /* Size of buffer in bytes */
331#define SNDRV_PCM_HW_PARAM_TICK_TIME 19 /* Approx tick duration in us */
332#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
333#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
334
335#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
336#define SNDRV_PCM_HW_PARAMS_EXPORT_BUFFER (1<<1) /* export buffer */
337#define SNDRV_PCM_HW_PARAMS_NO_PERIOD_WAKEUP (1<<2) /* disable period wakeups */
338
339struct snd_interval {
340 unsigned int min, max;
341 unsigned int openmin:1,
342 openmax:1,
343 integer:1,
344 empty:1;
345};
346
347#define SNDRV_MASK_MAX 256
348
349struct snd_mask {
350 __u32 bits[(SNDRV_MASK_MAX+31)/32];
351};
352
353struct snd_pcm_hw_params {
354 unsigned int flags;
355 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
356 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
357 struct snd_mask mres[5]; /* reserved masks */
358 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
359 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
360 struct snd_interval ires[9]; /* reserved intervals */
361 unsigned int rmask; /* W: requested masks */
362 unsigned int cmask; /* R: changed masks */
363 unsigned int info; /* R: Info flags for returned setup */
364 unsigned int msbits; /* R: used most significant bits */
365 unsigned int rate_num; /* R: rate numerator */
366 unsigned int rate_den; /* R: rate denominator */
367 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
368 unsigned char reserved[64]; /* reserved for future */
369};
370
371enum {
372 SNDRV_PCM_TSTAMP_NONE = 0,
373 SNDRV_PCM_TSTAMP_ENABLE,
374 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_ENABLE,
375};
376
377struct snd_pcm_sw_params {
378 int tstamp_mode; /* timestamp mode */
379 unsigned int period_step;
380 unsigned int sleep_min; /* min ticks to sleep */
381 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
382 snd_pcm_uframes_t xfer_align; /* obsolete: xfer size need to be a multiple */
383 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
384 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
385 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
386 snd_pcm_uframes_t silence_size; /* silence block size */
387 snd_pcm_uframes_t boundary; /* pointers wrap point */
388 unsigned char reserved[64]; /* reserved for future */
389};
390
391struct snd_pcm_channel_info {
392 unsigned int channel;
393 __kernel_off_t offset; /* mmap offset */
394 unsigned int first; /* offset to first sample in bits */
395 unsigned int step; /* samples distance in bits */
396};
397
398struct snd_pcm_status {
399 snd_pcm_state_t state; /* stream state */
400 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
401 struct timespec tstamp; /* reference timestamp */
402 snd_pcm_uframes_t appl_ptr; /* appl ptr */
403 snd_pcm_uframes_t hw_ptr; /* hw ptr */
404 snd_pcm_sframes_t delay; /* current delay in frames */
405 snd_pcm_uframes_t avail; /* number of frames available */
406 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
407 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
408 snd_pcm_state_t suspended_state; /* suspended stream state */
409 unsigned char reserved[60]; /* must be filled with zero */
410};
411
412struct snd_pcm_mmap_status {
413 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
414 int pad1; /* Needed for 64 bit alignment */
415 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
416 struct timespec tstamp; /* Timestamp */
417 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
418};
419
420struct snd_pcm_mmap_control {
421 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
422 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
423};
424
425#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
426#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
427#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
428
429struct snd_pcm_sync_ptr {
430 unsigned int flags;
431 union {
432 struct snd_pcm_mmap_status status;
433 unsigned char reserved[64];
434 } s;
435 union {
436 struct snd_pcm_mmap_control control;
437 unsigned char reserved[64];
438 } c;
439};
440
441struct snd_xferi {
442 snd_pcm_sframes_t result;
443 void __user *buf;
444 snd_pcm_uframes_t frames;
445};
446
447struct snd_xfern {
448 snd_pcm_sframes_t result;
449 void __user * __user *bufs;
450 snd_pcm_uframes_t frames;
451};
452
453enum {
454 SNDRV_PCM_TSTAMP_TYPE_GETTIMEOFDAY = 0, /* gettimeofday equivalent */
455 SNDRV_PCM_TSTAMP_TYPE_MONOTONIC, /* posix_clock_monotonic equivalent */
456 SNDRV_PCM_TSTAMP_TYPE_LAST = SNDRV_PCM_TSTAMP_TYPE_MONOTONIC,
457};
458
459/* channel positions */
460enum {
461 SNDRV_CHMAP_UNKNOWN = 0,
462 SNDRV_CHMAP_NA, /* N/A, silent */
463 SNDRV_CHMAP_MONO, /* mono stream */
464 /* this follows the alsa-lib mixer channel value + 3 */
465 SNDRV_CHMAP_FL, /* front left */
466 SNDRV_CHMAP_FR, /* front right */
467 SNDRV_CHMAP_RL, /* rear left */
468 SNDRV_CHMAP_RR, /* rear right */
469 SNDRV_CHMAP_FC, /* front center */
470 SNDRV_CHMAP_LFE, /* LFE */
471 SNDRV_CHMAP_SL, /* side left */
472 SNDRV_CHMAP_SR, /* side right */
473 SNDRV_CHMAP_RC, /* rear center */
474 /* new definitions */
475 SNDRV_CHMAP_FLC, /* front left center */
476 SNDRV_CHMAP_FRC, /* front right center */
477 SNDRV_CHMAP_RLC, /* rear left center */
478 SNDRV_CHMAP_RRC, /* rear right center */
479 SNDRV_CHMAP_FLW, /* front left wide */
480 SNDRV_CHMAP_FRW, /* front right wide */
481 SNDRV_CHMAP_FLH, /* front left high */
482 SNDRV_CHMAP_FCH, /* front center high */
483 SNDRV_CHMAP_FRH, /* front right high */
484 SNDRV_CHMAP_TC, /* top center */
485 SNDRV_CHMAP_TFL, /* top front left */
486 SNDRV_CHMAP_TFR, /* top front right */
487 SNDRV_CHMAP_TFC, /* top front center */
488 SNDRV_CHMAP_TRL, /* top rear left */
489 SNDRV_CHMAP_TRR, /* top rear right */
490 SNDRV_CHMAP_TRC, /* top rear center */
491 SNDRV_CHMAP_LAST = SNDRV_CHMAP_TRC,
492};
493
494#define SNDRV_CHMAP_POSITION_MASK 0xffff
495#define SNDRV_CHMAP_PHASE_INVERSE (0x01 << 16)
496#define SNDRV_CHMAP_DRIVER_SPEC (0x02 << 16)
497
498#define SNDRV_PCM_IOCTL_PVERSION _IOR('A', 0x00, int)
499#define SNDRV_PCM_IOCTL_INFO _IOR('A', 0x01, struct snd_pcm_info)
500#define SNDRV_PCM_IOCTL_TSTAMP _IOW('A', 0x02, int)
501#define SNDRV_PCM_IOCTL_TTSTAMP _IOW('A', 0x03, int)
502#define SNDRV_PCM_IOCTL_HW_REFINE _IOWR('A', 0x10, struct snd_pcm_hw_params)
503#define SNDRV_PCM_IOCTL_HW_PARAMS _IOWR('A', 0x11, struct snd_pcm_hw_params)
504#define SNDRV_PCM_IOCTL_HW_FREE _IO('A', 0x12)
505#define SNDRV_PCM_IOCTL_SW_PARAMS _IOWR('A', 0x13, struct snd_pcm_sw_params)
506#define SNDRV_PCM_IOCTL_STATUS _IOR('A', 0x20, struct snd_pcm_status)
507#define SNDRV_PCM_IOCTL_DELAY _IOR('A', 0x21, snd_pcm_sframes_t)
508#define SNDRV_PCM_IOCTL_HWSYNC _IO('A', 0x22)
509#define SNDRV_PCM_IOCTL_SYNC_PTR _IOWR('A', 0x23, struct snd_pcm_sync_ptr)
510#define SNDRV_PCM_IOCTL_CHANNEL_INFO _IOR('A', 0x32, struct snd_pcm_channel_info)
511#define SNDRV_PCM_IOCTL_PREPARE _IO('A', 0x40)
512#define SNDRV_PCM_IOCTL_RESET _IO('A', 0x41)
513#define SNDRV_PCM_IOCTL_START _IO('A', 0x42)
514#define SNDRV_PCM_IOCTL_DROP _IO('A', 0x43)
515#define SNDRV_PCM_IOCTL_DRAIN _IO('A', 0x44)
516#define SNDRV_PCM_IOCTL_PAUSE _IOW('A', 0x45, int)
517#define SNDRV_PCM_IOCTL_REWIND _IOW('A', 0x46, snd_pcm_uframes_t)
518#define SNDRV_PCM_IOCTL_RESUME _IO('A', 0x47)
519#define SNDRV_PCM_IOCTL_XRUN _IO('A', 0x48)
520#define SNDRV_PCM_IOCTL_FORWARD _IOW('A', 0x49, snd_pcm_uframes_t)
521#define SNDRV_PCM_IOCTL_WRITEI_FRAMES _IOW('A', 0x50, struct snd_xferi)
522#define SNDRV_PCM_IOCTL_READI_FRAMES _IOR('A', 0x51, struct snd_xferi)
523#define SNDRV_PCM_IOCTL_WRITEN_FRAMES _IOW('A', 0x52, struct snd_xfern)
524#define SNDRV_PCM_IOCTL_READN_FRAMES _IOR('A', 0x53, struct snd_xfern)
525#define SNDRV_PCM_IOCTL_LINK _IOW('A', 0x60, int)
526#define SNDRV_PCM_IOCTL_UNLINK _IO('A', 0x61)
527
528/*****************************************************************************
529 * *
530 * MIDI v1.0 interface *
531 * *
532 *****************************************************************************/
533
534/*
535 * Raw MIDI section - /dev/snd/midi??
536 */
537
538#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
539
540enum {
541 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
542 SNDRV_RAWMIDI_STREAM_INPUT,
543 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
544};
545
546#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
547#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
548#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
549
550struct snd_rawmidi_info {
551 unsigned int device; /* RO/WR (control): device number */
552 unsigned int subdevice; /* RO/WR (control): subdevice number */
553 int stream; /* WR: stream */
554 int card; /* R: card number */
555 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
556 unsigned char id[64]; /* ID (user selectable) */
557 unsigned char name[80]; /* name of device */
558 unsigned char subname[32]; /* name of active or selected subdevice */
559 unsigned int subdevices_count;
560 unsigned int subdevices_avail;
561 unsigned char reserved[64]; /* reserved for future use */
562};
563
564struct snd_rawmidi_params {
565 int stream;
566 size_t buffer_size; /* queue size in bytes */
567 size_t avail_min; /* minimum avail bytes for wakeup */
568 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
569 unsigned char reserved[16]; /* reserved for future use */
570};
571
572struct snd_rawmidi_status {
573 int stream;
574 struct timespec tstamp; /* Timestamp */
575 size_t avail; /* available bytes */
576 size_t xruns; /* count of overruns since last status (in bytes) */
577 unsigned char reserved[16]; /* reserved for future use */
578};
579
580#define SNDRV_RAWMIDI_IOCTL_PVERSION _IOR('W', 0x00, int)
581#define SNDRV_RAWMIDI_IOCTL_INFO _IOR('W', 0x01, struct snd_rawmidi_info)
582#define SNDRV_RAWMIDI_IOCTL_PARAMS _IOWR('W', 0x10, struct snd_rawmidi_params)
583#define SNDRV_RAWMIDI_IOCTL_STATUS _IOWR('W', 0x20, struct snd_rawmidi_status)
584#define SNDRV_RAWMIDI_IOCTL_DROP _IOW('W', 0x30, int)
585#define SNDRV_RAWMIDI_IOCTL_DRAIN _IOW('W', 0x31, int)
586
587/*
588 * Timer section - /dev/snd/timer
589 */
590
591#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 6)
592
593enum {
594 SNDRV_TIMER_CLASS_NONE = -1,
595 SNDRV_TIMER_CLASS_SLAVE = 0,
596 SNDRV_TIMER_CLASS_GLOBAL,
597 SNDRV_TIMER_CLASS_CARD,
598 SNDRV_TIMER_CLASS_PCM,
599 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
600};
601
602/* slave timer classes */
603enum {
604 SNDRV_TIMER_SCLASS_NONE = 0,
605 SNDRV_TIMER_SCLASS_APPLICATION,
606 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
607 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
608 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
609};
610
611/* global timers (device member) */
612#define SNDRV_TIMER_GLOBAL_SYSTEM 0
613#define SNDRV_TIMER_GLOBAL_RTC 1
614#define SNDRV_TIMER_GLOBAL_HPET 2
615#define SNDRV_TIMER_GLOBAL_HRTIMER 3
616
617/* info flags */
618#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
619
620struct snd_timer_id {
621 int dev_class;
622 int dev_sclass;
623 int card;
624 int device;
625 int subdevice;
626};
627
628struct snd_timer_ginfo {
629 struct snd_timer_id tid; /* requested timer ID */
630 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
631 int card; /* card number */
632 unsigned char id[64]; /* timer identification */
633 unsigned char name[80]; /* timer name */
634 unsigned long reserved0; /* reserved for future use */
635 unsigned long resolution; /* average period resolution in ns */
636 unsigned long resolution_min; /* minimal period resolution in ns */
637 unsigned long resolution_max; /* maximal period resolution in ns */
638 unsigned int clients; /* active timer clients */
639 unsigned char reserved[32];
640};
641
642struct snd_timer_gparams {
643 struct snd_timer_id tid; /* requested timer ID */
644 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
645 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
646 unsigned char reserved[32];
647};
648
649struct snd_timer_gstatus {
650 struct snd_timer_id tid; /* requested timer ID */
651 unsigned long resolution; /* current period resolution in ns */
652 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
653 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
654 unsigned char reserved[32];
655};
656
657struct snd_timer_select {
658 struct snd_timer_id id; /* bind to timer ID */
659 unsigned char reserved[32]; /* reserved */
660};
661
662struct snd_timer_info {
663 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
664 int card; /* card number */
665 unsigned char id[64]; /* timer identificator */
666 unsigned char name[80]; /* timer name */
667 unsigned long reserved0; /* reserved for future use */
668 unsigned long resolution; /* average period resolution in ns */
669 unsigned char reserved[64]; /* reserved */
670};
671
672#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
673#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
674#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
675
676struct snd_timer_params {
677 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
678 unsigned int ticks; /* requested resolution in ticks */
679 unsigned int queue_size; /* total size of queue (32-1024) */
680 unsigned int reserved0; /* reserved, was: failure locations */
681 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
682 unsigned char reserved[60]; /* reserved */
683};
684
685struct snd_timer_status {
686 struct timespec tstamp; /* Timestamp - last update */
687 unsigned int resolution; /* current period resolution in ns */
688 unsigned int lost; /* counter of master tick lost */
689 unsigned int overrun; /* count of read queue overruns */
690 unsigned int queue; /* used queue size */
691 unsigned char reserved[64]; /* reserved */
692};
693
694#define SNDRV_TIMER_IOCTL_PVERSION _IOR('T', 0x00, int)
695#define SNDRV_TIMER_IOCTL_NEXT_DEVICE _IOWR('T', 0x01, struct snd_timer_id)
696#define SNDRV_TIMER_IOCTL_TREAD _IOW('T', 0x02, int)
697#define SNDRV_TIMER_IOCTL_GINFO _IOWR('T', 0x03, struct snd_timer_ginfo)
698#define SNDRV_TIMER_IOCTL_GPARAMS _IOW('T', 0x04, struct snd_timer_gparams)
699#define SNDRV_TIMER_IOCTL_GSTATUS _IOWR('T', 0x05, struct snd_timer_gstatus)
700#define SNDRV_TIMER_IOCTL_SELECT _IOW('T', 0x10, struct snd_timer_select)
701#define SNDRV_TIMER_IOCTL_INFO _IOR('T', 0x11, struct snd_timer_info)
702#define SNDRV_TIMER_IOCTL_PARAMS _IOW('T', 0x12, struct snd_timer_params)
703#define SNDRV_TIMER_IOCTL_STATUS _IOR('T', 0x14, struct snd_timer_status)
704/* The following four ioctls are changed since 1.0.9 due to confliction */
705#define SNDRV_TIMER_IOCTL_START _IO('T', 0xa0)
706#define SNDRV_TIMER_IOCTL_STOP _IO('T', 0xa1)
707#define SNDRV_TIMER_IOCTL_CONTINUE _IO('T', 0xa2)
708#define SNDRV_TIMER_IOCTL_PAUSE _IO('T', 0xa3)
709
710struct snd_timer_read {
711 unsigned int resolution;
712 unsigned int ticks;
713};
714
715enum {
716 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
717 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
718 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
719 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
720 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
721 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
722 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
723 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
724 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
725 /* master timer events for slave timer instances */
726 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
727 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
728 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
729 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
730 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
731 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
732};
733
734struct snd_timer_tread {
735 int event;
736 struct timespec tstamp;
737 unsigned int val;
738};
739
740/****************************************************************************
741 * *
742 * Section for driver control interface - /dev/snd/control? *
743 * *
744 ****************************************************************************/
745
746#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
747
748struct snd_ctl_card_info {
749 int card; /* card number */
750 int pad; /* reserved for future (was type) */
751 unsigned char id[16]; /* ID of card (user selectable) */
752 unsigned char driver[16]; /* Driver name */
753 unsigned char name[32]; /* Short name of soundcard */
754 unsigned char longname[80]; /* name + info text about soundcard */
755 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
756 unsigned char mixername[80]; /* visual mixer identification */
757 unsigned char components[128]; /* card components / fine identification, delimited with one space (AC97 etc..) */
758};
759
760typedef int __bitwise snd_ctl_elem_type_t;
761#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
762#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
763#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
764#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
765#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
766#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
767#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
768#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
769
770typedef int __bitwise snd_ctl_elem_iface_t;
771#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
772#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
773#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
774#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
775#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
776#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
777#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
778#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
779
780#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
781#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
782#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
783#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
784#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3) /* when was control changed */
785#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
786#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
787#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
788#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */
789#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
790#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
791#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
792#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */
793#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
794/* bits 30 and 31 are obsoleted (for indirect access) */
795
796/* for further details see the ACPI and PCI power management specification */
797#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
798#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
799#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
800#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
801#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
802#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
803
804struct snd_ctl_elem_id {
805 unsigned int numid; /* numeric identifier, zero = invalid */
806 snd_ctl_elem_iface_t iface; /* interface identifier */
807 unsigned int device; /* device/client number */
808 unsigned int subdevice; /* subdevice (substream) number */
809 unsigned char name[44]; /* ASCII name of item */
810 unsigned int index; /* index of item */
811};
812
813struct snd_ctl_elem_list {
814 unsigned int offset; /* W: first element ID to get */
815 unsigned int space; /* W: count of element IDs to get */
816 unsigned int used; /* R: count of element IDs set */
817 unsigned int count; /* R: count of all elements */
818 struct snd_ctl_elem_id __user *pids; /* R: IDs */
819 unsigned char reserved[50];
820};
821
822struct snd_ctl_elem_info {
823 struct snd_ctl_elem_id id; /* W: element ID */
824 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
825 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
826 unsigned int count; /* count of values */
827 __kernel_pid_t owner; /* owner's PID of this control */
828 union {
829 struct {
830 long min; /* R: minimum value */
831 long max; /* R: maximum value */
832 long step; /* R: step (0 variable) */
833 } integer;
834 struct {
835 long long min; /* R: minimum value */
836 long long max; /* R: maximum value */
837 long long step; /* R: step (0 variable) */
838 } integer64;
839 struct {
840 unsigned int items; /* R: number of items */
841 unsigned int item; /* W: item number */
842 char name[64]; /* R: value name */
843 __u64 names_ptr; /* W: names list (ELEM_ADD only) */
844 unsigned int names_length;
845 } enumerated;
846 unsigned char reserved[128];
847 } value;
848 union {
849 unsigned short d[4]; /* dimensions */
850 unsigned short *d_ptr; /* indirect - obsoleted */
851 } dimen;
852 unsigned char reserved[64-4*sizeof(unsigned short)];
853};
854
855struct snd_ctl_elem_value {
856 struct snd_ctl_elem_id id; /* W: element ID */
857 unsigned int indirect: 1; /* W: indirect access - obsoleted */
858 union {
859 union {
860 long value[128];
861 long *value_ptr; /* obsoleted */
862 } integer;
863 union {
864 long long value[64];
865 long long *value_ptr; /* obsoleted */
866 } integer64;
867 union {
868 unsigned int item[128];
869 unsigned int *item_ptr; /* obsoleted */
870 } enumerated;
871 union {
872 unsigned char data[512];
873 unsigned char *data_ptr; /* obsoleted */
874 } bytes;
875 struct snd_aes_iec958 iec958;
876 } value; /* RO */
877 struct timespec tstamp;
878 unsigned char reserved[128-sizeof(struct timespec)];
879};
880
881struct snd_ctl_tlv {
882 unsigned int numid; /* control element numeric identification */
883 unsigned int length; /* in bytes aligned to 4 */
884 unsigned int tlv[0]; /* first TLV */
885};
886
887#define SNDRV_CTL_IOCTL_PVERSION _IOR('U', 0x00, int)
888#define SNDRV_CTL_IOCTL_CARD_INFO _IOR('U', 0x01, struct snd_ctl_card_info)
889#define SNDRV_CTL_IOCTL_ELEM_LIST _IOWR('U', 0x10, struct snd_ctl_elem_list)
890#define SNDRV_CTL_IOCTL_ELEM_INFO _IOWR('U', 0x11, struct snd_ctl_elem_info)
891#define SNDRV_CTL_IOCTL_ELEM_READ _IOWR('U', 0x12, struct snd_ctl_elem_value)
892#define SNDRV_CTL_IOCTL_ELEM_WRITE _IOWR('U', 0x13, struct snd_ctl_elem_value)
893#define SNDRV_CTL_IOCTL_ELEM_LOCK _IOW('U', 0x14, struct snd_ctl_elem_id)
894#define SNDRV_CTL_IOCTL_ELEM_UNLOCK _IOW('U', 0x15, struct snd_ctl_elem_id)
895#define SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS _IOWR('U', 0x16, int)
896#define SNDRV_CTL_IOCTL_ELEM_ADD _IOWR('U', 0x17, struct snd_ctl_elem_info)
897#define SNDRV_CTL_IOCTL_ELEM_REPLACE _IOWR('U', 0x18, struct snd_ctl_elem_info)
898#define SNDRV_CTL_IOCTL_ELEM_REMOVE _IOWR('U', 0x19, struct snd_ctl_elem_id)
899#define SNDRV_CTL_IOCTL_TLV_READ _IOWR('U', 0x1a, struct snd_ctl_tlv)
900#define SNDRV_CTL_IOCTL_TLV_WRITE _IOWR('U', 0x1b, struct snd_ctl_tlv)
901#define SNDRV_CTL_IOCTL_TLV_COMMAND _IOWR('U', 0x1c, struct snd_ctl_tlv)
902#define SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE _IOWR('U', 0x20, int)
903#define SNDRV_CTL_IOCTL_HWDEP_INFO _IOR('U', 0x21, struct snd_hwdep_info)
904#define SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE _IOR('U', 0x30, int)
905#define SNDRV_CTL_IOCTL_PCM_INFO _IOWR('U', 0x31, struct snd_pcm_info)
906#define SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE _IOW('U', 0x32, int)
907#define SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE _IOWR('U', 0x40, int)
908#define SNDRV_CTL_IOCTL_RAWMIDI_INFO _IOWR('U', 0x41, struct snd_rawmidi_info)
909#define SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE _IOW('U', 0x42, int)
910#define SNDRV_CTL_IOCTL_POWER _IOWR('U', 0xd0, int)
911#define SNDRV_CTL_IOCTL_POWER_STATE _IOR('U', 0xd1, int)
912
913/*
914 * Read interface.
915 */
916
917enum sndrv_ctl_event_type {
918 SNDRV_CTL_EVENT_ELEM = 0,
919 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
920};
921
922#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
923#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
924#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
925#define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */
926#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
927
928struct snd_ctl_event {
929 int type; /* event type - SNDRV_CTL_EVENT_* */
930 union {
931 struct {
932 unsigned int mask;
933 struct snd_ctl_elem_id id;
934 } elem;
935 unsigned char data8[60];
936 } data;
937};
938
939/*
940 * Control names
941 */
942
943#define SNDRV_CTL_NAME_NONE ""
944#define SNDRV_CTL_NAME_PLAYBACK "Playback "
945#define SNDRV_CTL_NAME_CAPTURE "Capture "
946
947#define SNDRV_CTL_NAME_IEC958_NONE ""
948#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
949#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
950#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
951#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
952#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
953#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
954#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
955#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
956
957#endif /* _UAPI__SOUND_ASOUND_H */
diff --git a/include/sound/asound_fm.h b/include/uapi/sound/asound_fm.h
index c2a4b967d5be..c2a4b967d5be 100644
--- a/include/sound/asound_fm.h
+++ b/include/uapi/sound/asound_fm.h
diff --git a/include/sound/compress_offload.h b/include/uapi/sound/compress_offload.h
index 05341a43fedf..05341a43fedf 100644
--- a/include/sound/compress_offload.h
+++ b/include/uapi/sound/compress_offload.h
diff --git a/include/sound/compress_params.h b/include/uapi/sound/compress_params.h
index 602dc6c45d1a..602dc6c45d1a 100644
--- a/include/sound/compress_params.h
+++ b/include/uapi/sound/compress_params.h
diff --git a/include/uapi/sound/emu10k1.h b/include/uapi/sound/emu10k1.h
new file mode 100644
index 000000000000..d1bbaf78457a
--- /dev/null
+++ b/include/uapi/sound/emu10k1.h
@@ -0,0 +1,373 @@
1/*
2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
3 * Creative Labs, Inc.
4 * Definitions for EMU10K1 (SB Live!) chips
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22#ifndef _UAPI__SOUND_EMU10K1_H
23#define _UAPI__SOUND_EMU10K1_H
24
25#include <linux/types.h>
26
27
28
29/*
30 * ---- FX8010 ----
31 */
32
33#define EMU10K1_CARD_CREATIVE 0x00000000
34#define EMU10K1_CARD_EMUAPS 0x00000001
35
36#define EMU10K1_FX8010_PCM_COUNT 8
37
38/* instruction set */
39#define iMAC0 0x00 /* R = A + (X * Y >> 31) ; saturation */
40#define iMAC1 0x01 /* R = A + (-X * Y >> 31) ; saturation */
41#define iMAC2 0x02 /* R = A + (X * Y >> 31) ; wraparound */
42#define iMAC3 0x03 /* R = A + (-X * Y >> 31) ; wraparound */
43#define iMACINT0 0x04 /* R = A + X * Y ; saturation */
44#define iMACINT1 0x05 /* R = A + X * Y ; wraparound (31-bit) */
45#define iACC3 0x06 /* R = A + X + Y ; saturation */
46#define iMACMV 0x07 /* R = A, acc += X * Y >> 31 */
47#define iANDXOR 0x08 /* R = (A & X) ^ Y */
48#define iTSTNEG 0x09 /* R = (A >= Y) ? X : ~X */
49#define iLIMITGE 0x0a /* R = (A >= Y) ? X : Y */
50#define iLIMITLT 0x0b /* R = (A < Y) ? X : Y */
51#define iLOG 0x0c /* R = linear_data, A (log_data), X (max_exp), Y (format_word) */
52#define iEXP 0x0d /* R = log_data, A (linear_data), X (max_exp), Y (format_word) */
53#define iINTERP 0x0e /* R = A + (X * (Y - A) >> 31) ; saturation */
54#define iSKIP 0x0f /* R = A (cc_reg), X (count), Y (cc_test) */
55
56/* GPRs */
57#define FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x0f */
58#define EXTIN(x) (0x10 + (x)) /* x = 0x00 - 0x0f */
59#define EXTOUT(x) (0x20 + (x)) /* x = 0x00 - 0x0f physical outs -> FXWC low 16 bits */
60#define FXBUS2(x) (0x30 + (x)) /* x = 0x00 - 0x0f copies of fx buses for capture -> FXWC high 16 bits */
61 /* NB: 0x31 and 0x32 are shared with Center/LFE on SB live 5.1 */
62
63#define C_00000000 0x40
64#define C_00000001 0x41
65#define C_00000002 0x42
66#define C_00000003 0x43
67#define C_00000004 0x44
68#define C_00000008 0x45
69#define C_00000010 0x46
70#define C_00000020 0x47
71#define C_00000100 0x48
72#define C_00010000 0x49
73#define C_00080000 0x4a
74#define C_10000000 0x4b
75#define C_20000000 0x4c
76#define C_40000000 0x4d
77#define C_80000000 0x4e
78#define C_7fffffff 0x4f
79#define C_ffffffff 0x50
80#define C_fffffffe 0x51
81#define C_c0000000 0x52
82#define C_4f1bbcdc 0x53
83#define C_5a7ef9db 0x54
84#define C_00100000 0x55 /* ?? */
85#define GPR_ACCU 0x56 /* ACCUM, accumulator */
86#define GPR_COND 0x57 /* CCR, condition register */
87#define GPR_NOISE0 0x58 /* noise source */
88#define GPR_NOISE1 0x59 /* noise source */
89#define GPR_IRQ 0x5a /* IRQ register */
90#define GPR_DBAC 0x5b /* TRAM Delay Base Address Counter */
91#define GPR(x) (FXGPREGBASE + (x)) /* free GPRs: x = 0x00 - 0xff */
92#define ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
93#define ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
94#define ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0x7f */
95#define ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x80 + (x)) /* x = 0x00 - 0x1f */
96
97#define A_ITRAM_DATA(x) (TANKMEMDATAREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
98#define A_ETRAM_DATA(x) (TANKMEMDATAREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
99#define A_ITRAM_ADDR(x) (TANKMEMADDRREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
100#define A_ETRAM_ADDR(x) (TANKMEMADDRREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
101#define A_ITRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0x00 + (x)) /* x = 0x00 - 0xbf */
102#define A_ETRAM_CTL(x) (A_TANKMEMCTLREGBASE + 0xc0 + (x)) /* x = 0x00 - 0x3f */
103
104#define A_FXBUS(x) (0x00 + (x)) /* x = 0x00 - 0x3f FX buses */
105#define A_EXTIN(x) (0x40 + (x)) /* x = 0x00 - 0x0f physical ins */
106#define A_P16VIN(x) (0x50 + (x)) /* x = 0x00 - 0x0f p16v ins (A2 only) "EMU32 inputs" */
107#define A_EXTOUT(x) (0x60 + (x)) /* x = 0x00 - 0x1f physical outs -> A_FXWC1 0x79-7f unknown */
108#define A_FXBUS2(x) (0x80 + (x)) /* x = 0x00 - 0x1f extra outs used for EFX capture -> A_FXWC2 */
109#define A_EMU32OUTH(x) (0xa0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_10 - _1F" - ??? */
110#define A_EMU32OUTL(x) (0xb0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_1 - _F" - ??? */
111#define A3_EMU32IN(x) (0x160 + (x)) /* x = 0x00 - 0x3f "EMU32_IN_00 - _3F" - Only when .device = 0x0008 */
112#define A3_EMU32OUT(x) (0x1E0 + (x)) /* x = 0x00 - 0x0f "EMU32_OUT_00 - _3F" - Only when .device = 0x0008 */
113#define A_GPR(x) (A_FXGPREGBASE + (x))
114
115/* cc_reg constants */
116#define CC_REG_NORMALIZED C_00000001
117#define CC_REG_BORROW C_00000002
118#define CC_REG_MINUS C_00000004
119#define CC_REG_ZERO C_00000008
120#define CC_REG_SATURATE C_00000010
121#define CC_REG_NONZERO C_00000100
122
123/* FX buses */
124#define FXBUS_PCM_LEFT 0x00
125#define FXBUS_PCM_RIGHT 0x01
126#define FXBUS_PCM_LEFT_REAR 0x02
127#define FXBUS_PCM_RIGHT_REAR 0x03
128#define FXBUS_MIDI_LEFT 0x04
129#define FXBUS_MIDI_RIGHT 0x05
130#define FXBUS_PCM_CENTER 0x06
131#define FXBUS_PCM_LFE 0x07
132#define FXBUS_PCM_LEFT_FRONT 0x08
133#define FXBUS_PCM_RIGHT_FRONT 0x09
134#define FXBUS_MIDI_REVERB 0x0c
135#define FXBUS_MIDI_CHORUS 0x0d
136#define FXBUS_PCM_LEFT_SIDE 0x0e
137#define FXBUS_PCM_RIGHT_SIDE 0x0f
138#define FXBUS_PT_LEFT 0x14
139#define FXBUS_PT_RIGHT 0x15
140
141/* Inputs */
142#define EXTIN_AC97_L 0x00 /* AC'97 capture channel - left */
143#define EXTIN_AC97_R 0x01 /* AC'97 capture channel - right */
144#define EXTIN_SPDIF_CD_L 0x02 /* internal S/PDIF CD - onboard - left */
145#define EXTIN_SPDIF_CD_R 0x03 /* internal S/PDIF CD - onboard - right */
146#define EXTIN_ZOOM_L 0x04 /* Zoom Video I2S - left */
147#define EXTIN_ZOOM_R 0x05 /* Zoom Video I2S - right */
148#define EXTIN_TOSLINK_L 0x06 /* LiveDrive - TOSLink Optical - left */
149#define EXTIN_TOSLINK_R 0x07 /* LiveDrive - TOSLink Optical - right */
150#define EXTIN_LINE1_L 0x08 /* LiveDrive - Line/Mic 1 - left */
151#define EXTIN_LINE1_R 0x09 /* LiveDrive - Line/Mic 1 - right */
152#define EXTIN_COAX_SPDIF_L 0x0a /* LiveDrive - Coaxial S/PDIF - left */
153#define EXTIN_COAX_SPDIF_R 0x0b /* LiveDrive - Coaxial S/PDIF - right */
154#define EXTIN_LINE2_L 0x0c /* LiveDrive - Line/Mic 2 - left */
155#define EXTIN_LINE2_R 0x0d /* LiveDrive - Line/Mic 2 - right */
156
157/* Outputs */
158#define EXTOUT_AC97_L 0x00 /* AC'97 playback channel - left */
159#define EXTOUT_AC97_R 0x01 /* AC'97 playback channel - right */
160#define EXTOUT_TOSLINK_L 0x02 /* LiveDrive - TOSLink Optical - left */
161#define EXTOUT_TOSLINK_R 0x03 /* LiveDrive - TOSLink Optical - right */
162#define EXTOUT_AC97_CENTER 0x04 /* SB Live 5.1 - center */
163#define EXTOUT_AC97_LFE 0x05 /* SB Live 5.1 - LFE */
164#define EXTOUT_HEADPHONE_L 0x06 /* LiveDrive - Headphone - left */
165#define EXTOUT_HEADPHONE_R 0x07 /* LiveDrive - Headphone - right */
166#define EXTOUT_REAR_L 0x08 /* Rear channel - left */
167#define EXTOUT_REAR_R 0x09 /* Rear channel - right */
168#define EXTOUT_ADC_CAP_L 0x0a /* ADC Capture buffer - left */
169#define EXTOUT_ADC_CAP_R 0x0b /* ADC Capture buffer - right */
170#define EXTOUT_MIC_CAP 0x0c /* MIC Capture buffer */
171#define EXTOUT_AC97_REAR_L 0x0d /* SB Live 5.1 (c) 2003 - Rear Left */
172#define EXTOUT_AC97_REAR_R 0x0e /* SB Live 5.1 (c) 2003 - Rear Right */
173#define EXTOUT_ACENTER 0x11 /* Analog Center */
174#define EXTOUT_ALFE 0x12 /* Analog LFE */
175
176/* Audigy Inputs */
177#define A_EXTIN_AC97_L 0x00 /* AC'97 capture channel - left */
178#define A_EXTIN_AC97_R 0x01 /* AC'97 capture channel - right */
179#define A_EXTIN_SPDIF_CD_L 0x02 /* digital CD left */
180#define A_EXTIN_SPDIF_CD_R 0x03 /* digital CD left */
181#define A_EXTIN_OPT_SPDIF_L 0x04 /* audigy drive Optical SPDIF - left */
182#define A_EXTIN_OPT_SPDIF_R 0x05 /* right */
183#define A_EXTIN_LINE2_L 0x08 /* audigy drive line2/mic2 - left */
184#define A_EXTIN_LINE2_R 0x09 /* right */
185#define A_EXTIN_ADC_L 0x0a /* Philips ADC - left */
186#define A_EXTIN_ADC_R 0x0b /* right */
187#define A_EXTIN_AUX2_L 0x0c /* audigy drive aux2 - left */
188#define A_EXTIN_AUX2_R 0x0d /* - right */
189
190/* Audigiy Outputs */
191#define A_EXTOUT_FRONT_L 0x00 /* digital front left */
192#define A_EXTOUT_FRONT_R 0x01 /* right */
193#define A_EXTOUT_CENTER 0x02 /* digital front center */
194#define A_EXTOUT_LFE 0x03 /* digital front lfe */
195#define A_EXTOUT_HEADPHONE_L 0x04 /* headphone audigy drive left */
196#define A_EXTOUT_HEADPHONE_R 0x05 /* right */
197#define A_EXTOUT_REAR_L 0x06 /* digital rear left */
198#define A_EXTOUT_REAR_R 0x07 /* right */
199#define A_EXTOUT_AFRONT_L 0x08 /* analog front left */
200#define A_EXTOUT_AFRONT_R 0x09 /* right */
201#define A_EXTOUT_ACENTER 0x0a /* analog center */
202#define A_EXTOUT_ALFE 0x0b /* analog LFE */
203#define A_EXTOUT_ASIDE_L 0x0c /* analog side left - Audigy 2 ZS */
204#define A_EXTOUT_ASIDE_R 0x0d /* right - Audigy 2 ZS */
205#define A_EXTOUT_AREAR_L 0x0e /* analog rear left */
206#define A_EXTOUT_AREAR_R 0x0f /* right */
207#define A_EXTOUT_AC97_L 0x10 /* AC97 left (front) */
208#define A_EXTOUT_AC97_R 0x11 /* right */
209#define A_EXTOUT_ADC_CAP_L 0x16 /* ADC capture buffer left */
210#define A_EXTOUT_ADC_CAP_R 0x17 /* right */
211#define A_EXTOUT_MIC_CAP 0x18 /* Mic capture buffer */
212
213/* Audigy constants */
214#define A_C_00000000 0xc0
215#define A_C_00000001 0xc1
216#define A_C_00000002 0xc2
217#define A_C_00000003 0xc3
218#define A_C_00000004 0xc4
219#define A_C_00000008 0xc5
220#define A_C_00000010 0xc6
221#define A_C_00000020 0xc7
222#define A_C_00000100 0xc8
223#define A_C_00010000 0xc9
224#define A_C_00000800 0xca
225#define A_C_10000000 0xcb
226#define A_C_20000000 0xcc
227#define A_C_40000000 0xcd
228#define A_C_80000000 0xce
229#define A_C_7fffffff 0xcf
230#define A_C_ffffffff 0xd0
231#define A_C_fffffffe 0xd1
232#define A_C_c0000000 0xd2
233#define A_C_4f1bbcdc 0xd3
234#define A_C_5a7ef9db 0xd4
235#define A_C_00100000 0xd5
236#define A_GPR_ACCU 0xd6 /* ACCUM, accumulator */
237#define A_GPR_COND 0xd7 /* CCR, condition register */
238#define A_GPR_NOISE0 0xd8 /* noise source */
239#define A_GPR_NOISE1 0xd9 /* noise source */
240#define A_GPR_IRQ 0xda /* IRQ register */
241#define A_GPR_DBAC 0xdb /* TRAM Delay Base Address Counter - internal */
242#define A_GPR_DBACE 0xde /* TRAM Delay Base Address Counter - external */
243
244/* definitions for debug register */
245#define EMU10K1_DBG_ZC 0x80000000 /* zero tram counter */
246#define EMU10K1_DBG_SATURATION_OCCURED 0x02000000 /* saturation control */
247#define EMU10K1_DBG_SATURATION_ADDR 0x01ff0000 /* saturation address */
248#define EMU10K1_DBG_SINGLE_STEP 0x00008000 /* single step mode */
249#define EMU10K1_DBG_STEP 0x00004000 /* start single step */
250#define EMU10K1_DBG_CONDITION_CODE 0x00003e00 /* condition code */
251#define EMU10K1_DBG_SINGLE_STEP_ADDR 0x000001ff /* single step address */
252
253/* tank memory address line */
254#ifndef __KERNEL__
255#define TANKMEMADDRREG_ADDR_MASK 0x000fffff /* 20 bit tank address field */
256#define TANKMEMADDRREG_CLEAR 0x00800000 /* Clear tank memory */
257#define TANKMEMADDRREG_ALIGN 0x00400000 /* Align read or write relative to tank access */
258#define TANKMEMADDRREG_WRITE 0x00200000 /* Write to tank memory */
259#define TANKMEMADDRREG_READ 0x00100000 /* Read from tank memory */
260#endif
261
262struct snd_emu10k1_fx8010_info {
263 unsigned int internal_tram_size; /* in samples */
264 unsigned int external_tram_size; /* in samples */
265 char fxbus_names[16][32]; /* names of FXBUSes */
266 char extin_names[16][32]; /* names of external inputs */
267 char extout_names[32][32]; /* names of external outputs */
268 unsigned int gpr_controls; /* count of GPR controls */
269};
270
271#define EMU10K1_GPR_TRANSLATION_NONE 0
272#define EMU10K1_GPR_TRANSLATION_TABLE100 1
273#define EMU10K1_GPR_TRANSLATION_BASS 2
274#define EMU10K1_GPR_TRANSLATION_TREBLE 3
275#define EMU10K1_GPR_TRANSLATION_ONOFF 4
276
277struct snd_emu10k1_fx8010_control_gpr {
278 struct snd_ctl_elem_id id; /* full control ID definition */
279 unsigned int vcount; /* visible count */
280 unsigned int count; /* count of GPR (1..16) */
281 unsigned short gpr[32]; /* GPR number(s) */
282 unsigned int value[32]; /* initial values */
283 unsigned int min; /* minimum range */
284 unsigned int max; /* maximum range */
285 unsigned int translation; /* translation type (EMU10K1_GPR_TRANSLATION*) */
286 const unsigned int *tlv;
287};
288
289/* old ABI without TLV support */
290struct snd_emu10k1_fx8010_control_old_gpr {
291 struct snd_ctl_elem_id id;
292 unsigned int vcount;
293 unsigned int count;
294 unsigned short gpr[32];
295 unsigned int value[32];
296 unsigned int min;
297 unsigned int max;
298 unsigned int translation;
299};
300
301struct snd_emu10k1_fx8010_code {
302 char name[128];
303
304 DECLARE_BITMAP(gpr_valid, 0x200); /* bitmask of valid initializers */
305 __u32 __user *gpr_map; /* initializers */
306
307 unsigned int gpr_add_control_count; /* count of GPR controls to add/replace */
308 struct snd_emu10k1_fx8010_control_gpr __user *gpr_add_controls; /* GPR controls to add/replace */
309
310 unsigned int gpr_del_control_count; /* count of GPR controls to remove */
311 struct snd_ctl_elem_id __user *gpr_del_controls; /* IDs of GPR controls to remove */
312
313 unsigned int gpr_list_control_count; /* count of GPR controls to list */
314 unsigned int gpr_list_control_total; /* total count of GPR controls */
315 struct snd_emu10k1_fx8010_control_gpr __user *gpr_list_controls; /* listed GPR controls */
316
317 DECLARE_BITMAP(tram_valid, 0x100); /* bitmask of valid initializers */
318 __u32 __user *tram_data_map; /* data initializers */
319 __u32 __user *tram_addr_map; /* map initializers */
320
321 DECLARE_BITMAP(code_valid, 1024); /* bitmask of valid instructions */
322 __u32 __user *code; /* one instruction - 64 bits */
323};
324
325struct snd_emu10k1_fx8010_tram {
326 unsigned int address; /* 31.bit == 1 -> external TRAM */
327 unsigned int size; /* size in samples (4 bytes) */
328 unsigned int *samples; /* pointer to samples (20-bit) */
329 /* NULL->clear memory */
330};
331
332struct snd_emu10k1_fx8010_pcm_rec {
333 unsigned int substream; /* substream number */
334 unsigned int res1; /* reserved */
335 unsigned int channels; /* 16-bit channels count, zero = remove this substream */
336 unsigned int tram_start; /* ring buffer position in TRAM (in samples) */
337 unsigned int buffer_size; /* count of buffered samples */
338 unsigned short gpr_size; /* GPR containing size of ringbuffer in samples (host) */
339 unsigned short gpr_ptr; /* GPR containing current pointer in the ring buffer (host = reset, FX8010) */
340 unsigned short gpr_count; /* GPR containing count of samples between two interrupts (host) */
341 unsigned short gpr_tmpcount; /* GPR containing current count of samples to interrupt (host = set, FX8010) */
342 unsigned short gpr_trigger; /* GPR containing trigger (activate) information (host) */
343 unsigned short gpr_running; /* GPR containing info if PCM is running (FX8010) */
344 unsigned char pad; /* reserved */
345 unsigned char etram[32]; /* external TRAM address & data (one per channel) */
346 unsigned int res2; /* reserved */
347};
348
349#define SNDRV_EMU10K1_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
350
351#define SNDRV_EMU10K1_IOCTL_INFO _IOR ('H', 0x10, struct snd_emu10k1_fx8010_info)
352#define SNDRV_EMU10K1_IOCTL_CODE_POKE _IOW ('H', 0x11, struct snd_emu10k1_fx8010_code)
353#define SNDRV_EMU10K1_IOCTL_CODE_PEEK _IOWR('H', 0x12, struct snd_emu10k1_fx8010_code)
354#define SNDRV_EMU10K1_IOCTL_TRAM_SETUP _IOW ('H', 0x20, int)
355#define SNDRV_EMU10K1_IOCTL_TRAM_POKE _IOW ('H', 0x21, struct snd_emu10k1_fx8010_tram)
356#define SNDRV_EMU10K1_IOCTL_TRAM_PEEK _IOWR('H', 0x22, struct snd_emu10k1_fx8010_tram)
357#define SNDRV_EMU10K1_IOCTL_PCM_POKE _IOW ('H', 0x30, struct snd_emu10k1_fx8010_pcm_rec)
358#define SNDRV_EMU10K1_IOCTL_PCM_PEEK _IOWR('H', 0x31, struct snd_emu10k1_fx8010_pcm_rec)
359#define SNDRV_EMU10K1_IOCTL_PVERSION _IOR ('H', 0x40, int)
360#define SNDRV_EMU10K1_IOCTL_STOP _IO ('H', 0x80)
361#define SNDRV_EMU10K1_IOCTL_CONTINUE _IO ('H', 0x81)
362#define SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER _IO ('H', 0x82)
363#define SNDRV_EMU10K1_IOCTL_SINGLE_STEP _IOW ('H', 0x83, int)
364#define SNDRV_EMU10K1_IOCTL_DBG_READ _IOR ('H', 0x84, int)
365
366/* typedefs for compatibility to user-space */
367typedef struct snd_emu10k1_fx8010_info emu10k1_fx8010_info_t;
368typedef struct snd_emu10k1_fx8010_control_gpr emu10k1_fx8010_control_gpr_t;
369typedef struct snd_emu10k1_fx8010_code emu10k1_fx8010_code_t;
370typedef struct snd_emu10k1_fx8010_tram emu10k1_fx8010_tram_t;
371typedef struct snd_emu10k1_fx8010_pcm_rec emu10k1_fx8010_pcm_t;
372
373#endif /* _UAPI__SOUND_EMU10K1_H */
diff --git a/include/sound/hdsp.h b/include/uapi/sound/hdsp.h
index 0909a3843479..0909a3843479 100644
--- a/include/sound/hdsp.h
+++ b/include/uapi/sound/hdsp.h
diff --git a/include/sound/hdspm.h b/include/uapi/sound/hdspm.h
index 1f59ea2a4a76..1f59ea2a4a76 100644
--- a/include/sound/hdspm.h
+++ b/include/uapi/sound/hdspm.h
diff --git a/include/uapi/sound/sb16_csp.h b/include/uapi/sound/sb16_csp.h
new file mode 100644
index 000000000000..3b96907e2afb
--- /dev/null
+++ b/include/uapi/sound/sb16_csp.h
@@ -0,0 +1,122 @@
1/*
2 * Copyright (c) 1999 by Uros Bizjak <uros@kss-loka.si>
3 * Takashi Iwai <tiwai@suse.de>
4 *
5 * SB16ASP/AWE32 CSP control
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22#ifndef _UAPI__SOUND_SB16_CSP_H
23#define _UAPI__SOUND_SB16_CSP_H
24
25
26/* CSP modes */
27#define SNDRV_SB_CSP_MODE_NONE 0x00
28#define SNDRV_SB_CSP_MODE_DSP_READ 0x01 /* Record from DSP */
29#define SNDRV_SB_CSP_MODE_DSP_WRITE 0x02 /* Play to DSP */
30#define SNDRV_SB_CSP_MODE_QSOUND 0x04 /* QSound */
31
32/* CSP load flags */
33#define SNDRV_SB_CSP_LOAD_FROMUSER 0x01
34#define SNDRV_SB_CSP_LOAD_INITBLOCK 0x02
35
36/* CSP sample width */
37#define SNDRV_SB_CSP_SAMPLE_8BIT 0x01
38#define SNDRV_SB_CSP_SAMPLE_16BIT 0x02
39
40/* CSP channels */
41#define SNDRV_SB_CSP_MONO 0x01
42#define SNDRV_SB_CSP_STEREO 0x02
43
44/* CSP rates */
45#define SNDRV_SB_CSP_RATE_8000 0x01
46#define SNDRV_SB_CSP_RATE_11025 0x02
47#define SNDRV_SB_CSP_RATE_22050 0x04
48#define SNDRV_SB_CSP_RATE_44100 0x08
49#define SNDRV_SB_CSP_RATE_ALL 0x0f
50
51/* CSP running state */
52#define SNDRV_SB_CSP_ST_IDLE 0x00
53#define SNDRV_SB_CSP_ST_LOADED 0x01
54#define SNDRV_SB_CSP_ST_RUNNING 0x02
55#define SNDRV_SB_CSP_ST_PAUSED 0x04
56#define SNDRV_SB_CSP_ST_AUTO 0x08
57#define SNDRV_SB_CSP_ST_QSOUND 0x10
58
59/* maximum QSound value (180 degrees right) */
60#define SNDRV_SB_CSP_QSOUND_MAX_RIGHT 0x20
61
62/* maximum microcode RIFF file size */
63#define SNDRV_SB_CSP_MAX_MICROCODE_FILE_SIZE 0x3000
64
65/* microcode header */
66struct snd_sb_csp_mc_header {
67 char codec_name[16]; /* id name of codec */
68 unsigned short func_req; /* requested function */
69};
70
71/* microcode to be loaded */
72struct snd_sb_csp_microcode {
73 struct snd_sb_csp_mc_header info;
74 unsigned char data[SNDRV_SB_CSP_MAX_MICROCODE_FILE_SIZE];
75};
76
77/* start CSP with sample_width in mono/stereo */
78struct snd_sb_csp_start {
79 int sample_width; /* sample width, look above */
80 int channels; /* channels, look above */
81};
82
83/* CSP information */
84struct snd_sb_csp_info {
85 char codec_name[16]; /* id name of codec */
86 unsigned short func_nr; /* function number */
87 unsigned int acc_format; /* accepted PCM formats */
88 unsigned short acc_channels; /* accepted channels */
89 unsigned short acc_width; /* accepted sample width */
90 unsigned short acc_rates; /* accepted sample rates */
91 unsigned short csp_mode; /* CSP mode, see above */
92 unsigned short run_channels; /* current channels */
93 unsigned short run_width; /* current sample width */
94 unsigned short version; /* version id: 0x10 - 0x1f */
95 unsigned short state; /* state bits */
96};
97
98/* HWDEP controls */
99/* get CSP information */
100#define SNDRV_SB_CSP_IOCTL_INFO _IOR('H', 0x10, struct snd_sb_csp_info)
101/* load microcode to CSP */
102/* NOTE: struct snd_sb_csp_microcode overflows the max size (13 bits)
103 * defined for some architectures like MIPS, and it leads to build errors.
104 * (x86 and co have 14-bit size, thus it's valid, though.)
105 * As a workaround for skipping the size-limit check, here we don't use the
106 * normal _IOW() macro but _IOC() with the manual argument.
107 */
108#define SNDRV_SB_CSP_IOCTL_LOAD_CODE \
109 _IOC(_IOC_WRITE, 'H', 0x11, sizeof(struct snd_sb_csp_microcode))
110/* unload microcode from CSP */
111#define SNDRV_SB_CSP_IOCTL_UNLOAD_CODE _IO('H', 0x12)
112/* start CSP */
113#define SNDRV_SB_CSP_IOCTL_START _IOW('H', 0x13, struct snd_sb_csp_start)
114/* stop CSP */
115#define SNDRV_SB_CSP_IOCTL_STOP _IO('H', 0x14)
116/* pause CSP and DMA transfer */
117#define SNDRV_SB_CSP_IOCTL_PAUSE _IO('H', 0x15)
118/* restart CSP and DMA transfer */
119#define SNDRV_SB_CSP_IOCTL_RESTART _IO('H', 0x16)
120
121
122#endif /* _UAPI__SOUND_SB16_CSP_H */
diff --git a/include/sound/sfnt_info.h b/include/uapi/sound/sfnt_info.h
index 1bce7fd1725f..1bce7fd1725f 100644
--- a/include/sound/sfnt_info.h
+++ b/include/uapi/sound/sfnt_info.h
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-07 21:25:30 -0500