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authorMark Brown <broonie@opensource.wolfsonmicro.com>2012-06-11 06:09:46 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-06-11 08:22:12 -0400
commit66c2b7377a7cf22c48ebba7fdff5340ab492b7bc (patch)
treed262fe14f2a30ef5d4752ba7d187a8a31c225f34
parent679d7abdc7543e56abc41b8f4858f31a91259b29 (diff)
ASoC: wm8996: Remove write sequencer registers from the defaults table
They aren't marked as readable and the feature is never used so they'll never get referenced. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat
-rw-r--r--sound/soc/codecs/wm8996.c178
1 files changed, 0 insertions, 178 deletions
diff --git a/sound/soc/codecs/wm8996.c b/sound/soc/codecs/wm8996.c
index efc4e9d0903b..f24989f090ca 100644
--- a/sound/soc/codecs/wm8996.c
+++ b/sound/soc/codecs/wm8996.c
@@ -296,184 +296,6 @@ static struct reg_default wm8996_reg[] = {
296 { WM8996_RIGHT_PDM_SPEAKER, 0x1 }, 296 { WM8996_RIGHT_PDM_SPEAKER, 0x1 },
297 { WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 }, 297 { WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 },
298 { WM8996_PDM_SPEAKER_VOLUME, 0x66 }, 298 { WM8996_PDM_SPEAKER_VOLUME, 0x66 },
299 { WM8996_WRITE_SEQUENCER_0, 0x1 },
300 { WM8996_WRITE_SEQUENCER_1, 0x1 },
301 { WM8996_WRITE_SEQUENCER_3, 0x6 },
302 { WM8996_WRITE_SEQUENCER_4, 0x40 },
303 { WM8996_WRITE_SEQUENCER_5, 0x1 },
304 { WM8996_WRITE_SEQUENCER_6, 0xf },
305 { WM8996_WRITE_SEQUENCER_7, 0x6 },
306 { WM8996_WRITE_SEQUENCER_8, 0x1 },
307 { WM8996_WRITE_SEQUENCER_9, 0x3 },
308 { WM8996_WRITE_SEQUENCER_10, 0x104 },
309 { WM8996_WRITE_SEQUENCER_12, 0x60 },
310 { WM8996_WRITE_SEQUENCER_13, 0x11 },
311 { WM8996_WRITE_SEQUENCER_14, 0x401 },
312 { WM8996_WRITE_SEQUENCER_16, 0x50 },
313 { WM8996_WRITE_SEQUENCER_17, 0x3 },
314 { WM8996_WRITE_SEQUENCER_18, 0x100 },
315 { WM8996_WRITE_SEQUENCER_20, 0x51 },
316 { WM8996_WRITE_SEQUENCER_21, 0x3 },
317 { WM8996_WRITE_SEQUENCER_22, 0x104 },
318 { WM8996_WRITE_SEQUENCER_23, 0xa },
319 { WM8996_WRITE_SEQUENCER_24, 0x60 },
320 { WM8996_WRITE_SEQUENCER_25, 0x3b },
321 { WM8996_WRITE_SEQUENCER_26, 0x502 },
322 { WM8996_WRITE_SEQUENCER_27, 0x100 },
323 { WM8996_WRITE_SEQUENCER_28, 0x2fff },
324 { WM8996_WRITE_SEQUENCER_32, 0x2fff },
325 { WM8996_WRITE_SEQUENCER_36, 0x2fff },
326 { WM8996_WRITE_SEQUENCER_40, 0x2fff },
327 { WM8996_WRITE_SEQUENCER_44, 0x2fff },
328 { WM8996_WRITE_SEQUENCER_48, 0x2fff },
329 { WM8996_WRITE_SEQUENCER_52, 0x2fff },
330 { WM8996_WRITE_SEQUENCER_56, 0x2fff },
331 { WM8996_WRITE_SEQUENCER_60, 0x2fff },
332 { WM8996_WRITE_SEQUENCER_64, 0x1 },
333 { WM8996_WRITE_SEQUENCER_65, 0x1 },
334 { WM8996_WRITE_SEQUENCER_67, 0x6 },
335 { WM8996_WRITE_SEQUENCER_68, 0x40 },
336 { WM8996_WRITE_SEQUENCER_69, 0x1 },
337 { WM8996_WRITE_SEQUENCER_70, 0xf },
338 { WM8996_WRITE_SEQUENCER_71, 0x6 },
339 { WM8996_WRITE_SEQUENCER_72, 0x1 },
340 { WM8996_WRITE_SEQUENCER_73, 0x3 },
341 { WM8996_WRITE_SEQUENCER_74, 0x104 },
342 { WM8996_WRITE_SEQUENCER_76, 0x60 },
343 { WM8996_WRITE_SEQUENCER_77, 0x11 },
344 { WM8996_WRITE_SEQUENCER_78, 0x401 },
345 { WM8996_WRITE_SEQUENCER_80, 0x50 },
346 { WM8996_WRITE_SEQUENCER_81, 0x3 },
347 { WM8996_WRITE_SEQUENCER_82, 0x100 },
348 { WM8996_WRITE_SEQUENCER_84, 0x60 },
349 { WM8996_WRITE_SEQUENCER_85, 0x3b },
350 { WM8996_WRITE_SEQUENCER_86, 0x502 },
351 { WM8996_WRITE_SEQUENCER_87, 0x100 },
352 { WM8996_WRITE_SEQUENCER_88, 0x2fff },
353 { WM8996_WRITE_SEQUENCER_92, 0x2fff },
354 { WM8996_WRITE_SEQUENCER_96, 0x2fff },
355 { WM8996_WRITE_SEQUENCER_100, 0x2fff },
356 { WM8996_WRITE_SEQUENCER_104, 0x2fff },
357 { WM8996_WRITE_SEQUENCER_108, 0x2fff },
358 { WM8996_WRITE_SEQUENCER_112, 0x2fff },
359 { WM8996_WRITE_SEQUENCER_116, 0x2fff },
360 { WM8996_WRITE_SEQUENCER_120, 0x2fff },
361 { WM8996_WRITE_SEQUENCER_124, 0x2fff },
362 { WM8996_WRITE_SEQUENCER_128, 0x1 },
363 { WM8996_WRITE_SEQUENCER_129, 0x1 },
364 { WM8996_WRITE_SEQUENCER_131, 0x6 },
365 { WM8996_WRITE_SEQUENCER_132, 0x40 },
366 { WM8996_WRITE_SEQUENCER_133, 0x1 },
367 { WM8996_WRITE_SEQUENCER_134, 0xf },
368 { WM8996_WRITE_SEQUENCER_135, 0x6 },
369 { WM8996_WRITE_SEQUENCER_136, 0x1 },
370 { WM8996_WRITE_SEQUENCER_137, 0x3 },
371 { WM8996_WRITE_SEQUENCER_138, 0x106 },
372 { WM8996_WRITE_SEQUENCER_140, 0x61 },
373 { WM8996_WRITE_SEQUENCER_141, 0x11 },
374 { WM8996_WRITE_SEQUENCER_142, 0x401 },
375 { WM8996_WRITE_SEQUENCER_144, 0x50 },
376 { WM8996_WRITE_SEQUENCER_145, 0x3 },
377 { WM8996_WRITE_SEQUENCER_146, 0x102 },
378 { WM8996_WRITE_SEQUENCER_148, 0x51 },
379 { WM8996_WRITE_SEQUENCER_149, 0x3 },
380 { WM8996_WRITE_SEQUENCER_150, 0x106 },
381 { WM8996_WRITE_SEQUENCER_151, 0xa },
382 { WM8996_WRITE_SEQUENCER_152, 0x61 },
383 { WM8996_WRITE_SEQUENCER_153, 0x3b },
384 { WM8996_WRITE_SEQUENCER_154, 0x502 },
385 { WM8996_WRITE_SEQUENCER_155, 0x100 },
386 { WM8996_WRITE_SEQUENCER_156, 0x2fff },
387 { WM8996_WRITE_SEQUENCER_160, 0x2fff },
388 { WM8996_WRITE_SEQUENCER_164, 0x2fff },
389 { WM8996_WRITE_SEQUENCER_168, 0x2fff },
390 { WM8996_WRITE_SEQUENCER_172, 0x2fff },
391 { WM8996_WRITE_SEQUENCER_176, 0x2fff },
392 { WM8996_WRITE_SEQUENCER_180, 0x2fff },
393 { WM8996_WRITE_SEQUENCER_184, 0x2fff },
394 { WM8996_WRITE_SEQUENCER_188, 0x2fff },
395 { WM8996_WRITE_SEQUENCER_192, 0x1 },
396 { WM8996_WRITE_SEQUENCER_193, 0x1 },
397 { WM8996_WRITE_SEQUENCER_195, 0x6 },
398 { WM8996_WRITE_SEQUENCER_196, 0x40 },
399 { WM8996_WRITE_SEQUENCER_197, 0x1 },
400 { WM8996_WRITE_SEQUENCER_198, 0xf },
401 { WM8996_WRITE_SEQUENCER_199, 0x6 },
402 { WM8996_WRITE_SEQUENCER_200, 0x1 },
403 { WM8996_WRITE_SEQUENCER_201, 0x3 },
404 { WM8996_WRITE_SEQUENCER_202, 0x106 },
405 { WM8996_WRITE_SEQUENCER_204, 0x61 },
406 { WM8996_WRITE_SEQUENCER_205, 0x11 },
407 { WM8996_WRITE_SEQUENCER_206, 0x401 },
408 { WM8996_WRITE_SEQUENCER_208, 0x50 },
409 { WM8996_WRITE_SEQUENCER_209, 0x3 },
410 { WM8996_WRITE_SEQUENCER_210, 0x102 },
411 { WM8996_WRITE_SEQUENCER_212, 0x61 },
412 { WM8996_WRITE_SEQUENCER_213, 0x3b },
413 { WM8996_WRITE_SEQUENCER_214, 0x502 },
414 { WM8996_WRITE_SEQUENCER_215, 0x100 },
415 { WM8996_WRITE_SEQUENCER_216, 0x2fff },
416 { WM8996_WRITE_SEQUENCER_220, 0x2fff },
417 { WM8996_WRITE_SEQUENCER_224, 0x2fff },
418 { WM8996_WRITE_SEQUENCER_228, 0x2fff },
419 { WM8996_WRITE_SEQUENCER_232, 0x2fff },
420 { WM8996_WRITE_SEQUENCER_236, 0x2fff },
421 { WM8996_WRITE_SEQUENCER_240, 0x2fff },
422 { WM8996_WRITE_SEQUENCER_244, 0x2fff },
423 { WM8996_WRITE_SEQUENCER_248, 0x2fff },
424 { WM8996_WRITE_SEQUENCER_252, 0x2fff },
425 { WM8996_WRITE_SEQUENCER_256, 0x60 },
426 { WM8996_WRITE_SEQUENCER_258, 0x601 },
427 { WM8996_WRITE_SEQUENCER_260, 0x50 },
428 { WM8996_WRITE_SEQUENCER_262, 0x100 },
429 { WM8996_WRITE_SEQUENCER_264, 0x1 },
430 { WM8996_WRITE_SEQUENCER_266, 0x104 },
431 { WM8996_WRITE_SEQUENCER_267, 0x100 },
432 { WM8996_WRITE_SEQUENCER_268, 0x2fff },
433 { WM8996_WRITE_SEQUENCER_272, 0x2fff },
434 { WM8996_WRITE_SEQUENCER_276, 0x2fff },
435 { WM8996_WRITE_SEQUENCER_280, 0x2fff },
436 { WM8996_WRITE_SEQUENCER_284, 0x2fff },
437 { WM8996_WRITE_SEQUENCER_288, 0x2fff },
438 { WM8996_WRITE_SEQUENCER_292, 0x2fff },
439 { WM8996_WRITE_SEQUENCER_296, 0x2fff },
440 { WM8996_WRITE_SEQUENCER_300, 0x2fff },
441 { WM8996_WRITE_SEQUENCER_304, 0x2fff },
442 { WM8996_WRITE_SEQUENCER_308, 0x2fff },
443 { WM8996_WRITE_SEQUENCER_312, 0x2fff },
444 { WM8996_WRITE_SEQUENCER_316, 0x2fff },
445 { WM8996_WRITE_SEQUENCER_320, 0x61 },
446 { WM8996_WRITE_SEQUENCER_322, 0x601 },
447 { WM8996_WRITE_SEQUENCER_324, 0x50 },
448 { WM8996_WRITE_SEQUENCER_326, 0x102 },
449 { WM8996_WRITE_SEQUENCER_328, 0x1 },
450 { WM8996_WRITE_SEQUENCER_330, 0x106 },
451 { WM8996_WRITE_SEQUENCER_331, 0x100 },
452 { WM8996_WRITE_SEQUENCER_332, 0x2fff },
453 { WM8996_WRITE_SEQUENCER_336, 0x2fff },
454 { WM8996_WRITE_SEQUENCER_340, 0x2fff },
455 { WM8996_WRITE_SEQUENCER_344, 0x2fff },
456 { WM8996_WRITE_SEQUENCER_348, 0x2fff },
457 { WM8996_WRITE_SEQUENCER_352, 0x2fff },
458 { WM8996_WRITE_SEQUENCER_356, 0x2fff },
459 { WM8996_WRITE_SEQUENCER_360, 0x2fff },
460 { WM8996_WRITE_SEQUENCER_364, 0x2fff },
461 { WM8996_WRITE_SEQUENCER_368, 0x2fff },
462 { WM8996_WRITE_SEQUENCER_372, 0x2fff },
463 { WM8996_WRITE_SEQUENCER_376, 0x2fff },
464 { WM8996_WRITE_SEQUENCER_380, 0x2fff },
465 { WM8996_WRITE_SEQUENCER_384, 0x60 },
466 { WM8996_WRITE_SEQUENCER_386, 0x601 },
467 { WM8996_WRITE_SEQUENCER_388, 0x61 },
468 { WM8996_WRITE_SEQUENCER_390, 0x601 },
469 { WM8996_WRITE_SEQUENCER_392, 0x50 },
470 { WM8996_WRITE_SEQUENCER_394, 0x300 },
471 { WM8996_WRITE_SEQUENCER_396, 0x1 },
472 { WM8996_WRITE_SEQUENCER_398, 0x304 },
473 { WM8996_WRITE_SEQUENCER_400, 0x40 },
474 { WM8996_WRITE_SEQUENCER_402, 0xf },
475 { WM8996_WRITE_SEQUENCER_404, 0x1 },
476 { WM8996_WRITE_SEQUENCER_407, 0x100 },
477}; 299};
478 300
479static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0); 301static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0);
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-10 14:07:15 -0400