diff options
author | Jonas Gorski <jogo@openwrt.org> | 2013-03-21 10:03:15 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-07 19:19:03 -0400 |
commit | 6605428c506bea269ca6c4aed85e97fbee2cbe7b (patch) | |
tree | a125004400897cc415443c2691565a1d5a7b17ef | |
parent | 8a398d757dd0f56c8ac621104b198ff66eef7a7a (diff) |
MIPS: BCM63XX: fix revision ID width
The REVID is only 8 bit wide.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/5007/
Acked-by: John Crispin <blogic@openwrt.org>
-rw-r--r-- | arch/mips/bcm63xx/cpu.c | 4 | ||||
-rw-r--r-- | arch/mips/bcm63xx/setup.c | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 |
4 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/bcm63xx/cpu.c b/arch/mips/bcm63xx/cpu.c index a7afb289b15a..ae16626d4001 100644 --- a/arch/mips/bcm63xx/cpu.c +++ b/arch/mips/bcm63xx/cpu.c | |||
@@ -25,7 +25,7 @@ const int *bcm63xx_irqs; | |||
25 | EXPORT_SYMBOL(bcm63xx_irqs); | 25 | EXPORT_SYMBOL(bcm63xx_irqs); |
26 | 26 | ||
27 | static u16 bcm63xx_cpu_id; | 27 | static u16 bcm63xx_cpu_id; |
28 | static u16 bcm63xx_cpu_rev; | 28 | static u8 bcm63xx_cpu_rev; |
29 | static unsigned int bcm63xx_cpu_freq; | 29 | static unsigned int bcm63xx_cpu_freq; |
30 | static unsigned int bcm63xx_memory_size; | 30 | static unsigned int bcm63xx_memory_size; |
31 | 31 | ||
@@ -87,7 +87,7 @@ u16 __bcm63xx_get_cpu_id(void) | |||
87 | 87 | ||
88 | EXPORT_SYMBOL(__bcm63xx_get_cpu_id); | 88 | EXPORT_SYMBOL(__bcm63xx_get_cpu_id); |
89 | 89 | ||
90 | u16 bcm63xx_get_cpu_rev(void) | 90 | u8 bcm63xx_get_cpu_rev(void) |
91 | { | 91 | { |
92 | return bcm63xx_cpu_rev; | 92 | return bcm63xx_cpu_rev; |
93 | } | 93 | } |
diff --git a/arch/mips/bcm63xx/setup.c b/arch/mips/bcm63xx/setup.c index 35e18e98beb9..911fd7df49e5 100644 --- a/arch/mips/bcm63xx/setup.c +++ b/arch/mips/bcm63xx/setup.c | |||
@@ -126,7 +126,7 @@ static void __bcm63xx_machine_reboot(char *p) | |||
126 | const char *get_system_type(void) | 126 | const char *get_system_type(void) |
127 | { | 127 | { |
128 | static char buf[128]; | 128 | static char buf[128]; |
129 | snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)", | 129 | snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)", |
130 | board_get_name(), | 130 | board_get_name(), |
131 | bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev()); | 131 | bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev()); |
132 | return buf; | 132 | return buf; |
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h index cb922b9cb0e9..19a80ead5839 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | |||
@@ -18,7 +18,7 @@ | |||
18 | 18 | ||
19 | void __init bcm63xx_cpu_init(void); | 19 | void __init bcm63xx_cpu_init(void); |
20 | u16 __bcm63xx_get_cpu_id(void); | 20 | u16 __bcm63xx_get_cpu_id(void); |
21 | u16 bcm63xx_get_cpu_rev(void); | 21 | u8 bcm63xx_get_cpu_rev(void); |
22 | unsigned int bcm63xx_get_cpu_freq(void); | 22 | unsigned int bcm63xx_get_cpu_freq(void); |
23 | 23 | ||
24 | #ifdef CONFIG_BCM63XX_CPU_6328 | 24 | #ifdef CONFIG_BCM63XX_CPU_6328 |
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h index acd1f93e5ad1..fe3601afb78a 100644 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | |||
@@ -10,7 +10,7 @@ | |||
10 | #define REV_CHIPID_SHIFT 16 | 10 | #define REV_CHIPID_SHIFT 16 |
11 | #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) | 11 | #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) |
12 | #define REV_REVID_SHIFT 0 | 12 | #define REV_REVID_SHIFT 0 |
13 | #define REV_REVID_MASK (0xffff << REV_REVID_SHIFT) | 13 | #define REV_REVID_MASK (0xff << REV_REVID_SHIFT) |
14 | 14 | ||
15 | /* Clock Control register */ | 15 | /* Clock Control register */ |
16 | #define PERF_CKCTL_REG 0x4 | 16 | #define PERF_CKCTL_REG 0x4 |