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authorShawn Guo <shawn.guo@linaro.org>2013-05-02 23:28:42 -0400
committerNitin Garg <nitin.garg@freescale.com>2014-04-16 09:00:34 -0400
commit65cc1ec3e9015918833c71c29e8f6b9994081574 (patch)
treeb5f24970e309a52c6f18a113b3907917e08ed84e
parent6129960215037c6d4e4019512dc9c473c143f95b (diff)
ARM: dts: imx6sl: add initial imx6sl-evk support
Commit 117ccd553a02a69aff41083f8b59a38927ccf002 upstream. Add initial imx6sl-evk board support with uart, usdhc and fec enabled. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/imx6sl-evk.dts74
2 files changed, 76 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f0895c581a89..de02eced667b 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -120,7 +120,8 @@ dtb-$(CONFIG_ARCH_MXC) += \
120 imx6q-sabreauto.dtb \ 120 imx6q-sabreauto.dtb \
121 imx6q-sabrelite.dtb \ 121 imx6q-sabrelite.dtb \
122 imx6q-sabresd.dtb \ 122 imx6q-sabresd.dtb \
123 imx6q-sbc6x.dtb 123 imx6q-sbc6x.dtb \
124 imx6sl-evk.dtb
124dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ 125dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
125 imx23-olinuxino.dtb \ 126 imx23-olinuxino.dtb \
126 imx23-stmp378x_devb.dtb \ 127 imx23-stmp378x_devb.dtb \
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
new file mode 100644
index 000000000000..2886a590823d
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -0,0 +1,74 @@
1/*
2 * Copyright (C) 2013 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
11#include "imx6sl.dtsi"
12
13/ {
14 model = "Freescale i.MX6 SoloLite EVK Board";
15 compatible = "fsl,imx6sl-evk", "fsl,imx6sl";
16
17 memory {
18 reg = <0x80000000 0x40000000>;
19 };
20};
21
22&fec {
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_fec_1>;
25 phy-mode = "rmii";
26 status = "okay";
27};
28
29&iomuxc {
30 pinctrl-names = "default";
31 pinctrl-0 = <&pinctrl_hog>;
32
33 hog {
34 pinctrl_hog: hoggrp {
35 fsl,pins = <
36 MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
37 MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059
38 MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059
39 MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059
40 MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
41 >;
42 };
43 };
44};
45
46&uart1 {
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_uart1_1>;
49 status = "okay";
50};
51
52&usdhc1 {
53 pinctrl-names = "default";
54 pinctrl-0 = <&pinctrl_usdhc1_1>;
55 bus-width = <8>;
56 cd-gpios = <&gpio4 7 0>;
57 wp-gpios = <&gpio4 6 0>;
58 status = "okay";
59};
60
61&usdhc2 {
62 pinctrl-names = "default";
63 pinctrl-0 = <&pinctrl_usdhc2_1>;
64 cd-gpios = <&gpio5 0 0>;
65 wp-gpios = <&gpio4 29 0>;
66 status = "okay";
67};
68
69&usdhc3 {
70 pinctrl-names = "default";
71 pinctrl-0 = <&pinctrl_usdhc3_1>;
72 cd-gpios = <&gpio3 22 0>;
73 status = "okay";
74};