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authorSascha Hauer <s.hauer@pengutronix.de>2012-09-20 09:04:33 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2012-11-12 06:11:23 -0500
commit5658a68fb578df8c9b9dd3071b2a56bf92c15324 (patch)
tree671cfed7cc83d1b3b1382693e466c50030c9cea0
parentef4bac5532fcc678a77ee2b16836458f58407056 (diff)
ARM i.MX25: Add devicetree
This adds a i.MX25 dtsi file along with the i.MX25 clock tree documentation. The devicetree should be fairly complete for: - uart - fec - i2c - spi - pwm - nand - gpio - wdog - esdhc - flexcan The more exotic devices currently miss clock bindings. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/clock/imx25-clock.txt162
-rw-r--r--arch/arm/boot/dts/imx25.dtsi515
2 files changed, 677 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx25-clock.txt b/Documentation/devicetree/bindings/clock/imx25-clock.txt
new file mode 100644
index 000000000000..c2a3525ecb4e
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/imx25-clock.txt
@@ -0,0 +1,162 @@
1* Clock bindings for Freescale i.MX25
2
3Required properties:
4- compatible: Should be "fsl,imx25-ccm"
5- reg: Address and length of the register set
6- interrupts: Should contain CCM interrupt
7- #clock-cells: Should be <1>
8
9The clock consumer should specify the desired clock by having the clock
10ID in its "clocks" phandle cell. The following is a full list of i.MX25
11clocks and IDs.
12
13 Clock ID
14 ---------------------------
15 dummy 0
16 osc 1
17 mpll 2
18 upll 3
19 mpll_cpu_3_4 4
20 cpu_sel 5
21 cpu 6
22 ahb 7
23 usb_div 8
24 ipg 9
25 per0_sel 10
26 per1_sel 11
27 per2_sel 12
28 per3_sel 13
29 per4_sel 14
30 per5_sel 15
31 per6_sel 16
32 per7_sel 17
33 per8_sel 18
34 per9_sel 19
35 per10_sel 20
36 per11_sel 21
37 per12_sel 22
38 per13_sel 23
39 per14_sel 24
40 per15_sel 25
41 per0 26
42 per1 27
43 per2 28
44 per3 29
45 per4 30
46 per5 31
47 per6 32
48 per7 33
49 per8 34
50 per9 35
51 per10 36
52 per11 37
53 per12 38
54 per13 39
55 per14 40
56 per15 41
57 csi_ipg_per 42
58 epit_ipg_per 43
59 esai_ipg_per 44
60 esdhc1_ipg_per 45
61 esdhc2_ipg_per 46
62 gpt_ipg_per 47
63 i2c_ipg_per 48
64 lcdc_ipg_per 49
65 nfc_ipg_per 50
66 owire_ipg_per 51
67 pwm_ipg_per 52
68 sim1_ipg_per 53
69 sim2_ipg_per 54
70 ssi1_ipg_per 55
71 ssi2_ipg_per 56
72 uart_ipg_per 57
73 ata_ahb 58
74 reserved 59
75 csi_ahb 60
76 emi_ahb 61
77 esai_ahb 62
78 esdhc1_ahb 63
79 esdhc2_ahb 64
80 fec_ahb 65
81 lcdc_ahb 66
82 rtic_ahb 67
83 sdma_ahb 68
84 slcdc_ahb 69
85 usbotg_ahb 70
86 reserved 71
87 reserved 72
88 reserved 73
89 reserved 74
90 can1_ipg 75
91 can2_ipg 76
92 csi_ipg 77
93 cspi1_ipg 78
94 cspi2_ipg 79
95 cspi3_ipg 80
96 dryice_ipg 81
97 ect_ipg 82
98 epit1_ipg 83
99 epit2_ipg 84
100 reserved 85
101 esdhc1_ipg 86
102 esdhc2_ipg 87
103 fec_ipg 88
104 reserved 89
105 reserved 90
106 reserved 91
107 gpt1_ipg 92
108 gpt2_ipg 93
109 gpt3_ipg 94
110 gpt4_ipg 95
111 reserved 96
112 reserved 97
113 reserved 98
114 iim_ipg 99
115 reserved 100
116 reserved 101
117 kpp_ipg 102
118 lcdc_ipg 103
119 reserved 104
120 pwm1_ipg 105
121 pwm2_ipg 106
122 pwm3_ipg 107
123 pwm4_ipg 108
124 rngb_ipg 109
125 reserved 110
126 scc_ipg 111
127 sdma_ipg 112
128 sim1_ipg 113
129 sim2_ipg 114
130 slcdc_ipg 115
131 spba_ipg 116
132 ssi1_ipg 117
133 ssi2_ipg 118
134 tsc_ipg 119
135 uart1_ipg 120
136 uart2_ipg 121
137 uart3_ipg 122
138 uart4_ipg 123
139 uart5_ipg 124
140 reserved 125
141 wdt_ipg 126
142
143Examples:
144
145clks: ccm@53f80000 {
146 compatible = "fsl,imx25-ccm";
147 reg = <0x53f80000 0x4000>;
148 interrupts = <31>;
149 clock-output-names = ...
150 "uart_ipg",
151 "uart_serial",
152 ...;
153};
154
155uart1: serial@43f90000 {
156 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
157 reg = <0x43f90000 0x4000>;
158 interrupts = <45>;
159 clocks = <&clks 79>, <&clks 50>;
160 clock-names = "ipg", "per";
161 status = "disabled";
162};
diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dtsi
new file mode 100644
index 000000000000..e1b13ebc96d6
--- /dev/null
+++ b/arch/arm/boot/dts/imx25.dtsi
@@ -0,0 +1,515 @@
1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 aliases {
16 serial0 = &uart1;
17 serial1 = &uart2;
18 serial2 = &uart3;
19 serial3 = &uart4;
20 serial4 = &uart5;
21 gpio0 = &gpio1;
22 gpio1 = &gpio2;
23 gpio2 = &gpio3;
24 gpio3 = &gpio4;
25 usb0 = &usbotg;
26 usb1 = &usbhost1;
27 };
28
29 asic: asic-interrupt-controller@68000000 {
30 compatible = "fsl,imx25-asic", "fsl,avic";
31 interrupt-controller;
32 #interrupt-cells = <1>;
33 reg = <0x68000000 0x8000000>;
34 };
35
36 clocks {
37 #address-cells = <1>;
38 #size-cells = <0>;
39
40 osc {
41 compatible = "fsl,imx-osc", "fixed-clock";
42 clock-frequency = <24000000>;
43 };
44 };
45
46 soc {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 compatible = "simple-bus";
50 interrupt-parent = <&asic>;
51 ranges;
52
53 aips@43f00000 { /* AIPS1 */
54 compatible = "fsl,aips-bus", "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
57 reg = <0x43f00000 0x100000>;
58 ranges;
59
60 i2c1: i2c@43f80000 {
61 #address-cells = <1>;
62 #size-cells = <0>;
63 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
64 reg = <0x43f80000 0x4000>;
65 clocks = <&clks 48>;
66 clock-names = "";
67 interrupts = <3>;
68 status = "disabled";
69 };
70
71 i2c3: i2c@43f84000 {
72 #address-cells = <1>;
73 #size-cells = <0>;
74 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
75 reg = <0x43f84000 0x4000>;
76 clocks = <&clks 48>;
77 clock-names = "";
78 interrupts = <10>;
79 status = "disabled";
80 };
81
82 can1: can@43f88000 {
83 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
84 reg = <0x43f88000 0x4000>;
85 interrupts = <43>;
86 clocks = <&clks 75>, <&clks 75>;
87 clock-names = "ipg", "per";
88 status = "disabled";
89 };
90
91 can2: can@43f8c000 {
92 compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
93 reg = <0x43f8c000 0x4000>;
94 interrupts = <44>;
95 clocks = <&clks 76>, <&clks 76>;
96 clock-names = "ipg", "per";
97 status = "disabled";
98 };
99
100 uart1: serial@43f90000 {
101 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
102 reg = <0x43f90000 0x4000>;
103 interrupts = <45>;
104 clocks = <&clks 120>, <&clks 57>;
105 clock-names = "ipg", "per";
106 status = "disabled";
107 };
108
109 uart2: serial@43f94000 {
110 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
111 reg = <0x43f94000 0x4000>;
112 interrupts = <32>;
113 clocks = <&clks 121>, <&clks 57>;
114 clock-names = "ipg", "per";
115 status = "disabled";
116 };
117
118 i2c2: i2c@43f98000 {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
122 reg = <0x43f98000 0x4000>;
123 clocks = <&clks 48>;
124 clock-names = "";
125 interrupts = <4>;
126 status = "disabled";
127 };
128
129 owire@43f9c000 {
130 #address-cells = <1>;
131 #size-cells = <0>;
132 reg = <0x43f9c000 0x4000>;
133 clocks = <&clks 51>;
134 clock-names = "";
135 interrupts = <2>;
136 status = "disabled";
137 };
138
139 spi1: cspi@43fa4000 {
140 #address-cells = <1>;
141 #size-cells = <0>;
142 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
143 reg = <0x43fa4000 0x4000>;
144 clocks = <&clks 62>;
145 clock-names = "ipg";
146 interrupts = <14>;
147 status = "disabled";
148 };
149
150 kpp@43fa8000 {
151 #address-cells = <1>;
152 #size-cells = <0>;
153 reg = <0x43fa8000 0x4000>;
154 clocks = <&clks 102>;
155 clock-names = "";
156 interrupts = <24>;
157 status = "disabled";
158 };
159
160 iomuxc@43fac000{
161 compatible = "fsl,imx25-iomuxc";
162 reg = <0x43fac000 0x4000>;
163 };
164
165 audmux@43fb0000 {
166 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
167 reg = <0x43fb0000 0x4000>;
168 status = "disabled";
169 };
170 };
171
172 spba@50000000 {
173 compatible = "fsl,spba-bus", "simple-bus";
174 #address-cells = <1>;
175 #size-cells = <1>;
176 reg = <0x50000000 0x40000>;
177 ranges;
178
179 spi3: cspi@50004000 {
180 #address-cells = <1>;
181 #size-cells = <0>;
182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
183 reg = <0x50004000 0x4000>;
184 interrupts = <0>;
185 clocks = <&clks 80>;
186 clock-names = "ipg";
187 status = "disabled";
188 };
189
190 uart4: serial@50008000 {
191 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
192 reg = <0x50008000 0x4000>;
193 interrupts = <5>;
194 clocks = <&clks 123>, <&clks 57>;
195 clock-names = "ipg", "per";
196 status = "disabled";
197 };
198
199 uart3: serial@5000c000 {
200 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
201 reg = <0x5000c000 0x4000>;
202 interrupts = <18>;
203 clocks = <&clks 122>, <&clks 57>;
204 clock-names = "ipg", "per";
205 status = "disabled";
206 };
207
208 spi2: cspi@50010000 {
209 #address-cells = <1>;
210 #size-cells = <0>;
211 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
212 reg = <0x50010000 0x4000>;
213 clocks = <&clks 79>;
214 clock-names = "ipg";
215 interrupts = <13>;
216 status = "disabled";
217 };
218
219 ssi2: ssi@50014000 {
220 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
221 reg = <0x50014000 0x4000>;
222 interrupts = <11>;
223 status = "disabled";
224 };
225
226 esai@50018000 {
227 reg = <0x50018000 0x4000>;
228 interrupts = <7>;
229 };
230
231 uart5: serial@5002c000 {
232 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
233 reg = <0x5002c000 0x4000>;
234 interrupts = <40>;
235 clocks = <&clks 124>, <&clks 57>;
236 clock-names = "ipg", "per";
237 status = "disabled";
238 };
239
240 tsc: tsc@50030000 {
241 compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
242 reg = <0x50030000 0x4000>;
243 interrupts = <46>;
244 clocks = <&clks 119>;
245 clock-names = "ipg";
246 status = "disabled";
247 };
248
249 ssi1: ssi@50034000 {
250 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
251 reg = <0x50034000 0x4000>;
252 interrupts = <12>;
253 status = "disabled";
254 };
255
256 fec: ethernet@50038000 {
257 compatible = "fsl,imx25-fec";
258 reg = <0x50038000 0x4000>;
259 interrupts = <57>;
260 clocks = <&clks 88>, <&clks 65>;
261 clock-names = "ipg", "ahb";
262 status = "disabled";
263 };
264 };
265
266 aips@53f00000 { /* AIPS2 */
267 compatible = "fsl,aips-bus", "simple-bus";
268 #address-cells = <1>;
269 #size-cells = <1>;
270 reg = <0x53f00000 0x100000>;
271 ranges;
272
273 clks: ccm@53f80000 {
274 compatible = "fsl,imx25-ccm";
275 reg = <0x53f80000 0x4000>;
276 interrupts = <31>;
277 #clock-cells = <1>;
278 };
279
280 gpt4: timer@53f84000 {
281 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
282 reg = <0x53f84000 0x4000>;
283 clocks = <&clks 9>, <&clks 45>;
284 clock-names = "ipg", "per";
285 interrupts = <1>;
286 };
287
288 gpt3: timer@53f88000 {
289 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
290 reg = <0x53f88000 0x4000>;
291 clocks = <&clks 9>, <&clks 47>;
292 clock-names = "ipg", "per";
293 interrupts = <29>;
294 };
295
296 gpt2: timer@53f8c000 {
297 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
298 reg = <0x53f8c000 0x4000>;
299 clocks = <&clks 9>, <&clks 47>;
300 clock-names = "ipg", "per";
301 interrupts = <53>;
302 };
303
304 gpt1: timer@53f90000 {
305 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
306 reg = <0x53f90000 0x4000>;
307 clocks = <&clks 9>, <&clks 47>;
308 clock-names = "ipg", "per";
309 interrupts = <54>;
310 };
311
312 epit1: timer@53f94000 {
313 compatible = "fsl,imx25-epit";
314 reg = <0x53f94000 0x4000>;
315 interrupts = <28>;
316 };
317
318 epit2: timer@53f98000 {
319 compatible = "fsl,imx25-epit";
320 reg = <0x53f98000 0x4000>;
321 interrupts = <27>;
322 };
323
324 gpio4: gpio@53f9c000 {
325 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
326 reg = <0x53f9c000 0x4000>;
327 interrupts = <23>;
328 gpio-controller;
329 #gpio-cells = <2>;
330 interrupt-controller;
331 #interrupt-cells = <2>;
332 };
333
334 pwm2: pwm@53fa0000 {
335 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
336 #pwm-cells = <2>;
337 reg = <0x53fa0000 0x4000>;
338 clocks = <&clks 106>, <&clks 36>;
339 clock-names = "ipg", "per";
340 interrupts = <36>;
341 };
342
343 gpio3: gpio@53fa4000 {
344 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
345 reg = <0x53fa4000 0x4000>;
346 interrupts = <16>;
347 gpio-controller;
348 #gpio-cells = <2>;
349 interrupt-controller;
350 #interrupt-cells = <2>;
351 };
352
353 pwm3: pwm@53fa8000 {
354 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
355 #pwm-cells = <2>;
356 reg = <0x53fa8000 0x4000>;
357 clocks = <&clks 107>, <&clks 36>;
358 clock-names = "ipg", "per";
359 interrupts = <41>;
360 };
361
362 esdhc1: esdhc@53fb4000 {
363 compatible = "fsl,imx25-esdhc";
364 reg = <0x53fb4000 0x4000>;
365 interrupts = <9>;
366 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
367 clock-names = "ipg", "ahb", "per";
368 status = "disabled";
369 };
370
371 esdhc2: esdhc@53fb8000 {
372 compatible = "fsl,imx25-esdhc";
373 reg = <0x53fb8000 0x4000>;
374 interrupts = <8>;
375 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
376 clock-names = "ipg", "ahb", "per";
377 status = "disabled";
378 };
379
380 lcdc@53fbc000 {
381 reg = <0x53fbc000 0x4000>;
382 interrupts = <39>;
383 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
384 clock-names = "ipg", "ahb", "per";
385 status = "disabled";
386 };
387
388 slcdc@53fc0000 {
389 reg = <0x53fc0000 0x4000>;
390 interrupts = <38>;
391 status = "disabled";
392 };
393
394 pwm4: pwm@53fc8000 {
395 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
396 reg = <0x53fc8000 0x4000>;
397 clocks = <&clks 108>, <&clks 36>;
398 clock-names = "ipg", "per";
399 interrupts = <42>;
400 };
401
402 gpio1: gpio@53fcc000 {
403 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
404 reg = <0x53fcc000 0x4000>;
405 interrupts = <52>;
406 gpio-controller;
407 #gpio-cells = <2>;
408 interrupt-controller;
409 #interrupt-cells = <2>;
410 };
411
412 gpio2: gpio@53fd0000 {
413 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
414 reg = <0x53fd0000 0x4000>;
415 interrupts = <51>;
416 gpio-controller;
417 #gpio-cells = <2>;
418 interrupt-controller;
419 #interrupt-cells = <2>;
420 };
421
422 sdma@53fd4000 {
423 compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
424 reg = <0x53fd4000 0x4000>;
425 clocks = <&clks 112>, <&clks 68>;
426 clock-names = "ipg", "ahb";
427 interrupts = <34>;
428 };
429
430 wdog@53fdc000 {
431 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
432 reg = <0x53fdc000 0x4000>;
433 clocks = <&clks 126>;
434 clock-names = "";
435 interrupts = <55>;
436 };
437
438 pwm1: pwm@53fe0000 {
439 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
440 #pwm-cells = <2>;
441 reg = <0x53fe0000 0x4000>;
442 clocks = <&clks 105>, <&clks 36>;
443 clock-names = "ipg", "per";
444 interrupts = <26>;
445 };
446
447 usbphy1: usbphy@1 {
448 compatible = "nop-usbphy";
449 status = "disabled";
450 };
451
452 usbphy2: usbphy@2 {
453 compatible = "nop-usbphy";
454 status = "disabled";
455 };
456
457 usbotg: usb@53ff4000 {
458 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
459 reg = <0x53ff4000 0x0200>;
460 interrupts = <37>;
461 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
462 clock-names = "ipg", "ahb", "per";
463 fsl,usbmisc = <&usbmisc 0>;
464 status = "disabled";
465 };
466
467 usbhost1: usb@53ff4400 {
468 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
469 reg = <0x53ff4400 0x0200>;
470 interrupts = <35>;
471 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
472 clock-names = "ipg", "ahb", "per";
473 fsl,usbmisc = <&usbmisc 1>;
474 status = "disabled";
475 };
476
477 usbmisc: usbmisc@53ff4600 {
478 #index-cells = <1>;
479 compatible = "fsl,imx25-usbmisc";
480 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
481 clock-names = "ipg", "ahb", "per";
482 reg = <0x53ff4600 0x00f>;
483 status = "disabled";
484 };
485
486 dryice@53ffc000 {
487 compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
488 reg = <0x53ffc000 0x4000>;
489 clocks = <&clks 81>;
490 clock-names = "ipg";
491 interrupts = <25>;
492 };
493 };
494
495 emi@80000000 {
496 compatible = "fsl,emi-bus", "simple-bus";
497 #address-cells = <1>;
498 #size-cells = <1>;
499 reg = <0x80000000 0x3b002000>;
500 ranges;
501
502 nand@bb000000 {
503 #address-cells = <1>;
504 #size-cells = <1>;
505
506 compatible = "fsl,imx25-nand";
507 reg = <0xbb000000 0x2000>;
508 clocks = <&clks 50>;
509 clock-names = "";
510 interrupts = <33>;
511 status = "disabled";
512 };
513 };
514 };
515};
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-26 06:52:39 -0400