diff options
author | Paul Walmsley <paul@pwsan.com> | 2011-10-07 02:53:08 -0400 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-10-07 03:06:48 -0400 |
commit | 52a3a4d4610cfad536b8ac94b9a2f5ebfa51c06b (patch) | |
tree | d96680dde660e21b842d07244440f379018c3a47 | |
parent | 49642ac816a714f3037b7cd6401a46c8fe46e795 (diff) |
ARM: OMAP4460: Clock: Adding support for 4460 specific clocks
OMAP4460 specific clocks are not getting added as the
cpu_is_omap44xx is choosing only OMAP4430 specific clock nodes.
Changing it to add to OMAP4460 specific clocks also.
This is clocks are required of temperature sensor.
Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Cc: paul@pwsan.com
[paul@pwsan.com: updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r-- | arch/arm/mach-omap2/clock44xx_data.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c index c98c0a22c188..7b028ecce37a 100644 --- a/arch/arm/mach-omap2/clock44xx_data.c +++ b/arch/arm/mach-omap2/clock44xx_data.c | |||
@@ -1398,9 +1398,9 @@ static struct clk dss_dss_clk = { | |||
1398 | }; | 1398 | }; |
1399 | 1399 | ||
1400 | static const struct clksel_rate div3_8to32_rates[] = { | 1400 | static const struct clksel_rate div3_8to32_rates[] = { |
1401 | { .div = 8, .val = 0, .flags = RATE_IN_44XX }, | 1401 | { .div = 8, .val = 0, .flags = RATE_IN_4460 }, |
1402 | { .div = 16, .val = 1, .flags = RATE_IN_44XX }, | 1402 | { .div = 16, .val = 1, .flags = RATE_IN_4460 }, |
1403 | { .div = 32, .val = 2, .flags = RATE_IN_44XX }, | 1403 | { .div = 32, .val = 2, .flags = RATE_IN_4460 }, |
1404 | { .div = 0 }, | 1404 | { .div = 0 }, |
1405 | }; | 1405 | }; |
1406 | 1406 | ||
@@ -3370,12 +3370,12 @@ int __init omap4xxx_clk_init(void) | |||
3370 | struct omap_clk *c; | 3370 | struct omap_clk *c; |
3371 | u32 cpu_clkflg; | 3371 | u32 cpu_clkflg; |
3372 | 3372 | ||
3373 | if (cpu_is_omap44xx()) { | 3373 | if (cpu_is_omap443x()) { |
3374 | cpu_mask = RATE_IN_4430; | 3374 | cpu_mask = RATE_IN_4430; |
3375 | cpu_clkflg = CK_443X; | 3375 | cpu_clkflg = CK_443X; |
3376 | } else if (cpu_is_omap446x()) { | 3376 | } else if (cpu_is_omap446x()) { |
3377 | cpu_mask = RATE_IN_4460; | 3377 | cpu_mask = RATE_IN_4460 | RATE_IN_4430; |
3378 | cpu_clkflg = CK_446X; | 3378 | cpu_clkflg = CK_446X | CK_443X; |
3379 | } else { | 3379 | } else { |
3380 | return 0; | 3380 | return 0; |
3381 | } | 3381 | } |