aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorPeter Ujfalusi <peter.ujfalusi@nokia.com>2008-12-09 01:45:44 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2008-12-09 05:05:03 -0500
commit44c5587035fbbdd368a3d5d8d11997d43758078a (patch)
treead5bfde2e30e7deaf5f1608a0304ac92c0986a1c
parent53b5047d994edfcafabc0e95bb681ae70d6e8604 (diff)
ASoC: TWL4030: Add Analog PGA control switch to DAPM
Add all four APGA switch to DAPM routing and widgets. Add user control for DA enable for all APGA as normal control. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--sound/soc/codecs/twl4030.c25
1 files changed, 23 insertions, 2 deletions
diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c
index 3543bf6e258f..4293ec7b5021 100644
--- a/sound/soc/codecs/twl4030.c
+++ b/sound/soc/codecs/twl4030.c
@@ -562,6 +562,12 @@ static const struct snd_kcontrol_new twl4030_snd_controls[] = {
562 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume", 562 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
563 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL, 563 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
564 3, 0x12, 1, analog_tlv), 564 3, 0x12, 1, analog_tlv),
565 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
566 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
567 1, 1, 0),
568 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
569 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
570 1, 1, 0),
565 571
566 /* Separate output gain controls */ 572 /* Separate output gain controls */
567 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume", 573 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
@@ -626,14 +632,29 @@ static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
626 SND_SOC_DAPM_DAC("DACL2", "Left Rear Playback", 632 SND_SOC_DAPM_DAC("DACL2", "Left Rear Playback",
627 TWL4030_REG_AVDAC_CTL, 3, 0), 633 TWL4030_REG_AVDAC_CTL, 3, 0),
628 634
635 /* Analog PGAs */
636 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL,
637 0, 0, NULL, 0),
638 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL,
639 0, 0, NULL, 0),
640 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL,
641 0, 0, NULL, 0),
642 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL,
643 0, 0, NULL, 0),
644
629 SND_SOC_DAPM_ADC("ADCL", "Left Capture", SND_SOC_NOPM, 0, 0), 645 SND_SOC_DAPM_ADC("ADCL", "Left Capture", SND_SOC_NOPM, 0, 0),
630 SND_SOC_DAPM_ADC("ADCR", "Right Capture", SND_SOC_NOPM, 0, 0), 646 SND_SOC_DAPM_ADC("ADCR", "Right Capture", SND_SOC_NOPM, 0, 0),
631}; 647};
632 648
633static const struct snd_soc_dapm_route intercon[] = { 649static const struct snd_soc_dapm_route intercon[] = {
650 {"ARXL1_APGA", NULL, "DACL1"},
651 {"ARXR1_APGA", NULL, "DACR1"},
652 {"ARXL2_APGA", NULL, "DACL2"},
653 {"ARXR2_APGA", NULL, "DACR2"},
654
634 /* outputs */ 655 /* outputs */
635 {"OUTL", NULL, "DACL2"}, 656 {"OUTL", NULL, "ARXL2_APGA"},
636 {"OUTR", NULL, "DACR2"}, 657 {"OUTR", NULL, "ARXR2_APGA"},
637 658
638 /* inputs */ 659 /* inputs */
639 {"ADCL", NULL, "INL"}, 660 {"ADCL", NULL, "INL"},