diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2013-01-12 02:26:53 -0500 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2013-01-28 03:12:03 -0500 |
commit | 39149d4da6d50de92f9e7f70c743a8b8c20eeac1 (patch) | |
tree | ee6697659236fa4c071f29940d0fcfc8e0261bd6 | |
parent | a9bb6290392fd9edb7293bb335d0fff1d0b5b376 (diff) |
e1000e: cleanup: remove comments which are no longer applicable
Code was removed but the applicable comments were not.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r-- | drivers/net/ethernet/intel/e1000e/defines.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h index c4587671dc73..d29b2fd4c09c 100644 --- a/drivers/net/ethernet/intel/e1000e/defines.h +++ b/drivers/net/ethernet/intel/e1000e/defines.h | |||
@@ -261,8 +261,6 @@ | |||
261 | #define E1000_STATUS_PHYRA 0x00000400 /* PHY Reset Asserted */ | 261 | #define E1000_STATUS_PHYRA 0x00000400 /* PHY Reset Asserted */ |
262 | #define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Status of Master requests. */ | 262 | #define E1000_STATUS_GIO_MASTER_ENABLE 0x00080000 /* Status of Master requests. */ |
263 | 263 | ||
264 | /* Constants used to interpret the masked PCI-X bus speed. */ | ||
265 | |||
266 | #define HALF_DUPLEX 1 | 264 | #define HALF_DUPLEX 1 |
267 | #define FULL_DUPLEX 2 | 265 | #define FULL_DUPLEX 2 |
268 | 266 | ||
@@ -330,8 +328,6 @@ | |||
330 | #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */ | 328 | #define E1000_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */ |
331 | #define E1000_TCTL_MULR 0x10000000 /* Multiple request support */ | 329 | #define E1000_TCTL_MULR 0x10000000 /* Multiple request support */ |
332 | 330 | ||
333 | /* Transmit Arbitration Count */ | ||
334 | |||
335 | /* SerDes Control */ | 331 | /* SerDes Control */ |
336 | #define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400 | 332 | #define E1000_SCTL_DISABLE_SERDES_LOOPBACK 0x0400 |
337 | 333 | ||
@@ -800,9 +796,6 @@ | |||
800 | #define M88E1000_PSCR_AUTO_X_1000T 0x0040 | 796 | #define M88E1000_PSCR_AUTO_X_1000T 0x0040 |
801 | /* Auto crossover enabled all speeds */ | 797 | /* Auto crossover enabled all speeds */ |
802 | #define M88E1000_PSCR_AUTO_X_MODE 0x0060 | 798 | #define M88E1000_PSCR_AUTO_X_MODE 0x0060 |
803 | /* 1=Enable Extended 10BASE-T distance (Lower 10BASE-T Rx Threshold) | ||
804 | * 0=Normal 10BASE-T Rx Threshold | ||
805 | */ | ||
806 | #define M88E1000_PSCR_ASSERT_CRS_ON_TX 0x0800 /* 1=Assert CRS on Transmit */ | 799 | #define M88E1000_PSCR_ASSERT_CRS_ON_TX 0x0800 /* 1=Assert CRS on Transmit */ |
807 | 800 | ||
808 | /* M88E1000 PHY Specific Status Register */ | 801 | /* M88E1000 PHY Specific Status Register */ |