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authorVenu Byravarasu <vbyravarasu@nvidia.com>2012-12-17 13:31:01 -0500
committerStephen Warren <swarren@nvidia.com>2013-01-28 13:20:04 -0500
commit16a665f805532ef3e3ff98fdbe0029dfee02df62 (patch)
tree34dad6fa3b4ee3d1f74a794049befb16cefc4af2
parentef3ffe5a0458606c488def757bb7f6dd013c2db5 (diff)
ARM: tegra: remove USB address related macros from iomap.h
USB register base address and sizes defined in iomap.h are not used in any files other than board-dt-tegra20.c. Hence removed those defines from header file and using the absolute values in board files. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/board-dt-tegra20.c6
-rw-r--r--arch/arm/mach-tegra/iomap.h9
2 files changed, 3 insertions, 12 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra20.c b/arch/arm/mach-tegra/board-dt-tegra20.c
index 5049edf68f4f..63cfc430f9c7 100644
--- a/arch/arm/mach-tegra/board-dt-tegra20.c
+++ b/arch/arm/mach-tegra/board-dt-tegra20.c
@@ -70,11 +70,11 @@ static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
70}; 70};
71 71
72static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { 72static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
73 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB_BASE, "tegra-ehci.0", 73 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5000000, "tegra-ehci.0",
74 &tegra_ehci1_pdata), 74 &tegra_ehci1_pdata),
75 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB2_BASE, "tegra-ehci.1", 75 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5004000, "tegra-ehci.1",
76 &tegra_ehci2_pdata), 76 &tegra_ehci2_pdata),
77 OF_DEV_AUXDATA("nvidia,tegra20-ehci", TEGRA_USB3_BASE, "tegra-ehci.2", 77 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5008000, "tegra-ehci.2",
78 &tegra_ehci3_pdata), 78 &tegra_ehci3_pdata),
79 {} 79 {}
80}; 80};
diff --git a/arch/arm/mach-tegra/iomap.h b/arch/arm/mach-tegra/iomap.h
index db8be51cad80..399fbca27102 100644
--- a/arch/arm/mach-tegra/iomap.h
+++ b/arch/arm/mach-tegra/iomap.h
@@ -240,15 +240,6 @@
240#define TEGRA_CSITE_BASE 0x70040000 240#define TEGRA_CSITE_BASE 0x70040000
241#define TEGRA_CSITE_SIZE SZ_256K 241#define TEGRA_CSITE_SIZE SZ_256K
242 242
243#define TEGRA_USB_BASE 0xC5000000
244#define TEGRA_USB_SIZE SZ_16K
245
246#define TEGRA_USB2_BASE 0xC5004000
247#define TEGRA_USB2_SIZE SZ_16K
248
249#define TEGRA_USB3_BASE 0xC5008000
250#define TEGRA_USB3_SIZE SZ_16K
251
252#define TEGRA_SDMMC1_BASE 0xC8000000 243#define TEGRA_SDMMC1_BASE 0xC8000000
253#define TEGRA_SDMMC1_SIZE SZ_512 244#define TEGRA_SDMMC1_SIZE SZ_512
254 245