ENGR00300658-2 ARM: dts: imx6sx: add csi and v4l2 capture support on imx6sx-sdb

Add CSI module and v4l2 capture support on imx6sx-sdb board

Note1: CSI has pin conflict with LCDIF1 on imx6sx-sdb board.
So camera connector(J13) and LCD expansion connector(J11) can not be used
at the same time. As a result, a new DTS file for LCDIF1 is added.

Note2: Camera connector(J13) can not be used without an adapter card (during
manufacturing process so far) because footprint is mirrored on Sabre-SDB.
This patch is to verify camera feature via LCD connector(J11).

Signed-off-by: Robby Cai <R63905@freescale.com>

4 files changed, 71 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 02e3d4a48f01..fd80bf32d6a4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -139,6 +139,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
         imx6sx-17x17-arm2.dtb \
         imx6sx-19x19-arm2.dtb \
         imx6sx-sdb.dtb \
+        imx6sx-sdb-lcdif1.dtb \
         vf610-twr.dtb
 dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \
         imx23-olinuxino.dtb \
diff --git a/arch/arm/boot/dts/imx6sx-sdb-lcdif1.dts b/arch/arm/boot/dts/imx6sx-sdb-lcdif1.dts
new file mode 100644
index 000000000000..dccbcb416769
--- /dev/null
+++ b/arch/arm/boot/dts/imx6sx-sdb-lcdif1.dts
@@ -0,0 +1,23 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "imx6sx-sdb.dts"
+
+/ {
+        csi1_v4l2_cap {
+                status = "disabled";
+        };
+};
+
+&csi1 {
+        status = "disabled";
+};
+
+&lcdif1 {
+        status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 69fcbe4b5a5f..87d7c2f56e52 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -81,6 +81,15 @@
                 mux-int-port = <2>;
                 mux-ext-port = <6>;
         };
+
+        csi1_v4l2_cap {
+                compatible = "fsl,imx6sx-csi-v4l2", "fsl,imx6sl-csi-v4l2";
+                status = "okay";
+        };
+};
+
+&csi1 {
+        status = "okay";
 };
 
 &adc1 {
@@ -380,7 +389,7 @@
                      &pinctrl_lcdif_ctrl_0>;
         lcd-supply = <&reg_lcd_3v3>;
         display = <&display>;
-        status = "okay";
+        status = "disabled";
 
         display: display {
                 bits-per-pixel = <16>;
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 8c7f82f00636..7d4b734914a3 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -872,6 +872,20 @@
                                 reg = <0x02240000 0x40000>;
                                 ranges;
 
+                                csi1: csi@02214000 {
+                                        compatible = "fsl,imx6sx-csi", "fsl,imx6sl-csi";
+                                        reg = <0x02214000 0x4000>;
+                                        interrupts = <0 7 0x04>;
+                                        status = "disabled";
+                                };
+
+                                csi2: csi@0221c000 {
+                                        compatible = "fsl,imx6sx-csi", "fsl,imx6sl-csi";
+                                        reg = <0x0221c000 0x4000>;
+                                        interrupts = <0 41 0x04>;
+                                        status = "disabled";
+                                };
+
                                 lcdif1: lcdif@02220000 {
                                         compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
                                         reg = <0x02220000 0x4000>;
@@ -992,6 +1006,29 @@
                 };
         };
 
+        csi {
+                pinctrl_csi_0: csigrp-0 {
+                        fsl,pins = <
+                                MX6SX_PAD_LCD1_DATA07__CSI1_MCLK        0x110b0
+                                MX6SX_PAD_LCD1_DATA06__CSI1_PIXCLK      0x110b0
+                                MX6SX_PAD_LCD1_DATA04__CSI1_VSYNC       0x110b0
+                                MX6SX_PAD_LCD1_DATA05__CSI1_HSYNC       0x110b0
+                                MX6SX_PAD_LCD1_DATA17__CSI1_DATA_0      0x110b0
+                                MX6SX_PAD_LCD1_DATA16__CSI1_DATA_1      0x110b0
+                                MX6SX_PAD_LCD1_DATA15__CSI1_DATA_2      0x110b0
+                                MX6SX_PAD_LCD1_DATA14__CSI1_DATA_3      0x110b0
+                                MX6SX_PAD_LCD1_DATA13__CSI1_DATA_4      0x110b0
+                                MX6SX_PAD_LCD1_DATA12__CSI1_DATA_5      0x110b0
+                                MX6SX_PAD_LCD1_DATA11__CSI1_DATA_6      0x110b0
+                                MX6SX_PAD_LCD1_DATA10__CSI1_DATA_7      0x110b0
+                                MX6SX_PAD_LCD1_DATA09__CSI1_DATA_8      0x110b0
+                                MX6SX_PAD_LCD1_DATA08__CSI1_DATA_9      0x110b0
+                                MX6SX_PAD_LCD1_ENABLE__GPIO3_IO_25      0x80000000
+                                MX6SX_PAD_LCD1_HSYNC__GPIO3_IO_26       0x80000000
+                        >;
+                };
+        };
+
         enet1 {
                 pinctrl_enet1_1: enet1grp-1 {
                         fsl,pins = <