/* * Low-level parallel-support for PC-style hardware integrated in the * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * (C) 1999-2001 by Helge Deller * * * based on parport_pc.c by * Grant Guenther * Phil Blundell * Tim Waugh * Jose Renau * David Campbell * Andrea Arcangeli */ #undef DEBUG /* undef for production */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "parport_gsc.h" MODULE_AUTHOR("Helge Deller "); MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver"); MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port"); MODULE_LICENSE("GPL"); /* * Clear TIMEOUT BIT in EPP MODE * * This is also used in SPP detection. */ static int clear_epp_timeout(struct parport *pb) { unsigned char r; if (!(parport_gsc_read_status(pb) & 0x01)) return 1; /* To clear timeout some chips require double read */ parport_gsc_read_status(pb); r = parport_gsc_read_status(pb); parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */ parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */ r = parport_gsc_read_status(pb); return !(r & 0x01); } /* * Access functions. * * Most of these aren't static because they may be used by the * parport_xxx_yyy macros. extern __inline__ versions of several * of these are in parport_gsc.h. */ void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s) { s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0); } void parport_gsc_save_state(struct parport *p, struct parport_state *s) { s->u.pc.ctr = parport_readb (CONTROL (p)); } void parport_gsc_restore_state(struct parport *p, struct parport_state *s) { parport_writeb (s->u.pc.ctr, CONTROL (p)); } struct parport_operations parport_gsc_ops = { .write_data = parport_gsc_write_data, .read_data = parport_gsc_read_data, .write_control = parport_gsc_write_control, .read_control = parport_gsc_read_control, .frob_control = parport_gsc_frob_control, .read_status = parport_gsc_read_status, .enable_irq = parport_gsc_enable_irq, .disable_irq = parport_gsc_disable_irq, .data_forward = parport_gsc_data_forward, .data_reverse = parport_gsc_data_reverse, .init_state = parport_gsc_init_state, .save_state = parport_gsc_save_state, .restore_state = parport_gsc_restore_state, .epp_write_data = parport_ieee1284_epp_write_data, .epp_read_data = parport_ieee1284_epp_read_data, .epp_write_addr = parport_ieee1284_epp_write_addr, .epp_read_addr = parport_ieee1284_epp_read_addr, .ecp_write_data = parport_ieee1284_ecp_write_data, .ecp_read_data = parport_ieee1284_ecp_read_data, .ecp_write_addr = parport_ieee1284_ecp_write_addr, .compat_write_data = parport_ieee1284_write_compat, .nibble_read_data = parport_ieee1284_read_nibble, .byte_read_data = parport_ieee1284_read_byte, .owner = THIS_MODULE, }; /* --- Mode detection ------------------------------------- */ /* * Checks for port existence, all ports support SPP MODE */ static int __devinit parport_SPP_supported(struct parport *pb) { unsigned char r, w; /* * first clear an eventually pending EPP timeout * I (sailer@ife.ee.ethz.ch) have an SMSC chipset * that does not even respond to SPP cycles if an EPP * timeout is pending */ clear_epp_timeout(pb); /* Do a simple read-write test to make sure the port exists. */ w = 0xc; parport_writeb (w, CONTROL (pb)); /* Is there a control register that we can read from? Some * ports don't allow reads, so read_control just returns a * software copy. Some ports _do_ allow reads, so bypass the * software copy here. In addition, some bits aren't * writable. */ r = parport_readb (CONTROL (pb)); if ((r & 0xf) == w) { w = 0xe; parport_writeb (w, CONTROL (pb)); r = parport_readb (CONTROL (pb)); parport_writeb (0xc, CONTROL (pb)); if ((r & 0xf) == w) return PARPORT_MODE_PCSPP; } /* Try the data register. The data lines aren't tri-stated at * this stage, so we expect back what we wrote. */ w = 0xaa; parport_gsc_write_data (pb, w); r = parport_gsc_read_data (pb); if (r == w) { w = 0x55; parport_gsc_write_data (pb, w); r = parport_gsc_read_data (pb); if (r == w) return PARPORT_MODE_PCSPP; } return 0; } /* Detect PS/2 support. * * Bit 5 (0x20) sets the PS/2 data direction; setting this high * allows us to read data from the data lines. In theory we would get back * 0xff but any peripheral attached to the port may drag some or all of the * lines down to zero. So if we get back anything that isn't the contents * of the data register we deem PS/2 support to be present. * * Some SPP ports have "half PS/2" ability - you can't turn off the line * drivers, but an external peripheral with sufficiently beefy drivers of * its own can overpower them and assert its own levels onto the bus, from * where they can then be read back as normal. Ports with this property * and the right type of device attached are likely to fail the SPP test, * (as they will appear to have stuck bits) and so the fact that they might * be misdetected here is rather academic. */ static int __devinit parport_PS2_supported(struct parport *pb) { int ok = 0; clear_epp_timeout(pb); /* try to tri-state the buffer */ parport_gsc_data_reverse (pb); parport_gsc_write_data(pb, 0x55); if (parport_gsc_read_data(pb) != 0x55) ok++; parport_gsc_write_data(pb, 0xaa); if (parport_gsc_read_data(pb) != 0xaa) ok++; /* cancel input mode */ parport_gsc_data_forward (pb); if (ok) { pb->modes |= PARPORT_MODE_TRISTATE; } else { struct parport_gsc_private *priv = pb->private_data; priv->ctr_writable &= ~0x20; } return ok; } /* --- Initialisation code -------------------------------- */ struct parport *__devinit parport_gsc_probe_port (unsigned long base, unsigned long base_hi, int irq, int dma, struct pci_dev *dev) { struct parport_gsc_private *priv; struct parport_operations *ops; struct parport tmp; struct parport *p = &tmp; priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL); if (!priv) { printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base); return NULL; } ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL); if (!ops) { printk (KERN_DEBUG "parport (0x%lx): no mem# perf script event handlers, generated by perf script -g python # (c) 2010, Tom Zanussi <tzanussi@gmail.com> # Licensed under the terms of the GNU GPL License version 2 # # This script tests basic functionality such as flag and symbol # strings, common_xxx() calls back into perf, begin, end, unhandled # events, etc. Basically, if this script runs successfully and # displays expected results, Python scripting support should be ok. import os import sys sys.path.append(os.environ['PERF_EXEC_PATH'] + \ '/scripts/python/Perf-Trace-Util/lib/Perf/Trace') from Core import * from perf_trace_context import * unhandled = autodict() def trace_begin(): print "trace_begin" pass def trace_end(): print_unhandled() def irq__softirq_entry(event_name, context, common_cpu, common_secs, common_nsecs, common_pid, common_comm, common_callchain, vec): print_header(event_name, common_cpu, common_secs, common_nsecs, common_pid, common_comm) print_uncommon(context) print "vec=%s\n" % \ (symbol_str("irq__softirq_entry", "vec", vec)), def kmem__kmalloc(event_name, context, common_cpu, common_secs, common_nsecs, common_pid, common_comm, common_callchain, call_site, ptr, bytes_req, bytes_alloc, gfp_flags): print_header(event_name, common_cpu, common_secs, common_nsecs, common_pid, common_comm