path: root/arch/sh/kernel/cpu/sh4a/setup-sh7757.c

/*
 * SH7757 Setup
 *
 * Copyright (C) 2009, 2011  Renesas Solutions Corp.
 *
 *  based on setup-sh7785.c : Copyright (C) 2007  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/serial.h>
#include <linux/serial_sci.h>
#include <linux/io.h>
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/sh_timer.h>
#include <linux/sh_dma.h>
#include <linux/sh_intc.h>
#include <cpu/dma-register.h>
#include <cpu/sh7757.h>

static struct plat_sci_port scif2_platform_data = {
	.mapbase	= 0xfe4b0000,		/* SCIF2 */
	.flags		= UPF_BOOT_AUTOCONF,
	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
	.scbrr_algo_id	= SCBRR_ALGO_2,
	.type		= PORT_SCIF,
	.irqs		= SCIx_IRQ_MUXED(evt2irq(0x700)),
};

static struct platform_device scif2_device = {
	.name		= "sh-sci",
	.id		= 0,
	.dev		= {
		.platform_data	= &scif2_platform_data,
	},
};

static struct plat_sci_port scif3_platform_data = {
	.mapbase	= 0xfe4c0000,		/* SCIF3 */
	.flags		= UPF_BOOT_AUTOCONF,
	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
	.scbrr_algo_id	= SCBRR_ALGO_2,
	.type		= PORT_SCIF,
	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xb80)),
};

static struct platform_device scif3_device = {
	.name		= "sh-sci",
	.id		= 1,
	.dev		= {
		.platform_data	= &scif3_platform_data,
	},
};

static struct plat_sci_port scif4_platform_data = {
	.mapbase	= 0xfe4d0000,		/* SCIF4 */
	.flags		= UPF_BOOT_AUTOCONF,
	.scscr		= SCSCR_RE | SCSCR_TE | SCSCR_REIE,
	.scbrr_algo_id	= SCBRR_ALGO_2,
	.type		= PORT_SCIF,
	.irqs		= SCIx_IRQ_MUXED(evt2irq(0xF00)),
};

static struct platform_device scif4_device = {
	.name		= "sh-sci",
	.id		= 2,
	.dev		= {
		.platform_data	= &scif4_platform_data,
	},
};

static struct sh_timer_config tmu0_platform_data = {
	.channel_offset = 0x04,
	.timer_bit = 0,
	.clockevent_rating = 200,
};

static struct resource tmu0_resources[] = {
	[0] = {
		.start	= 0xfe430008,
		.end	= 0xfe430013,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= evt2irq(0x580),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device tmu0_device = {
	.name		= "sh_tmu",
	.id		= 0,
	.dev = {
		.platform_data	= &tmu0_platform_data,
	},
	.resource	= tmu0_resources,
	.num_resources	= ARRAY_SIZE(tmu0_resources),
};

static struct sh_timer_config tmu1_platform_data = {
	.channel_offset = 0x10,
	.timer_bit = 1,
	.clocksource_rating = 200,
};

static struct resource tmu1_resources[] = {
	[0] = {
		.start	= 0xfe430014,
		.end	= 0xfe43001f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= evt2irq(0x5a0),
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device tmu1_device = {
	.name		= "sh_tmu",
	.id		= 1,
	.dev = {
		.platform_data	= &tmu1_platform_data,
	},
	.resource	= tmu1_resources,
	.num_resources	= ARRAY_SIZE(tmu1_resources),
};

static struct resource spi0_resources[] = {
	[0] = {
		.start	= 0xfe002000,
		.end	= 0xfe0020ff,
		.flags	= IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
	},
	[1] = {
		.start	= evt2irq(0xcc0),
		.flags	= IORESOURCE_IRQ,
	},
};

/* DMA */
static const struct sh_dmae_slave_config sh7757_dmae0_slaves[] = {
	{
		.slave_id	= SHDMA_SLAVE_SDHI_TX,
		.addr		= 0x1fe50030,
		.chcr		= SM_INC | 0x800 | 0x40000000 |
				  TS_INDEX2VAL(XMIT_SZ_16BIT),
		.mid_rid	= 0xc5,
	},
	{
		.slave_id	= SHDMA_SLAVE_SDHI_RX,
		.addr		= 0x1fe50030,
		.chcr		= DM_INC | 0x800 | 0x40000000 |
				  TS_INDEX2VAL(XMIT_SZ_16BIT),
		.mid_rid	= 0xc6,
	},
	{
		.slave_id	= SHDMA_SLAVE_MMCIF_TX,
		.addr		= 0x1fcb0034,
		.chcr		= SM_INC | 0x800 | 0x40000000 |
				  TS_INDEX2VAL(XMIT_SZ_32BIT),
		.mid_rid	= 0xd3,
	},
	{
		.slave_id	= SHDMA_SLAVE_MMCIF_RX,
		.addr		= 0x1fcb0034,
		.chcr		= DM_INC | 0x800 | 0x40000000 |
				  TS_INDEX2VAL(XMIT_SZ_32BIT),
		.mid_rid	= 0xd7,
	},
};

static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
	{
		.slave_id	= SHDMA_SLAVE_SCIF2_TX,
		.addr		= 0x1f4b000c,
		.chcr		= SM_INC | 0x800 | 0x40000000 |
				  TS_INDEX2VAL(XMIT_SZ_8BIT),
		.mid_rid	= 0x21,
	},
	{
		.slave_id	= SHDMA_SLAVE_SCIF2_RX,
		.addr		= 0x1f4b0014,