| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 | Thomas Gleixner | 2019-05-30 |
| * | phy: ti-pipe3: Fix PCIe power up sequence | Roger Quadros | 2019-04-17 |
| * | phy: ti-pipe3: Fix SATA & USB PHY power up sequence | Roger Quadros | 2019-04-17 |
| * | phy: ti-pipe3: improve DPLL stability for SATA & USB | Roger Quadros | 2019-04-17 |
| * | phy: ti-pipe3: Introduce mode property in driver data | Roger Quadros | 2019-04-17 |
| * | phy: ti-pipe3: fix missing bit-wise or operator when assigning val | Colin Ian King | 2019-04-17 |
| * | phy: ti-pipe3: Update pcie phy settings | Kishon Vijay Abraham I | 2017-10-23 |
| * | phy: ti-pipe3: Use TRM recommended settings for SATA DPLL | Roger Quadros | 2017-08-20 |
| * | phy: Group vendor specific phy drivers | Vivek Gautam | 2017-06-01 |
 |
index : litmus-rt-ext-res.git | |
| LITMUS^RT with extended reservations for Forbidden Zones paper @ RTAS'20 | Zelin Tong |
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