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| * i2c: octeon: Add workaround for broken irqs on CN3860David Daney2016-04-27
| | | | | | | | | | | | | | | | | | | | CN3860 does not interrupt the CPU when the i2c status changes. If we get a timeout, and see the status has in fact changed, we know we have this problem, and drop back to polling. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: nforce2: Use IS_ENABLED() instead of checking for built-in or moduleJavier Martinez Canillas2016-04-26
| | | | | | | | | | | | | | | | The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either built-in or as a module, use that macro instead of open coding the same. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: imx: reduce load by using usleep_range instead of udelayOleksij Rempel2016-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Documentation/timers/timers-howto.txt recommends to use usleep_range on delays > 10usec. According to my test results with Neonode zForce touchscreen driver, usleep_range indeed reduces CPU load. Stats collected with "./perf record -a -g -F 1000 sleep 10" i2c-imx with udelay(50): 34.19% 0.00% irq/220-Neonode [kernel.kallsyms] [k] irq_thread ---irq_thread |--33.75%--irq_thread_fn | |--19.27%--0x7f08a878 | | i2c_master_recv | | i2c_transfer | | __i2c_transfer | | i2c_imx_xfer | | |--11.71%--i2c_imx_trx_complete | | |--5.70%--i2c_imx_start <<<<---------------- | | | |--5.38%--__timer_const_udelay | | | | __timer_delay | | | | --5.07%--read_current_timer i2c-imx with usleep_range(50,100) 29.08% 0.00% irq/220-Neonode [kernel.kallsyms] [k] irq_thread ---irq_thread |--28.89%--irq_thread_fn | |--17.21%--0x7f08a878 | | i2c_master_recv | | |--17.14%--i2c_transfer | | | __i2c_transfer | | | i2c_imx_xfer | | | |--14.29%--i2c_imx_trx_complete | | | |--1.42%--i2c_imx_start <<<<---------- | | | | |--0.71%--usleep_range | | | | |--0.53%--i2c_imx_bus_busy Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Reviewed-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Improve performance if interrupt is earlyPeter Swain2016-04-26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a race between the TWSI interrupt and the condition that is required before proceeding: Low-level: interrupt flag bit must be set High-level controller: valid bit must be clear If the interrupt comes too early and the condition is not met the wait will time out, and the transfer is aborted leading to very poor performance. To avoid this race retry for the condition ~80 µs later. The retry is avoided on the very first invocation of wait_event_timeout() (which tests the condition before entering the wait and is therefore always wrong in this case). EEPROM reads on 100kHz i2c now measure ~5.2kB/s, about 1/2 what's achievable, and much better than the worst-case 100 bytes/sec before. While at it remove the debug print from the low-level wait function. Signed-off-by: Peter Swain <pswain@cavium.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Remove zero-length message supportJan Glauber2016-04-26
| | | | | | | | | | | | | | | | | | | | | | | | Zero-length message support (SMBUS QUICK or i2c) never worked with the Octeon hardware. Disable SMBUS QUICK support and bail out in case of a zero-length i2c request. After this change 'i2c-detect -q' will return an error on Octeon but the previously reported results were wrong anyway. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: s3c2410: Check clk_prepare_enable() return valueJavier Martinez Canillas2016-04-25
| | | | | | | | | | | | | | | | | | The clk_prepare_enable() function can fail so check the return value and propagate the error in case of a failure. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: s3c2410: Print errno code in error logsJavier Martinez Canillas2016-04-25
| | | | | | | | | | | | | | | | | | The driver not always prints the error code in case of a failure but this information can be very useful for debugging. So let's print if available. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: s3c2410: Cleanup indentation and comment styleKrzysztof Kozlowski2016-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Improve the readability by: - fixing indentation, - switching to proper block comments, - removing spurious blank lines, - checkpatch: void function return statements are not generally useful, - checkpatch: braces {} are not necessary for any arm of this statement, - checkpatch: missing a blank line after declarations. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: s3c2410: Minor function-level comment cleanupKrzysztof Kozlowski2016-04-25
| | | | | | | | | | | | | | | | | | Cleanup the weird function-level comments and remove obvious documentation for probe/remove. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: s3c2410: Add missing clock unprepare on probe() error pathKrzysztof Kozlowski2016-04-25
| | | | | | | | | | | | | | | | | | If during probe() the s3c24xx_i2c_init() failed, the clock was left in disabled but prepared state. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Add support for cn78xx chipsJan Glauber2016-04-25
| | | | | | | | | | | | | | | | | | cn78xx has a different interrupt architecture, so we have to manage the interrupts differently. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Enable High-Level ControllerDavid Daney2016-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use High-Level Controller (HLC) when possible. The HLC can read/write up to 8 bytes and is completely optional. The most important difference of the HLC is that it only requires one interrupt for a transfer (up to 8 bytes) where the low-level read/write requires 2 interrupts plus one interrupt per transferred byte. Since the interrupts are costly using the HLC improves the performance. Also, the HLC provides improved error handling. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> [wsa: fixed trivial checkpatch warnings] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Add flush writeq helper functionPeter Swain2016-04-25
| | | | | | | | | | | | | | | | | | Add helper function that reads back a value after writing to make sure the write is finished and use it in octeon_i2c_write_int(). Signed-off-by: Peter Swain <pswain@cavium.com> Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Use i2c recovery frameworkJan Glauber2016-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch to the i2c bus recovery framework using generic SCL recovery. If this fails try to reset the hardware. The recovery is triggered during START on timeout of the interrupt or failure to reach the START / repeated-START condition. The START function is moved to xfer and while at it remove the xfer debug message (i2c core already provides a debug message for this). Signed-off-by: Jan Glauber <jglauber@cavium.com> [wsa: removed one empty line] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Improve error status checkingJan Glauber2016-04-25
| | | | | | | | | | | | | | | | | | | | | | | | | | Introduce a function that checks for valid status codes depending on the phase of a transmit or receive. Also add all existing status codes and improve error handling for various states. The Octeon TWSI has an "assert acknowledge" bit (TWSI_CTL_AAK) that is required to be set in master receive mode until the last byte is requested. The state check needs to consider if this bit was set. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: s3c2410: Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS instead of open-codedAxel Lin2016-04-24
| | | | | | | | | | | | | | | | Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS to simplify the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: exynos5: Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS instead of open-codedAxel Lin2016-04-24
| | | | | | | | | | | | | | | | Use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS to simplify the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mux: pinctrl: fix indentation for better readabilityWolfram Sang2016-04-24
| | | | | | | | | | | | | | | | | | | | smatch rightfully says: drivers/i2c/muxes/i2c-mux-pinctrl.c:175 i2c_mux_pinctrl_probe() warn: inconsistent indenting Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: omap: drop the lock hard irq contextSebastian Andrzej Siewior2016-04-24
| | | | | | | | | | | | | | | | | | | | | | | | | | The lock is taken while reading two registers. On RT the first lock is taken in hard irq where it might sleep and in the threaded irq. The threaded irq runs in oneshot mode so the hard irq does not run until the thread the completes so there is no reason to grab the lock. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> [grygorii.strashko@ti.com: drop locking from isr completely and remove lock field from struct omap_i2c_dev] Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: dln2: Pass forward ACPI companionIrina Tirdea2016-04-24
| | | | | | | | | | | | | | | | | | | | Share the ACPI companion for the platform device with the i2c adapter, so that the adapter has access to the properties defined in ACPI tables. Signed-off-by: Irina Tirdea <irina.tirdea@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mux: drop old unused i2c-mux apiPeter Rosin2016-04-22
| | | | | | | | | | | | | | | | All i2c mux users are using an explicit i2c mux core, drop support for implicit i2c mux cores. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-mux-reg: convert to use an explicit i2c mux corePeter Rosin2016-04-22
| | | | | | | | | | | | | | | | | | Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-mux-pca954x: convert to use an explicit i2c mux corePeter Rosin2016-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Add a mask to handle the case where not all child adapters should cause a mux deselect to happen, now that there is a common deselect op for all child adapters. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-mux-pca9541: convert to use an explicit i2c mux corePeter Rosin2016-04-22
| | | | | | | | | | | | | | | | | | Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-arb-gpio-challenge: convert to use an explicit i2c mux corePeter Rosin2016-04-22
| | | | | | | | | | | | | | | | | | Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-mux-pinctrl: convert to use an explicit i2c mux corePeter Rosin2016-04-22
| | | | | | | | | | | | | | | | | | Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i2c-mux-gpio: convert to use an explicit i2c mux corePeter Rosin2016-04-22
| | | | | | | | | | | | | | | | | | Allocate an explicit i2c mux core to handle parent and child adapters etc. Update the select/deselect ops to be in terms of the i2c mux core instead of the child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mux: add common data for every i2c-mux instancePeter Rosin2016-04-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All i2c-muxes have a parent adapter and one or many child adapters. A mux also has some means of selection. Previously, this was stored per child adapter, but it is only needed to keep track of this per mux. Add an i2c mux core, that keeps track of this consistently. Also add some glue for users of the old interface, which will create one implicit mux core per child adapter. Signed-off-by: Peter Rosin <peda@axentia.se> Tested-by: Antti Palosaari <crope@iki.fi> Tested-by: Crestez Dan Leonard <leonard.crestez@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: rk3x: switch to i2c generic dt parsingDavid Wu2016-04-14
| | | | | | | | | | | | | | Switch to the new generic functions: i2c_parse_fw_timings(). Signed-off-by: David Wu <david.wu@rock-chips.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Remove superfluous check in octeon_i2c_test_iflgJan Glauber2016-04-14
| | | | | | | | | | | | | | Remove superfluous check and stray newline. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Introduce helper functions for register accessJan Glauber2016-04-14
| | | | | | | | | | | | | | | | | | Add helper functions for control, data and status register access. This simplifies the code and makes the purpose of the register access clearer. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Rename [read|write]_sw to reg_[read|write]Jan Glauber2016-04-14
| | | | | | | | | | | | | | | | Rename the [read|write]_sw functions to make it clearer they access the TWSI registers. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Move set-clock and init-lowlevel upwardJan Glauber2016-04-13
| | | | | | | | | | | | | | | | No functional change, just moving the functions upward in preparation of improving the recovery. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: octeon: Increase retry default and use fixed timeout valueJan Glauber2016-04-13
| | | | | | | | | | | | | | | | | | | | Convert the adapter timeout to 2 ms independently of depending on CONFIG_HZ. CONFIG_HZ is 100 for MIPS Cavium-Octeon so the timeout value is not changed. Also set retries to 5 to improve robustness. Signed-off-by: Jan Glauber <jglauber@cavium.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: tegra: enable multi master mode for tegra210Shardar Shariff Md2016-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable multi-master mode in I2C_CNFG reg based on hw features. Using single/multi-master mode bit introduced for Tegra210, whereas multi-master mode is enabled by default in HW for T124 and earlier Tegra SOC. Enabling this bit doesn't explicitly start treating the bus has having multiple masters, but will start checking for arbitration lost and reporting when it occurs. The Tegra210 I2C controller supports single/multi master mode. Add chipdata for Tegra210 and its compatibility string so that Tegra210 will select data that enables multi master mode correctly. Do below prerequisites for multi-master bus if "multi-master" dt property entry is added. 1. Enable 1st level clock always set. 2. Disable 2nd level clock gating (slcg which is supported from T124 SOC and later chips) Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i801: Add runtime PM support with autosuspendJarkko Nikula2016-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow runtime PM so that PM and PCI core can put the device into low-power state when idle and resume it back when needed in those platforms that support PM for i801 device. Enable also autosuspend with 1 second delay in order to not needlessly toggle power state on and off if there are multiple transactions during short time. Device is resumed at the beginning of bus access and marked idle ready for autosuspend at the end of it. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: i801: Convert to struct dev_pm_ops for suspend/resumeJarkko Nikula2016-04-12
| | | | | | | | | | | | | | | | | | | | | | | | Stop using legacy PCI PM support and convert to standard dev_pm_ops. This provides more straightforward path to add runtime PM. While at it remove explicit PCI power state control and configuration space save/restore as the PCI core does it. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: let I2C masters ignore their children for PMLinus Walleij2016-04-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using a certain I2C device with runtime PM enabled on a certain I2C bus adaper the following happens: struct amba_device *foo \ struct i2c_adapter *bar \ struct i2c_client *baz The AMBA device foo has its device PM struct set to ignore children with pm_suspend_ignore_children(&foo->dev, true). This makes runtime PM work just fine locally in the driver: the fact that devices on the bus are suspended or resumed individually does not affect its operation, and the hardware does not power up unless transferring messages. However this child ignorance property is not inherited into the struct i2c_adapter *bar. On system suspend things will work fine. On system resume the following annoying phenomenon occurs: - In the pm_runtime_force_resume() path of struct i2c_client *baz, pm_runtime_set_active(&baz->dev); is eventually called. - This becomes __pm_runtime_set_status(&baz->dev, RPM_ACTIVE); - __pm_runtime_set_status() detects that RPM state is changed, and checks whether the parent is: not active (RPM_ACTIVE) and not ignoring its children If this happens it concludes something is wrong, because a parent that is not ignoring its children must be active before any children activate. - Since the struct i2c_adapter *bar does not ignore its children, the PM core thinks that it must indeed go online before its children, the check bails out with -EBUSY, i.e. the i2c_client *baz thinks it can't work because it's parent is not online, and it respects its parent. - In the driver the .resume() callback returns -EBUSY from the runtime_force_resume() call as per above. This leaves the device in a suspended state, leading to bad behaviour later when the device is used. The following debug print is made with an extra printg patch but illustrates the problem: [ 17.040832] bh1780 2-0029: parent (i2c-2) is not active parent->power.ignore_children = 0 [ 17.040832] bh1780 2-0029: pm_runtime_force_resume: pm_runtime_set_active() failed (-16) [ 17.040863] dpm_run_callback(): pm_runtime_force_resume+0x0/0x88 returns -16 [ 17.040863] PM: Device 2-0029 failed to resume: error -16 Fix this by letting all struct i2c_adapter:s ignore their children: i2c children have no business doing keeping their parents awake: they are completely autonomous devices that just use their parent to talk, a usecase which must be power managed in the host on a per-message basis. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: st: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sirf: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: sh_mobile: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: qup: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: powermac: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: ocores: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: mt65xx: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: lpc2k: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: iop3xx: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: img-scb: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: ibm_iic: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
| * i2c: cpm: use new 8 bit address helper functionWolfram Sang2016-04-11
| | | | | | | | | | Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-20 19:26:45 -0400