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path: root/drivers/gpu/drm/nouveau/include/nvkm/subdev
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* drm/nouveau/fb/gp104: initial supportBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/ltc/gp100: initial supportBen Skeggs2016-07-13
| | | | | | | | Due to the GPU preventing us from touching NV_PLTCG_LTCS_LTSS_CBC_BASE, we cannot provide CBC/ZBC support without signed PMU firmware to handle the task for us... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb/gp100: initial supportBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pci/gp100: initial supportBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/gp100: initial supportBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb/gf100-: allow selection of an alternate big page sizeBen Skeggs2016-07-13
| | | | | | | | | | | | | GFxxx/GM1xx support the selection of 64/128KiB big pages globally. GM2xx supports the same, as well as another mode where the page size can be selected per-instance. We default to 128KiB pages (With per-instance for GM200, but the current code selects 128KiB there already) as the MMU code isn't currently able to handle otherwise. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: pointers beyond end of first image need special handlingBen Skeggs2016-07-13
| | | | | | | | | Makes common the code that was previously used by the PMU table parsing, as it appears other tables need this too. Not much of an idea what this is all about... Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios: guard against out-of-bounds accesses to imageBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/volt: save the voltage range we are able to setKarol Herbst2016-07-13
| | | | | | | | | | We shouldn't set voltages below the min or above the max voltage the gpu is able to set, so save the range for future lookups. Signed-off-by: Karol Herbst <karolherbst@gmail.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Tested-by: Pierre Moreau <pierre.morrow@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/secboot: use nvkm_mc_enable/disable()Ben Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/secboot: use nvkm_mc_intr_mask/unmask()Ben Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: support for temporarily masking interrupts from a specific ↵Ben Skeggs2016-07-13
| | | | | | device Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: expose device enable/disable separately, as well as resetBen Skeggs2016-07-13
| | | | | | | | | | There are cases where subdevs need to perform additonal actions around the master reset, so we want to expost the operations separately. This commit also adds a flag to the NV_PMC_ENABLE bitfield definitions which allow skipping the automatic reset() called from core/subdev.c. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: take nvkm_device as argument to public functionsBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/top: add function to lookup interrupt mask for a given deviceBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/top: take nvkm_device as argument to public functionsBen Skeggs2016-07-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/bios/disp: fix handling of "match any protocol" entriesBen Skeggs2016-06-01
| | | | | | | As it turns out, a value of 0xff means "any protocol" and not "VGA". Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Cc: stable@vger.kernel.org
* drm/nouveau/fb/gm200: setup mmu debug buffer registers at init()Ben Skeggs2016-05-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fb/gf100-: allocate mmu debug buffersBen Skeggs2016-05-20
| | | | | | | Later chipsets require setting this up both in FB and GR, so let's just move the allocation to FB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/nv11: define reset masks + intr cleanupBen Skeggs2016-05-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/nv17: define reset masks + intr cleanupBen Skeggs2016-05-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/g84: define reset masks + intr cleanupBen Skeggs2016-05-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/gt215: define reset masks + intr cleanupBen Skeggs2016-05-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc/gk104: define reset masks + intr cleanupBen Skeggs2016-05-20
| | | | | | Engine fields have been removed, as they're specified by PTOP. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mc: add helper function to handle device resetBen Skeggs2016-05-20
| | | | | | | This will be later extended to handle PTOP-specified reset masks as well as the hardcoded ones. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/top/gk104: initial implementationBen Skeggs2016-05-20
| | | | | | Ported from the code currently in engine/fifo/gk104.c. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/top: initial implementationBen Skeggs2016-05-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: add top plumbingBen Skeggs2016-05-20
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: split sensor into own structKarol Herbst2016-05-20
| | | | | | | | v2: add list_del call, reword error message Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: convert to linked listKarol Herbst2016-05-20
| | | | | | | | v2: add list_del calls Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: remove read functionKarol Herbst2016-05-20
| | | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/devinit/gf100: make devinit on resume saferAlexandre Courbot2016-05-20
| | | | | | | | | | | | | | | | | | In case of successful suspend, devinit will have to be run and this is the behavior currently hardcoded. However, as FD bug 94725 suggests, there might be cases where runtime suspend leaves the GPU powered, and in such cases devinit should not be run on resume. On GF100+ we have a reliable way to know whether we need to run devinit. Use it instead of blindly trusting the flag set by nvkm_devinit_fini(). The code around the NvForcePost also needs to be slightly reworked in order to keep working. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Suggested-by: Dave Airlie <airlied@redhat.com> Suggested-by: Karol Herbst <nouveau@karolherbst.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/clk/gm20b: add basic driverAlexandre Courbot2016-03-13
| | | | | | | Add a basic clock driver that reuses the GK20A logic. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/volt: add GM20B driverAlexandre Courbot2016-03-13
| | | | | | | Add basic GM20B volt driver that reuses the GK20A logic. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/iccsense: implement for ina209, ina219 and ina3221Karol Herbst2016-03-13
| | | | | | | | | | | | | based on Martins initial work v3: fix ina2x9 calculations v4: don't kmalloc(0), fix the lsb/pga stuff v5: add a field to tell if the power reading may be invalid add nkvm_iccsense_read_all function check for the device on the i2c bus Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* drm/nouveau/nvbios/iccsense: add parsing of the SENSE tableMartin Peres2016-03-13
| | | | | | | | | Karol Herbst: v4: don't kmalloc(0) v5: stricter validation Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* drm/nouveau/subdev/iccsense: add new subdev for power sensorsMartin Peres2016-03-13
| | | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de> Reviewed-by: Martin Peres <martin.peres@free.fr>
* drm/nouveau/secboot/gm20b: add secure boot supportAlexandre Courbot2016-03-13
| | | | | | | | | | | | Add secure boot support for the GM20B chip found in Tegra X1. Secure boot on Tegra works slightly differently from desktop, notably in the way the WPR region is set up. In addition, the firmware bootloaders use a slightly different header format. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/secboot/gm200: add secure-boot supportAlexandre Courbot2016-03-13
| | | | | | | | | | | | | Add secure-boot for the dGPU set of GM20X chips, using the PMU as the high-secure falcon. This work is based on Deepak Goyal's initial port of Secure Boot to Nouveau. v2. use proper memory target function Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/core: add support for secure bootAlexandre Courbot2016-03-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | On GM200 and later GPUs, firmware for some essential falcons (notably GR ones) must be authenticated by a NVIDIA-produced signature and loaded by a high-secure falcon in order to be able to access privileged registers, in a process known as Secure Boot. Secure Boot requires building a binary blob containing the firmwares and signatures of the falcons to be loaded. This blob is then given to a high-secure falcon running a signed loader firmware that copies the blob into a write-protected region, checks that the signatures are valid, and finally loads the verified firmware into the managed falcons and switches them to privileged mode. This patch adds infrastructure code to support this process on chips that require it. v2: - The IRQ mask of the PMU falcon was left - replace it with the proper irq_mask variable. - The falcon reset procedure expecting a falcon in an initialized state, which was accidentally provided by the PMU subdev. Make sure that secboot can manage the falcon on its own. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: s/gm204/gm200/ in a number of placesBen Skeggs2016-03-13
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/perf: add fields for pci speed and width and use it for the pstatesKarol Herbst2016-01-10
| | | | Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/bios/perf: parse the pci speed from the bios for tesla and newer ↵Karol Herbst2016-01-10
| | | | | | cards Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/pci: implement generic code for pcie speed changeKarol Herbst2016-01-10
| | | | | | | | | | | | v2: rename and group functions v4: change copyright information move printing of pcie speeds into oneinit, rename all pcie functions to nvkm_pcie_* don't try to raise the pcie version when no higher one is supported v5: revert Copyright changes and rename nvkm_pcie_raise_version to nvkm_pcie_set_version v6: remove some useless pci_is_pcie checks and rework messages Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/pci: add gk104 variantKarol Herbst2016-01-10
| | | | | | | | v2: change email used in header v4: change Copyright information v5: revert Copyright changes Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/pci: add gf106 variantKarol Herbst2016-01-10
| | | | | | | | v2: change email used in header v4: change Copyright information v5: revert Copyright changes Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
* drm/nouveau/clk: remove references to "daemon"Ben Skeggs2016-01-10
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/ltc/gm204: split implementation from gm107Ben Skeggs2016-01-10
| | | | | | | | Differences from GM10x: - GM20x LTC count detection differs from GM10x - GM20x init doesn't require large page size setting Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/ibus/gm204: split implementation from gk104Ben Skeggs2016-01-10
| | | | | | GM20x doesn't require the priv ring timeout bumps that GK/GM10x have. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/instmem: protect instobj list with a spinlockBen Skeggs2015-11-25
| | | | | | | | | No locking is required for the traversal of this list, as it only happens during suspend/resume where nothing else can be executing. Fixes some of the issues noticed during parallel piglit runs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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