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path: root/drivers/gpu/drm/amd/amdgpu/vi.c
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* Merge branch 'drm-next-4.15-dc' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2017-10-08
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next Initial pull request for DC support. We've completed a substantial amount of the cleanup and restructuring in our TODO. There are a few additional cleanups that we are continuing to work on, but I don't think there are any showstoppers remaining. We've tried to maintain most of the history for bisect purposes. Harry made sure all the commits build. We've enabled DC for vega10 and Raven. Pre-vega10 parts can be enabled via module parameter (amdgpu.dc=1), but are not enabled by default at this point until we get further testing upstream. This code provides atomic modesetting support for DCE8 (CIK), DCE10 (Tonga, Fiji), DCE11 (CZ, ST, Polaris), DCE12 (vega10), and DCN1 (RV) including HDMI and DP audio, DP MST, and many other advanced display features. + Latest cleanups for DC from you and Harry. Note that there is some flickering on some older asics with this branch due to a regression in powerplay that has already been fixed and will be included in my next non-DC pull request next week. * 'drm-next-4.15-dc' of git://people.freedesktop.org/~agd5f/linux: (897 commits) amdgpu/dc: use kref for dc_state. amdgpu/dc: convert dc_sink to kref. amdgpu/dc: convert dc_stream_state to kref. amdgpu/dc: use kref for dc_plane_state. amdgpu/dc: convert dc_gamma to kref reference counting. amdgpu/dc: convert dc_transfer to use a kref. amdgpu/dc: kill a bunch of dead code. amdgpu/dc: set a bunch of functions to static. amdgpu/dc: kill some deadcode in dc core. amdgpu/dc: fix indentation on a couple of returns. amdgpu/dm: don't use after free. amdgpu/dc: kfree already checks for NULL. amdgpu/dc: fix a bunch of misc whitespace. amdgpu/dc: drop hw_sequencer_types.h amdgpu/dc: drop dce110_types.h amdgpu/dc: use kernel ilog2 for log_2. amdgpu/dc: don't memset after kzalloc. amdgpu/dc: inline dal grph object id functions. amdgpu/dc: inline dml_round_to_multiple amdgpu/dc: rename bios get_image symbol to something more searchable. ...
| * drm/amd/dc: Add dc display driver (v2)Harry Wentland2017-09-26
| | | | | | | | | | | | | | | | | | | | Supported DCE versions: 8.0, 10.0, 11.0, 11.2 v2: rebase against 4.11 Signed-off-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/powerplay: move set_clockgating_by_smu to pp func tableRex Zhu2017-10-06
|/ | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: Disable GFX PG on CZFelix Kuehling2017-08-15
| | | | | | | | | It's causing problems with user mode queues and the HIQ, and can lead to hard hangs during boot after programming RLC_CP_SCHEDULERS. Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
* Merge branch 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2017-06-15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next New radeon and amdgpu features for 4.13: - Lots of Vega10 bug fixes - Preliminary Raven support - KIQ support for compute rings - MEC queue management rework from Andres - Audio support for DCE6 - SR-IOV improvements - Improved module parameters for controlling radeon vs amdgpu support for SI and CIK - Bug fixes - General code cleanups [airlied: dropped drmP.h header from one file was needed and build broke] * 'drm-next-4.13' of git://people.freedesktop.org/~agd5f/linux: (362 commits) drm/amdgpu: Fix compiler warnings drm/amdgpu: vm_update_ptes remove code duplication drm/amd/amdgpu: Port VCN over to new SOC15 macros drm/amd/amdgpu: Port PSP v10.0 over to new SOC15 macros drm/amd/amdgpu: Port PSP v3.1 over to new SOC15 macros drm/amd/amdgpu: Port NBIO v7.0 driver over to new SOC15 macros drm/amd/amdgpu: Port NBIO v6.1 driver over to new SOC15 macros drm/amd/amdgpu: Port UVD 7.0 over to new SOC15 macros drm/amd/amdgpu: Port MMHUB over to new SOC15 macros drm/amd/amdgpu: Cleanup gfxhub read-modify-write patterns drm/amd/amdgpu: Port GFXHUB over to new SOC15 macros drm/amd/amdgpu: Add offset variant to SOC15 macros drm/amd/powerplay: add avfs control for Vega10 drm/amdgpu: add virtual display support for raven drm/amdgpu/gfx9: fix compute ring doorbell index drm/amd/amdgpu: Rename KIQ ring to avoid spaces drm/amd/amdgpu: gfx9 tidy ups (v2) drm/amdgpu: add contiguous flag in ucode bo create drm/amdgpu: fix missed gpu info firmware when cache firmware during S3 drm/amdgpu: export test ib debugfs interface ...
| * drm/amdgpu/virt: change the place of virt_init_settingXiangliang Yu2017-05-24
| | | | | | | | | | | | | | | | | | Change place of virt_init_setting function so that can cover the cg and pg flags configuration. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: drop support for per ASIC read registersChristian König2017-05-24
| | | | | | | | | | | | | | | | Only per family registers are still used. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: drop support for untouched registersChristian König2017-05-24
| | | | | | | | | | | | | | | | | | I couldn't figure out what this was original good for, but we don't use it any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * Revert "drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solved"Alex Deucher2017-05-24
| | | | | | | | | | | | | | | | | | Re-enable GFX PG. It's working properly with MEC now that KIQ is enabled. Reviewed-by: Samuel Li <samuel.li@amd.com> This reverts commit e9ef19aa1bdeac380662a112f1d03a7c3477527f.
* | drm/amd: fix include notation and remove -Iinclude/drm flagMasahiro Yamada2017-05-16
|/ | | | | | | | | | Include <drm/*.h> instead of relative path from include/drm, then remove the -Iinclude/drm compiler flag. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1493009447-31524-4-git-send-email-yamada.masahiro@socionext.com
* drm/amdgpu: just disallow reading untouched registersChristian König2017-03-30
| | | | | | | | | | | | | | Not sure what the original intention was here, but returning a random piece of kernel memory to userspace because we didn't set the value at all is clearly not a good idea. This patch disallows reading the register and returns a proper error code instead. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use new flag to handle different firmware loading methodHuang Rui2017-03-29
| | | | | | | | | | | | This patch introduces a new flag named "amdgpu_firmware_load_type" to handle different firmware loading method. Since Vega10, there are three ways to load firmware. It would be better to use a flag and a fw_load_type kernel parameter to configure it. Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable gfx/system/vce clockgating on Polars12.Rex Zhu2017-03-29
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable GFX/UVD/VCE PG for BristolEric Huang2017-03-29
| | | | | | Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Samuel Li <Samuel.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vi: add missing error handling when setting uvd dclkAlex Deucher2017-03-29
| | | | | | | Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Reported-by: David Binderman <dcb314@hotmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vi: remove duplicate CG flagsAlex Deucher2017-03-29
| | | | | | | | | GFX_MGLS was added twice. Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Reported-by: David Binderman <dcb314@hotmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove unneeded conversions to boolAndrew F. Davis2017-03-29
| | | | | | | | Found with scripts/coccinelle/misc/boolconv.cocci. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add asic callback to get memsize registerAlex Deucher2017-03-29
| | | | | | | Newer asics use different registers so abstract it. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu:cg & pg shouldn't active on VF deviceMonk Liu2017-03-29
| | | | | | | | | | CG & PG function changes engine clock/gating, which is not appropriate for VF device, because one vf doesn't know the whole picture of engine's overall workload. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Disable GFX_PG on Carrizo until compute issues solvedTom St Denis2017-03-10
| | | | | | | | Currently compute jobs will stall if GFX_PG is enabled. Until this is resolved we'll disable GFX_PG. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: post card if there is real hw resetting performedJim Qu2017-02-17
| | | | | | | | | | | Check whether we need to post rather than whether the asic is posted. There are some cases (e.g., GPU reset or resume from hibernate) where we need to force post even if the asic has been posted. Signed-off-by: Jim Qu <Jim.Qu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vi: fix mailbox irq mistakeXiangliang Yu2017-01-27
| | | | | | | | | | For virt, freed mailbox irq should be handled in hw fini, not hw init. Correct it. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vi: add support virtualizationXiangliang Yu2017-01-27
| | | | | | | | | | Call VI virtualization functions if device is Vf. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/virt: use kiq to access registers (v2)Xiangliang Yu2017-01-27
| | | | | | | | | | | | For virtualization, it is must for driver to use KIQ to access registers when it is out of GPU full access mode. v2: agd: rebase Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Monk Liu <Monk.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: refine vce3.0 initialize.Rex Zhu2017-01-27
| | | | | | | | | | | 1. disable vce cg when vce hw initialize. 2. initizlize vce clock to 10KHz fo dgpu, so no need to set bypass clock to vce. Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40 Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add get clockgating_state method for vi commonHuang Rui2017-01-27
| | | | | | Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/vi: move virtualization detection forwardXiangliang Yu2017-01-27
| | | | | | | | | | | | | Move the detection forward into vi_set_ip_blocks function, then add ip blocks virtualization need if device is VF. V2: add ip blocks according to asic type. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/virt: rename fieldes of virtualization structureXiangliang Yu2017-01-27
| | | | | | | | Use acronym to rename fields to make easy to spell out. Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add drm light sleep support for ViRex Zhu2017-01-27
| | | | | | | | v2: fix copy error. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: move vi smu firmware declares to powerplay.Rex Zhu2017-01-27
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: add Polaris12 support (v3)Junwei Zhang2017-01-06
| | | | | | | | | | | | v2: agd: squash in various fixes v3: agd: squash in: drm/amdgpu: remove unnecessary smc sk firmware for polaris12 Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: refine set clock gating for tonga/polarisRex Zhu2016-12-15
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: initialize cg flags for tonga/polaris10/polaris11.Rex Zhu2016-12-15
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: enable AMD_PG_SUPPORT_CP in Carrizo/Stoney.Rex Zhu2016-12-15
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: disable uvd pg on Tonga.Rex Zhu2016-12-15
| | | | | | | | | | | it does not work with GPU pass through if the VM is not cleanly shutdown leading to a hang when the modules is reloaded. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: enable VCE clockgating in Polaris-10/11Maruthi Srinivas Bayyavarapu2016-12-06
| | | | | | | | VCE clocks are set to be disabled, when not in use. Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* Merge branch 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie2016-12-05
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-next - lots of code cleanup - lots of bug fixes - expose rpm based fan info via hwmon - lots of clock and powergating fixes - SI register header cleanup and conversion to common format used by newer asics * 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux: (54 commits) drm/amdgpu: drop is_display_hung from display funcs drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2) drm/amdgpu/uvd: consolidate code for fetching addr from ctx drm/amdgpu: Disable DPM in virtualization drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM PD/PTs (v2) drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2) drm/amdgpu: fix error handling in amdgpu_bo_create_restricted drm/amdgpu: fix amdgpu_fill_buffer (v2) drm/amdgpu: remove amdgpu_irq_get_delayed amdgpu: Wrap dev_err() calls on vm faults with printk_ratelimit() amdgpu: Use dev_err() over vanilla printk() in vm_decode_fault() drm/amd/amdgpu: port of DCE v6 to new headers (v3) drm/amdgpu: cleanup unused iterator members for sdma v2.4 drm/amdgpu: cleanup unused iterator members for sdma v3 drm/amdgpu:impl vgt_flush for VI(V5) drm/amdgpu: enable uvd mgcg for Fiji. drm/amdgpu: refine cz uvd clock gate logic. drm/amdgpu: change log level to KERN_INFO in ci_dpm.c drm/amdgpu: always un-gate UVD REGS path. drm/amdgpu/sdma: fix typo in packet setup ...
| * drm/amdgpu: enable uvd mgcg for Fiji.Rex Zhu2016-11-23
| | | | | | | | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| * drm/amdgpu: enable UVD clockgating in Polaris-10/11Maruthi Srinivas Bayyavarapu2016-11-11
| | | | | | | | | | | | | | | | | | UVD clocks are set to be disabled, when not in use. Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Tom StDenis <Tom.StDenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | Merge tag 'drm-qemu-20161121' of git://git.kraxel.org/linux into drm-nextDave Airlie2016-11-29
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | drm/virtio: fix busid in a different way, allocate more vbufs. drm/qxl: various bugfixes and cleanups, * tag 'drm-qemu-20161121' of git://git.kraxel.org/linux: (224 commits) drm/virtio: allocate some extra bufs qxl: Allow resolution which are not multiple of 8 qxl: Don't notify userspace when monitors config is unchanged qxl: Remove qxl_bo_init() return value qxl: Call qxl_gem_{init, fini} qxl: Add missing '\n' to qxl_io_log() call qxl: Remove unused prototype qxl: Mark some internal functions as static Revert "drm: virtio: reinstate drm_virtio_set_busid()" drm/virtio: fix busid regression drm: re-export drm_dev_set_unique Linux 4.9-rc5 gp8psk: Fix DVB frontend attach gp8psk: fix gp8psk_usb_in_op() logic dvb-usb: move data_mutex to struct dvb_usb_device iio: maxim_thermocouple: detect invalid storage size in read() aoe: fix crash in page count manipulation lightnvm: invalid offset calculation for lba_shift Kbuild: enable -Wmaybe-uninitialized warnings by default pcmcia: fix return value of soc_pcmcia_regulator_set ...
| * drm/amdgpu: add support for new smc firmware on icelandAlex Deucher2016-10-28
| | | | | | | | | | | | | | | | Newer iceland parts require new smc firmware. Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
| * drm/amdgpu: add support for new smc firmware on tongaAlex Deucher2016-10-28
| | | | | | | | | | | | | | | | | | Newer tonga parts require new smc firmware. Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* | Backmerge tag 'v4.9-rc4' into drm-nextDave Airlie2016-11-06
|\| | | | | | | | | | | Linux 4.9-rc4 This is needed for nouveau development.
| * drm/amdgpu: explicitly set pg_flags for STAlex Deucher2016-10-21
| | | | | | | | | | | | | | | | | | | | | | No need to retain previous settings as this is the first time we set pg_flags. Probably a copy/paste typo from the CZ code. Avoids confusion. No change in behavior as adev is kzallocated. Reviewed-by: Tom St Denis <tom.stdenis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: consolidate atom scratch reg handling for hangsAlex Deucher2016-10-25
| | | | | | | | | | | | | | Move from asic specific code to common atom code. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: rework IP block registration (v2)Alex Deucher2016-10-25
| | | | | | | | | | | | | | | | | | | | | | | | | | This makes it easier to replace specific IP blocks on asics for handling virtual_dce, DAL, etc. and for building IP lists for hw or tables. This also stored the status information in the same structure. v2: split out spelling fix into a separate patch add a function to add IPs to the list Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu: used cached gca values for vi_read_register (v2)Alex Deucher2016-10-25
| | | | | | | | | | | | | | | | | | | | | | Using the cached values has less latency for bare metal and SR-IOV, and prevents reading back bogus values if the engine is powergated. v2: fix typo in tile idx calculation Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amd/amdgpu: Enable UVD PG on TongaTom St Denis2016-10-25
| | | | | | | | | | | | | | | | Tested by reading tile/clk bits during load/idle. Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* | drm/amdgpu:use smc_index_11 for VIMonk Liu2016-10-25
|/ | | | | | | | | | for VI smc, index_0 to index_8 are all not safe, they may used by BIOS/FW, and index_11 is reserved only for driver. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: use powerplay module for dgpu in Vi.Rex Zhu2016-09-22
| | | | | | | | | | delete non-pp code and files. It was just a temporary solution and not support dynamic power management. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Acked-by: Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.2 (git 2.25.0) at 2025-07-26 08:50:07 -0400