diff options
author | Xiangliang Yu <Xiangliang.Yu@amd.com> | 2017-01-12 02:22:18 -0500 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-01-27 11:13:25 -0500 |
commit | 99581cc57387a1a25f44e338e46338c58138fedc (patch) | |
tree | e5b5ca838036c9ed1c66427f980bb4588db362e2 /drivers/gpu/drm/amd/amdgpu/vi.c | |
parent | 3149d9da12263b696d6123f90e44968ebde2115d (diff) |
drm/amdgpu/vi: add support virtualization
Call VI virtualization functions if device is Vf.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/vi.c')
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/vi.c | 34 |
1 files changed, 32 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c b/drivers/gpu/drm/amd/amdgpu/vi.c index abdb80b812a6..16202444040b 100644 --- a/drivers/gpu/drm/amd/amdgpu/vi.c +++ b/drivers/gpu/drm/amd/amdgpu/vi.c | |||
@@ -76,6 +76,7 @@ | |||
76 | #include "amdgpu_acp.h" | 76 | #include "amdgpu_acp.h" |
77 | #endif | 77 | #endif |
78 | #include "dce_virtual.h" | 78 | #include "dce_virtual.h" |
79 | #include "mxgpu_vi.h" | ||
79 | 80 | ||
80 | /* | 81 | /* |
81 | * Indirect registers accessor | 82 | * Indirect registers accessor |
@@ -272,6 +273,12 @@ static void vi_init_golden_registers(struct amdgpu_device *adev) | |||
272 | /* Some of the registers might be dependent on GRBM_GFX_INDEX */ | 273 | /* Some of the registers might be dependent on GRBM_GFX_INDEX */ |
273 | mutex_lock(&adev->grbm_idx_mutex); | 274 | mutex_lock(&adev->grbm_idx_mutex); |
274 | 275 | ||
276 | if (amdgpu_sriov_vf(adev)) { | ||
277 | xgpu_vi_init_golden_registers(adev); | ||
278 | mutex_unlock(&adev->grbm_idx_mutex); | ||
279 | return; | ||
280 | } | ||
281 | |||
275 | switch (adev->asic_type) { | 282 | switch (adev->asic_type) { |
276 | case CHIP_TOPAZ: | 283 | case CHIP_TOPAZ: |
277 | amdgpu_program_register_sequence(adev, | 284 | amdgpu_program_register_sequence(adev, |
@@ -921,8 +928,10 @@ static int vi_common_early_init(void *handle) | |||
921 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_SMC))) | 928 | (amdgpu_ip_block_mask & (1 << AMD_IP_BLOCK_TYPE_SMC))) |
922 | smc_enabled = true; | 929 | smc_enabled = true; |
923 | 930 | ||
924 | if (amdgpu_sriov_vf(adev)) | 931 | if (amdgpu_sriov_vf(adev)) { |
925 | amdgpu_virt_init_setting(adev); | 932 | amdgpu_virt_init_setting(adev); |
933 | xgpu_vi_mailbox_set_irq_funcs(adev); | ||
934 | } | ||
926 | 935 | ||
927 | adev->rev_id = vi_get_rev_id(adev); | 936 | adev->rev_id = vi_get_rev_id(adev); |
928 | adev->external_rev_id = 0xFF; | 937 | adev->external_rev_id = 0xFF; |
@@ -1088,8 +1097,23 @@ static int vi_common_early_init(void *handle) | |||
1088 | return 0; | 1097 | return 0; |
1089 | } | 1098 | } |
1090 | 1099 | ||
1100 | static int vi_common_late_init(void *handle) | ||
1101 | { | ||
1102 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
1103 | |||
1104 | if (amdgpu_sriov_vf(adev)) | ||
1105 | xgpu_vi_mailbox_get_irq(adev); | ||
1106 | |||
1107 | return 0; | ||
1108 | } | ||
1109 | |||
1091 | static int vi_common_sw_init(void *handle) | 1110 | static int vi_common_sw_init(void *handle) |
1092 | { | 1111 | { |
1112 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | ||
1113 | |||
1114 | if (amdgpu_sriov_vf(adev)) | ||
1115 | xgpu_vi_mailbox_add_irq_id(adev); | ||
1116 | |||
1093 | return 0; | 1117 | return 0; |
1094 | } | 1118 | } |
1095 | 1119 | ||
@@ -1111,6 +1135,9 @@ static int vi_common_hw_init(void *handle) | |||
1111 | /* enable the doorbell aperture */ | 1135 | /* enable the doorbell aperture */ |
1112 | vi_enable_doorbell_aperture(adev, true); | 1136 | vi_enable_doorbell_aperture(adev, true); |
1113 | 1137 | ||
1138 | if (amdgpu_sriov_vf(adev)) | ||
1139 | xgpu_vi_mailbox_put_irq(adev); | ||
1140 | |||
1114 | return 0; | 1141 | return 0; |
1115 | } | 1142 | } |
1116 | 1143 | ||
@@ -1431,7 +1458,7 @@ static void vi_common_get_clockgating_state(void *handle, u32 *flags) | |||
1431 | static const struct amd_ip_funcs vi_common_ip_funcs = { | 1458 | static const struct amd_ip_funcs vi_common_ip_funcs = { |
1432 | .name = "vi_common", | 1459 | .name = "vi_common", |
1433 | .early_init = vi_common_early_init, | 1460 | .early_init = vi_common_early_init, |
1434 | .late_init = NULL, | 1461 | .late_init = vi_common_late_init, |
1435 | .sw_init = vi_common_sw_init, | 1462 | .sw_init = vi_common_sw_init, |
1436 | .sw_fini = vi_common_sw_fini, | 1463 | .sw_fini = vi_common_sw_fini, |
1437 | .hw_init = vi_common_hw_init, | 1464 | .hw_init = vi_common_hw_init, |
@@ -1460,6 +1487,9 @@ int vi_set_ip_blocks(struct amdgpu_device *adev) | |||
1460 | /* in early init stage, vbios code won't work */ | 1487 | /* in early init stage, vbios code won't work */ |
1461 | vi_detect_hw_virtualization(adev); | 1488 | vi_detect_hw_virtualization(adev); |
1462 | 1489 | ||
1490 | if (amdgpu_sriov_vf(adev)) | ||
1491 | adev->virt.ops = &xgpu_vi_virt_ops; | ||
1492 | |||
1463 | switch (adev->asic_type) { | 1493 | switch (adev->asic_type) { |
1464 | case CHIP_TOPAZ: | 1494 | case CHIP_TOPAZ: |
1465 | /* topaz has no DCE, UVD, VCE */ | 1495 | /* topaz has no DCE, UVD, VCE */ |