Commit message (Collapse) | Author | Age | |
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* | clk: zx: reform pll config info to ease code extension | Jun Nie | 2016-09-14 |
| | | | | | | | | Add power down bit and pll lock bit in pll config structure to ease new SoC support. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> | ||
* | clk: zx: Add audio div clock method for zx296702 | Jun Nie | 2015-07-28 |
Add SPDIF/I2S divider clock method for zx296702 Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |