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path: root/drivers/clk/tegra/clk-tegra30.c
Commit message (Expand)AuthorAge
* clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20Dmitry Osipenko2018-05-18
* clk: tegra: Specify VDE clock rateDmitry Osipenko2018-03-12
* clk: tegra: Mark HCLK, SCLK and EMC as criticalDmitry Osipenko2018-03-12
* clk: tegra: Fix cclk_lp divisor registerMichał Mirosław2017-11-01
* clk: tegra: Add AHB DMA clock entryDmitry Osipenko2017-11-01
* clk: tegra: Make tegra_clk_pll_params __ro_after_initBhumika Goyal2017-10-19
* clk: tegra: Use tegra_clk_register_periph_data()Thierry Reding2017-10-19
* clk: tegra: Add CEC clockPeter De Schrijver2017-03-20
* clk: tegra: Initialize UTMI PLL when enabling PLLUAndrew Bresticker2016-06-30
* clk: tegra: Fix PLL_U post divider and initial rate on Tegra30Lucas Stach2016-04-28
* clk: tegra: Initialize PLL_C to sane rate on Tegra30Lucas Stach2016-04-28
* clk: tegra: pll: Update PLLM handlingDanny Huang2015-11-20
* clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rateRhyland Klein2015-11-20
* clk: tegra: pll: Don't unconditionally set LOCK flagsRhyland Klein2015-11-20
* clk: tegra: Constify pdiv-to-hw mappingsThierry Reding2015-11-20
* clk: tegra: Format tables consistentlyThierry Reding2015-11-18
* clk: tegra: Miscellaneous coding style cleanupsThierry Reding2015-11-18
* clk: tegra: Fix 26 MHz oscillator frequencyThierry Reding2015-11-18
* clk: tegra: Modify tegra_audio_clk_init to accept more pllsRhyland Klein2015-10-20
* clk: tegra: Properly include clk.hStephen Boyd2015-07-20
* clk: tegra: Fix hda2codec_2x clock name for Tegra30Marcel Ziswiler2015-05-13
* clk: tegra: Model oscillator as clockThierry Reding2015-04-10
* clk: tegra: Use consistent indentationThierry Reding2015-04-10
* clk: tegra: Implement memory-controller clockThierry Reding2014-11-26
* ARM: tegra: Convert PMC to a driverThierry Reding2014-07-17
* ARM: tegra: Move includes to include/soc/tegraThierry Reding2014-07-17
* clk: tegra: remove bogus PCIE_XCLKStephen Warren2013-12-11
* clk: tegra: implement a reset driverStephen Warren2013-12-11
* clk: tegra: add FUSE clock deviceAlexandre Courbot2013-11-26
* clk: tegra: Properly setup PWM clock on Tegra30Thierry Reding2013-11-26
* clk: tegra: Initialize secondary gr3d clock on Tegra30Thierry Reding2013-11-26
* clk: tegra: move tegra30 to common infraPeter De Schrijver2013-11-26
* clk: tegra: move periph clocks to common filePeter De Schrijver2013-11-26
* clk: tegra: move fields to tegra_clk_pll_paramsPeter De Schrijver2013-11-26
* clk: tegra: common periph_clk_enb_refcnt and clksPeter De Schrijver2013-11-26
* clk: tegra: simplify periph clock dataPeter De Schrijver2013-11-26
* clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clksPeter De Schrijver2013-11-26
* clk: tegra30: Don't wait for PLL_U lock bitTuomas Tynkkynen2013-08-28
* clk: add CLK_SET_RATE_NO_REPARENT flagJames Hogan2013-08-19
* clk: tegra30: Fix incorrect placement of __initdataSachin Kamat2013-08-08
* Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds2013-07-03
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| * clk: tegra: override bits for Tegra30 PLLMPeter De Schrijver2013-06-11
| * clk: tegra: Use common of_clk_init functionPrashant Gaikwad2013-05-31
| * clk: tegra: fix clk_out parents listPrashant Gaikwad2013-05-31
* | ARM: tegra30: clocks: Fix pciex clock registrationJay Agarwal2013-06-16
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* Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds2013-05-04
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| * clk: tegra: Add flags to tegra_clk_periph()Peter De Schrijver2013-04-04
| * clk: tegra: move from a lock bit idx to a lock maskPeter De Schrijver2013-04-04
| * clk: tegra: Add PLL post divider tablePeter De Schrijver2013-04-04
| * clk: tegra: Refactor PLL programming codePeter De Schrijver2013-04-04
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