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path: root/drivers/clk/tegra/clk-pll.c
Commit message (Expand)AuthorAge
* clk: tegra: Return the exact clock rate from clk_round_rateRobert Yang2018-12-14
* clk: tegra: Fix pll_u rate configurationMarcel Ziswiler2018-03-12
* clk: tegra: Fix T210 PLLRE registrationAlex Frid2017-08-23
* clk: tegra: Update T210 PLLSS (D2/DP) registrationAlex Frid2017-08-23
* clk: tegra: Re-factor T210 PLLX registrationAlex Frid2017-08-23
* clk: tegra: change post IDDQ release delay to 5usPeter De Schrijver2017-08-23
* clk: tegra: Init cfg structure in _get_pll_mnpPeter De Schrijver2017-08-23
* clk: tegra: Enable PLL_SS for Tegra210Peter De Schrijver2017-08-23
* clk: tegra: fix SS control on PLL enable/disablePeter De Schrijver2017-08-23
* clk: tegra: Rework pll_uPeter De Schrijver2017-03-20
* clk: tegra: Initialize UTMI PLL when enabling PLLUAndrew Bresticker2016-06-30
* clk: tegra: Fix pllre Tegra210 and add pll_re_out1Rhyland Klein2016-04-28
* clk: tegra: Fix PLLE SS coefficientsMark Kuo2016-02-02
* clk: tegra: Fix typos around clearing PLLE bits during enableRhyland Klein2016-02-02
* clk: tegra: Do not disable PLLE when under hardware controlMark Kuo2016-02-02
* clk: tegra: pll: Fix potential sleeping-while-atomicAndrew Bresticker2016-02-02
* clk: tegra: Read correct IDDQ register in PLL_SS registrationBill Huang2015-12-17
* clk: tegra: Fix WARN_ON in PLL_RE registrationBill Huang2015-12-17
* clk: tegra: pll: Fix issues with rates for VCO PLLsAndrew Bresticker2015-12-17
* clk: tegra: Add support for Tegra210 clocksRhyland Klein2015-12-17
* clk: tegra: pll: Add logic for SSBill Huang2015-12-17
* clk: tegra: pll: Add dyn_ramp callbackRhyland Klein2015-12-17
* clk: tegra: pll: Add Set_default logicBill Huang2015-12-17
* clk: tegra: pll: Adjust vco_min if SDM presentBill Huang2015-12-17
* clk: tegra: pll: Add support for PLLMB for Tegra210Rhyland Klein2015-12-17
* clk: tegra: pll: Add specialized logic for Tegra210Rhyland Klein2015-12-17
* clk: tegra: pll: Update PLLM handlingDanny Huang2015-11-20
* clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rateRhyland Klein2015-11-20
* clk: tegra: pll: Add code to handle if resets are supported by PLLBill Huang2015-11-20
* clk: tegra: pll: Add logic for out-of-table rates for T210Rhyland Klein2015-11-20
* clk: tegra: pll: Add logic for handling SDM dataRhyland Klein2015-11-20
* clk: tegra: pll: Don't unconditionally set LOCK flagsRhyland Klein2015-11-20
* clk: tegra: pll: Update warning messageRhyland Klein2015-11-20
* clk: tegra: pll: Simplify clk_enable_pathRhyland Klein2015-11-20
* clk: tegra: pll: Add tegra_pll_wait_for_lock to clk headerRhyland Klein2015-11-20
* clk: tegra: Constify pdiv-to-hw mappingsThierry Reding2015-11-20
* clk: tegra: Miscellaneous coding style cleanupsThierry Reding2015-11-18
* clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)Stephen Boyd2015-08-24
* clk: tegra: Convert to clk_hw based provider APIsStephen Boyd2015-08-24
* clk: tegra: Properly include clk.hStephen Boyd2015-07-20
* clk: tegra: Remove needless initializationsThierry Reding2015-04-10
* clk: tegra: Various whitespace cleanupsThierry Reding2015-04-10
* clk: tegra: Add support for the Tegra132 CAR IP blockPaul Walmsley2015-02-02
* clk: tegra: Fix order of arguments in WARNTomeu Vizoso2015-02-02
* clk: tegra: Use XUSB-compatible SATA PLL sequenceMikko Perttunen2014-07-08
* clk: tegra: Enable hardware control of SATA PLLMikko Perttunen2014-06-25
* Merge branch 'clk-fixes' into clk-nextMike Turquette2014-05-28
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| * Merge tag 'clk-tegra-fixes-3.15' of git://nv-tegra.nvidia.com/user/pdeschrijv...Mike Turquette2014-05-28
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| | * clk: tegra: Fix enabling of PLLEThierry Reding2014-04-17
| | * clk: tegra: Introduce divider mask and shift helpersThierry Reding2014-04-17
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