Commit message (Expand) | Author | Age | |
---|---|---|---|
* | clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC | Takeshi Kihara | 2019-04-02 |
* | clk: renesas: rcar-gen3: Correct parent clock of SYS-DMAC | Takeshi Kihara | 2019-04-02 |
* | clk: renesas: rcar-gen3: Correct parent clock of HS-USB | Kazuya Mizuguchi | 2019-04-02 |
* | clk: renesas: rcar-gen3: Correct parent clock of EHCI/OHCI | Kazuya Mizuguchi | 2019-04-02 |
* | clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2 | Simon Horman | 2019-04-02 |
* | clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset | Simon Horman | 2019-04-02 |
* | clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor | Takeshi Kihara | 2019-04-02 |
* | clk: renesas: r8a774a1: Fix LAST_DT_CORE_CLK | Fabrizio Castro | 2019-02-25 |
* | clk: renesas: r8a774a1: Add missing CANFD clock | Fabrizio Castro | 2019-01-21 |
* | clk: renesas: r8a774a1: Add CPEX clock | Geert Uytterhoeven | 2018-12-04 |
* | clk: renesas: cpg-mssr: Add r8a774a1 support | Biju Das | 2018-08-27 |