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path: root/drivers/clk/ingenic
Commit message (Expand)AuthorAge
* clk: Add Ingenic jz4725b CGU driverPaul Cercueil2018-10-16
* clk: ingenic: Add proper Kconfig entriesPaul Cercueil2018-10-16
* clk: ingenic: Add missing flag for UDC clockPaul Cercueil2018-07-06
* clk: ingenic: Fix incorrect data for the i2s clockPaul Cercueil2018-07-06
* docs: Fix some broken referencesMauro Carvalho Chehab2018-06-15
* clk: ingenic: jz4770: Add 150us delay after enabling VPU clockPaul Cercueil2018-06-02
* clk: ingenic: jz4770: Enable power of AHB1 bus after ungating VPU clockPaul Cercueil2018-06-02
* clk: ingenic: jz4770: Modify C1CLK clock to disable CPU clock stop on idlePaul Cercueil2018-06-02
* clk: ingenic: jz4770: Change OTG from custom to standard gated clockPaul Cercueil2018-06-02
* clk: ingenic: Support specifying "wait for clock stable" delayPaul Cercueil2018-06-02
* clk: ingenic: Add support for clocks whose gate bit is invertedPaul Cercueil2018-06-02
* clk: Add Ingenic jz4770 CGU driverPaul Cercueil2018-01-18
* clk: ingenic: Add code to enable/disable PLLsPaul Cercueil2018-01-18
* clk: ingenic: support PLLs with no bypass bitPaul Cercueil2018-01-18
* clk: ingenic: Fix recalc_rate for clocks with fixed dividerPaul Cercueil2018-01-18
* clk: ingenic: Use const pointer to clk_ops in structPaul Cercueil2018-01-18
* Update MIPS email addressesPaul Burton2017-11-03
* clk: ingenic: Allow divider value to be dividedHarvey Hunt2016-05-12
* clk: ingenic: Include clk.hStephen Boyd2015-07-20
* clk: ingenic: add JZ4780 CGU supportPaul Burton2015-06-21
* MIPS, clk: move jz4740 clock suspend, resume functions to jz4740-cguPaul Burton2015-06-21
* MIPS, clk: move jz4740 UDC auto suspend functions to jz4740-cguPaul Burton2015-06-21
* MIPS,clk: move jz4740_clock_set_wait_mode to jz4740-cguPaul Burton2015-06-21
* MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton2015-06-21
* clk: ingenic: add driver for Ingenic SoC CGU clocksPaul Burton2015-06-21