| Commit message (Collapse) | Author | Age |
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mtd_to_nand() was recently introduced to avoid direct accesses to the
mtd->priv field. Update all blackfin specific implementations to use
this helper.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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Signed-off-by: Steven Miao <realmz6@gmail.com>
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using IS_ENABLED() macro instead of defined(CONFIG_XXX) || defined(CONFIG_XXX_MODULE)
Signed-off-by: Steven Miao <realmz6@gmail.com>
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Use the default partition parser, cmdlinepart, provided by the plat_nand driver.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Macro name for spi controller driver has been modified, so update default
board file accordingly.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
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The serial TX IRQ is not simply (RX IRQ + 1) on some Blackfin chips,
so move the values to the platform resources.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
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The default for the Blackfin SPI driver is 8 bits and dma disabled,
so many of the bfin5xx_spi_chip resources are redundant. So punt
those parts.
Further, drivers should themselves be declaring 16 bit transfers,
so for those that do, and for the ones which no longer do 16 bit
transfers, drop the bfin5xx_spi_chip resources.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Convert to mtd_device_register() and remove the CONFIG_MTD_PARTITIONS
preprocessor conditionals as partitioning is always available.
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The NAND platform driver expects the registers to have a "mem"
resource type rather than "io".
Signed-off-by: Valentin Yakovenkov <yakovenkov@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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These two platforms didn't properly fill nr_chips in gen_nand
registration and therefore depended on gen_nand bug fixed by by commit
81cbb0b17796d81cbd92defe113cf2a7c7a21fbb ("mtd: gen_nand: fix support for
multiple chips")
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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The timeout value is in jiffies, so it should be using HZ, not a plain
number. As '10000' is ambiguous, 1HZ is used as conservative default.
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Valentin Yakovenkov <yakovenkov@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Valentin Yakovenkov <yakovenkov@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Valentin Yakovenkov <yakovenkov@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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