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* ARM: dts: sk-rzg1e: initial device treeSergei Shtylyov2016-11-23
| | | | | | | | | | | | | Add the initial device tree for the R8A7745 SoC based SK-RZG1E board. The board has 1 debug serial port (SCIF2); include support for it, so that the serial console can work. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7745: add IRQC supportSergei Shtylyov2016-11-23
| | | | | | | | | | | Describe the IRQC interrupt controller in the R8A7745 device tree. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7745: add Ether supportSergei Shtylyov2016-11-23
| | | | | | | | | | | Define the generic R8A7745 part of the Ether device node. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7745: add [H]SCIF{|A|B} supportSergei Shtylyov2016-11-23
| | | | | | | | | | | | Describe [H]SCIF{|A|B} ports in the R8A7745 device tree. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: consistently use tabs for indentation] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7745: add SYS-DMAC supportSergei Shtylyov2016-11-23
| | | | | | | | | | | Describe SYS-DMAC0/1 in the R8A7745 device tree. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7745: initial SoC device treeSergei Shtylyov2016-11-23
| | | | | | | | | | | | The initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST, CPG, and the required clock descriptions. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: sk-rzg1m: add Ether supportSergei Shtylyov2016-11-23
| | | | | | | | | | | | Define the SK-RZG1M board dependent part of the Ether device node. Enable DHCP and NFS root for the kernel booting. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: sk-rzg1m: initial device treeSergei Shtylyov2016-11-23
| | | | | | | | | | | | | Add the initial device tree for the R8A7743 SoC based SK-RZG1M board. The board has one debug serial port (SCIF0); include support for it, so that the serial console can work. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7743: add IRQC supportSergei Shtylyov2016-11-23
| | | | | | | | Describe the IRQC interrupt controller in the R8A7743 device tree. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7743: add Ether supportSergei Shtylyov2016-11-23
| | | | | | | | | | | Define the generic R8A7743 part of the Ether device node. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7743: add [H]SCIF{A|B} supportSergei Shtylyov2016-11-23
| | | | | | | | | | | | Describe [H]SCIF{|A|B} ports in the R8A7743 device tree. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> [simon: consistently use tabs for indentation] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7743: add SYS-DMAC supportSergei Shtylyov2016-11-23
| | | | | | | | | | | Describe SYS-DMAC0/1 in the R8A7743 device tree. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7743: initial SoC device treeSergei Shtylyov2016-11-23
| | | | | | | | | | | | The initial R8A7743 SoC device tree including CPU0, GIC, timer, SYSC, RST, CPG, and the required clock descriptions. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: alt: Enable UHS-I SDR-104Simon Horman2016-11-23
| | | | | | | And the sd-uhs-sdr104 property to SDHI0. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* ARM: dts: koelsch: Enable UHS-I SDR-104Simon Horman2016-11-23
| | | | | | | And the sd-uhs-sdr104 property to SDHI0. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* ARM: dts: lager: Enable UHS-I SDR-104Simon Horman2016-11-23
| | | | | | | | Add the sd-uhs-sdr104 property to SDHI0. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* ARM: dts: alt: use demuxer for I2C4Simon Horman2016-11-23
| | | | | | | | | | | Make it possible to fallback to GPIO for I2C4 on the EXIO-B connector. This is based on reference work for the I2C0 core of the lager/r8a7790 by Wolfram Sang. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> [wsa: rebased and fixed aliases] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* ARM: dts: koelsch: use demuxer for I2C1Simon Horman2016-11-23
| | | | | | | | | | | Make it possible to fallback to GPIO for I2C1 on the EXIO-C connector. This is based on reference work for the I2C0 core of the lager/r8a7790 by Wolfram Sang. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> [wsa: rebased and fixed aliases] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* ARM: dts: lager: use demuxer for IIC1/I2C1Simon Horman2016-11-23
| | | | | | | | | | | | Make it possible to select which I2C1 IP core you want to run on the EXIO-A connector. This is based on reference work for the I2C0 core of the lager board by Wolfram Sang. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> [wsa: rebased and fixed aliases] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* ARM: dts: lager: rename and reindex i2cexioSimon Horman2016-11-23
| | | | | | | | | | | | | | | The rename from i2cexio to i2cexio0 is in preparation for adding i2cexio1 which will use the demuxer for IIC1/I2C1. The reindexing from i2c8 to i2c10 is to allow space for grouping of additional GPIO buses to be added by follow-up patches to support demuxing of other i2c buses. Also note that fallback to GPIO is not provided by the hardware for IIC0/I2C0. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> [wsa: rebased, fixed alias and removed typo in commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
* ARM: dts: r8a7794: Use SYSC "always-on" PM Domain for soundGeert Uytterhoeven2016-11-23
| | | | | | | | | | | | Hook up the Audio-DMAC and sound device nodes to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Cfr. commit 0761ff2ad0c581f3 ("ARM: dts: r8a7794: Add SYSC PM Domains"). Fixes: 320d6c5a08a4abd3 ("ARM: dts: r8a7794: add sound support") Fixes: 298e4ee3d213a076 ("ARM: dts: r8a7794: add Audio-DMAC support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: r8a7794: Correct hsusb parent clockGeert Uytterhoeven2016-11-23
| | | | | | | | | The parent clock of the HSUSB clock is the HP clock, not the MP clock. Fixes: c7bab9f929e51761 ("ARM: shmobile: r8a7794: Add USB clocks to device tree") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* ARM: dts: alt: Fix PFC names for DUJacopo Mondi2016-11-23
| | | | | | | | | | | | | | | | | | | | | | Update the PFC pin groups and function names of DU interface for r8a7794 ALT board. The currently specified pin groups and function names prevented PFC and DU interfaces from being correctly configured: sh-pfc e6060000.pin-controller: function 'du' not supported sh-pfc e6060000.pin-controller: invalid function du in map table sh-pfc e6060000.pin-controller: function 'du' not supported sh-pfc e6060000.pin-controller: invalid function du in map table sh-pfc e6060000.pin-controller: function 'du' not supported sh-pfc e6060000.pin-controller: invalid function du in map table sh-pfc e6060000.pin-controller: function 'du' not supported sh-pfc e6060000.pin-controller: invalid function du in map table rcar-du: probe of feb00000.display failed with error -22 Signed-off-by: Jacopo Mondi <jacopo@jmondi.org> Acked-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
*---. Merge tag 'rzg-clock-defs-tag1'; commit '538321bd9718'; commit ↵Simon Horman2016-11-23
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | '97ca8402997c' into dt-for-v4.10 Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions Shared by clock drivers, and DTS files.
| | | * ARM: shmobile: r8a7745: add power domain index macrosSergei Shtylyov2016-11-23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add macros usable by the device tree sources to reference R8A7745 SYSC power domains by index. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| | * | ARM: shmobile: r8a7743: add power domain index macrosSergei Shtylyov2016-10-17
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add macros usable by the device tree sources to reference R8A7743 SYSC power domains by index. Based on the original (and large) patch by Dmitry Shifrin <dmitry.shifrin@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| * | clk: renesas: Add r8a7745 CPG Core Clock DefinitionsSergei Shtylyov2016-11-07
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add macros usable by the device tree sources to reference the R8A7745 CPG clocks by index. The data comes from Table 7.2c in revision 1.00 of the RZ/G Series User's Manual. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| * | clk: renesas: Add r8a7743 CPG Core Clock DefinitionsSergei Shtylyov2016-11-07
| |/ | | | | | | | | | | | | | | | | Add macros usable by the device tree sources to reference the R8A7743 CPG clocks by index. The data comes from Table 7.2b in revision 1.00 of the RZ/G Series User's Manual. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
* | ARM: dts: r8a7794: remove Z clockSergei Shtylyov2016-11-04
| | | | | | | | | | | | | | | | | | R8A7794 doesn't have Cortex-A15 CPUs, thus there's no Z clock... Fixes: 0dce5454d5c2 ("ARM: shmobile: Initial r8a7794 SoC device tree") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7779: marzen: Configure pinmuxing for the DU0 input clockLaurent Pinchart2016-11-04
| | | | | | | | | | | | | | | | DU0 uses an externally provided clock, but the corresponding pin isn't correctly muxed. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: sh73a0: Remove skeleton.dtsi inclusionGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7740: Remove skeleton.dtsi inclusionGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7779: Remove skeleton.dtsi inclusionGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7778: Remove skeleton.dtsi inclusionGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: emev2: Remove skeleton.dtsi inclusionGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 9c0da3cc61f1233c ("ARM: dts: explicitly mark skeleton.dtsi as deprecated"), including skeleton.dtsi is deprecated. This fixes the following warning with W=1: Warning (unit_address_vs_reg): Node /memory has a reg or ranges property, but no unit name Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7779: Fix DU reg propertyLaurent Pinchart2016-11-04
| | | | | | | | | | | | | | | | | | The system uses one address cell and one size cell, not two. Fix the DU DT node. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7793: Enable VIN0-VIN2Ulrich Hecht2016-11-04
| | | | | | | | | | | | | | Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: koelsch: add HDMI inputHans Verkuil2016-11-04
| | | | | | | | | | | | | | | | | | | | Add support in the dts for the HDMI input. Based on the Lager dts patch from Ulrich Hecht. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> [uli: removed "renesas," prefixes from pfc nodes] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: lager: Add entries for VIN HDMI input supportWilliam Towle2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add DT entries for vin0, vin0_pins, and adv7612. Sets the 'default-input' property for ADV7612, enabling image and video capture without the need to have userspace specifying routing. Signed-off-by: William Towle <william.towle@codethink.co.uk> Signed-off-by: Rob Taylor <rob.taylor@codethink.co.uk> [uli: added interrupt, renamed endpoint, merged default-input] Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: rskrza1: add sdhi1 DT supportChris Brandt2016-11-04
| | | | | | | | | | | | Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r7s72100: add sdhi to device treeChris Brandt2016-11-04
| | | | | | | | | | Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7794: Fix W=1 dtc warningsGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,mix/mix@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ctu/ctu@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: gose: use generic pinctrl properties in SDHI nodesSimon Horman2016-11-04
| | | | | | | | | | | | | | | | Since 16ccaf5bb5a5 ("pinctrl: sh-pfc: Accept standard function, pins and groups properties") renesas pfc drivers accept generic "function", "pins" and "groups" properties. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r7s72100: add sdhi clock to device treeChris Brandt2016-11-04
| | | | | | | | | | | | Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r7s72100: add mmcif to device treeChris Brandt2016-11-04
| | | | | | | | | | Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7792: add MSIOF supportSergei Shtylyov2016-11-04
| | | | | | | | | | | | | | | | | | | | | | Define the generic R8A7792 parts of the MSIOF0/1 device nodes. Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7792: add MSIOF clocksSergei Shtylyov2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | Describe the MSIOF0/1 clocks and their parent, MP clock in the R8A7792 device tree. Based on the original (and large) patch by Vladimir Barinov <vladimir.barinov@cogentembedded.com>. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: wheat: add DU supportSergei Shtylyov2016-11-04
| | | | | | | | | | | | | | | | | | | | Define the Wheat board dependent part of the DU device node. Add the device nodes for the Analog Devices ADV7513 HDMI transmitters connected to DU0/1. Add the necessary subnodes to interconnect DU with HDMI transmitters/connectors. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7794: Correct SCIFB reg properties to cover all registersGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | Several SCIFB registers reside outside the reported register ranges. Fortunately this works (on Linux), due to the PAGE_SIZE granularity of ioremap(). Extend the sizes from 64 to 0x100 bytes to fix this, like is done on SH/R-Mobile SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* | ARM: dts: r8a7793: Correct SCIFB reg properties to cover all registersGeert Uytterhoeven2016-11-04
| | | | | | | | | | | | | | | | | | | | | | | | Several SCIFB registers reside outside the reported register ranges. Fortunately this works (on Linux), due to the PAGE_SIZE granularity of ioremap(). Extend the sizes from 64 to 0x100 bytes to fix this, like is done on SH/R-Mobile SoCs. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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