ARM: dts: r8a7743: add IRQC support

Describe the IRQC interrupt controller in the R8A7743 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

1 files changed, 19 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi
index 87563a5379b5..216cb1f37f87 100644
--- a/arch/arm/boot/dts/r8a7743.dtsi
+++ b/arch/arm/boot/dts/r8a7743.dtsi
@@ -62,6 +62,25 @@
                                                  IRQ_TYPE_LEVEL_HIGH)>;
                 };
 
+                irqc: interrupt-controller@e61c0000 {
+                        compatible = "renesas,irqc-r8a7743", "renesas,irqc";
+                        #interrupt-cells = <2>;
+                        interrupt-controller;
+                        reg = <0 0xe61c0000 0 0x200>;
+                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&cpg CPG_MOD 407>;
+                        power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
+                };
+
                 timer {
                         compatible = "arm,armv7-timer";
                         interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |