| Commit message (Collapse) | Author | Age |
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into next/dt
Pull "ASPEED device tree updates for 4.16" from Joel Stanley:
Clock driver support:
Rework all platforms to use proper clock bindings. Linux should now boot
upstream kernels on ast2400 and ast2500 platforms without out of tree
patches.
New systems:
Witherspoon: OpenPower Power9 server manufactured by IBM that uses the ASPEED ast2500
Zaius: OpenPower Power9 server manufactured by Invatech that uses the ASPEED ast2500
Q71L: Intel Xeon server manufactured by Qanta that uses the ASPEED ast2400
We also see updates to the Palmetto and Romulus systems to bring them in
line with the functionality of those above.
The systems take advantage of recently added drivers for LPC Snoop
device and the PWM/Tachometer fan controller.
OpenBMC flash layout:
The flash layout used OpenBMC systems is added and the device trees now
use it.
* tag 'aspeed-4.16-devicetree' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed-evb: Add unit name to memory node
ARM: dts: aspeed-plametto: Add flash layout and fix memory node
ARM: dts: aspeed-romulus: Update Romulus system
ARM: dts: aspeed: Add Qanta Q71L BMC machine
ARM: dts: aspeed: Add Ingrasys Zaius BMC machine
ARM: dts: aspeed: Add Witherspoon BMC machine
ARM: dts: aspeed: Sort ASPEED entries in makefile
ARM: dts: Add OpenBMC flash layout
ARM: dts: aspeed: Update license headers
ARM: dts: aspeed: Remove skeleton.dtsi
ARM: dts: aspeed: Add LPC Snoop device
ARM: dts: aspeed: Add PWM and tachometer node
ARM: dts: aspeed: Add clock phandle to GPIO
ARM: dts: aspeed: Add flash controller clocks
ARM: dts: aspeed: Add watchdog clocks
ARM: dts: aspeed: Add MAC clocks
ARM: dts: aspeed: Add proper clock references
ARM: dts: aspeed: Add LPC and child devices
dt-bindings: gpio: Add ASPEED constants
dt-bindings: clock: Add ASPEED constants
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Fixes a warning when building with W=1.
All of the ASPEED device trees build without warnings now.
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The OpenBMC flash layout is used by Palmetto systems.
Add the unit name to the memory node to fix a warning with W=1.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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- Fix incorrect RAM size
- Remove alias; these are now specified in the dtsi
- Add newly upstreamed devices
- Include OpenBMC flash layout
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The Qanta Q71L BMC is an ASPEED ast2400 based BMC that is part of a
Qanta x86 server.
This adds the device tree description for most upstream components. It
is a squashed commit from the OpenBMC kernel tree.
Signed-off-by: Peter Hanson <peterh@google.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Rick Altherr <raltherr@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Zaius is a POWER9 platform announced at OpenPOWER Summit 2016. This adds
basic DTS support for its AST2500 BMC.
This adds the device tree description for most upstream components. It
is a squashed commit of all of the patches from the OpenBMC kernel tree.
Signed-off-by: Xo Wang <xow@google.com>
Signed-off-by: Patrick Venture <venture@google.com>
Signed-off-by: Robert Lippert <rlippert@google.com>
Signed-off-by: Peter Hanson <peterh@google.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Rick Altherr <raltherr@google.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The Witherspoon BMC is an ASPEED ast2500 based BMC that is part of an
OpenPower Power9 server.
This adds the device tree description for most upstream components. It
is a squashed commit from the OpenBMC kernel tree.
Signed-off-by: Brandon Wyman <bjwyman@gmail.com>
Signed-off-by: Matt Spinler <spinler@us.ibm.com>
Signed-off-by: Brad Bishop <bradleyb@fuzziesquirrel.com>
Signed-off-by: Edward A. James <eajames@us.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Brandon Wyman <bjwyman@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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In preperation for adding more boards.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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This is a layout used by OpenBMC systems. It describes the fixed flash
layout of a 32MB mtd device.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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In b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier
to files with no license") these files had the GPL-2.0 licence added
automatically. Update them to be GPL 2.0+ in line with other IBM kernel
contributions.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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We don't require it for any of the ASPEED systems.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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LPC snoop hardware on the ASPEED BMC, used for monitoring
host I/O port activity.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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The PWM/tach unit has a clock and reset phandle. It needs both in order
to function correctly.
Signed-off-by: Joel Stanley <joel@jms.id.au>
--
v3:
Add the pwm reset phandle
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This enables a feature where the driver can debounce inputs.
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Signed-off-by: Joel Stanley <joel@jms.id.au>
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This device tree will break existing kernels that do not have the clk
patches applied (no clocksource, as we don't know the speed of the APB
clock. You can boot if you pass a lpj value on the command line, but
won't have a uart).
Older device trees running with the newer kernel will function as well
as pre-4.16 kernels. That is, that some IP blocks (i2c, pwm/tach, adc)
will not work as the kernel lacks reset controller and clock enabling.
This is being changed as existing device trees use fixed-clocks in order
to boot without a clk driver. The newly added clk driver provides proper
clock support, including gating, so we move the device trees over to
properly request clocks.
The SCU compatible string is updated as the g4-scu string made it into
the tree before we decided on aspeed,astX000-<ip> as the format for the
strings. The old string will be removed from the bindings in a future
patch.
Signed-off-by: Joel Stanley <joel@jms.id.au>
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Ensure the ordering is correct and add all of the children in the SoC
device trees for the ast2400 and ast2500.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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These are used to by the device tree to map pin numbers to constants
required by the GPIO bindings.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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These will be used by the clock driver and device trees.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joel Stanley <joel@jms.id.au>
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
Pull "Amlogic 64-bit DT updates for v4.16, round 2" from Kevin Hilman:
This adds a few more basics (clock, pinctrl, PWM, reset) for the new AXG
family of Amlogic SoCs.
* tag 'amlogic-dt64-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
arm64: dts: meson-axg: add new reset DT node
ARM64: dts: meson-axg: add PWM DT info for Meson-Axg SoC
ARM64: dts: meson-axg: add pinctrl DT info for Meson-AXG SoC
documentation: Add compatibles for Amlogic Meson AXG pin controllers
arm64: dts: meson-axg: add clock DT info for Meson AXG SoC
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Add reset DT node for Amlogic's Meson-AXG SoC.
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
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Add PWM DT info for the Amlogic's Meson-Axg SoC.
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Add new pinctrl DT info for the Amlogic's Meson-AXG SoC.
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
[khilman: dropped unnecessary include]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Add compatibles for Amlogic Meson AXG pin controllers
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Rob Herring <robh at kernel.org>
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm Device Tree Changes for v4.16" from Andy Gross:
* Add uSD slot nodes on msm8974-FP2 board
* tag 'qcom-dts-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
ARM: dts: msm8974-FP2: Add uSD slot nodes
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Add and enable the sdhci2 slot and the pinctrl configuration.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm ARM64 Updates for v4.16" from Andy Gross:
* Assorted cleanups for msm8916
* Fix IPC references for smsm
* tag 'qcom-arm64-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: qcom: msm8916-pins: keep cdc_dmic pins in suspend mode
arm64: dts: qcom: msm8916-pins: move sdhc2 cd node with its siblings
arm64: dts: qcom: msm8916: normalize I2C and SPI nodes
arm64: dts: qcom: msm8916: drop unused board-specific nodes
arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable
arm64: dts: qcom: pm8916: fix wcd_codec indentation
arm64: dts: msm8916: Correct ipc references for smsm
arm64: dts: msm8916: Add missing #phy-cells
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This node was the only one that didn't have the same set of pins in
active and suspend mode.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Nodes relative to the first sdhc node were interlaced with node of the
second sdhc. Move sdhc2_cd_pin with its siblings to prevent that. Also
rename the grouping node from sdhc2_cd_pin to pmx_sdc2_cd_pin, as
"pmx_sdc" is the prefix used by other nodes.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The QUP core can be used either for I2C or SPI, so the same IP is mapped
by a driver or the other. SPI bindings use a leading 0 for the start
address and a size of 0x600, I2C bindings don't have the leading 0 and
have a size 0x1000.
To make them more similar, add the leading 0 to I2C bindings and changes
the size to 0x500 for all of them, as this is the actual size of these
blocks. Also align the second entry of the clocks array.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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These nodes reserve and configure some pins as GPIOs. They are not
generic pinctrls, they actually belong to board files but they are not
used by any other node, so just drop them altogether.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Drop assignments to bias-disable as the documentation [1] states that
this property doesn't take a value. Other occurrences of this property
respect that.
[1] Documentation/devicetree/bindings/pinctrl/qcom,msm8916-pinctrl.txt
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Indentation did not respect kernel standards, so fix that for the usual
indent with tabs, align with spaces. While at it, remove some empty
lines before and after the closing parenthesis of this block.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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SMSM is not symmetrical, the incoming bits from WCNSS are available at
index 6, but the outgoing host id for WCNSS is 3. Further more, upstream
references the base of APCS (in contrast to downstream), so the register
offset of 8 must be included.
Fixes: 1fb47e0a9ba4 ("arm64: dts: qcom: msm8916: Add smsm and smp2p nodes")
Cc: stable@vger.kernel.org
Reported-by: Ramon Fried <rfried@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Add a missing #phy-cells to the dsi-phy, to silence dtc warning.
Cc: Archit Taneja <architt@codeaurora.org>
Fixes: 305410ffd1b2 ("arm64: dts: msm8916: Add display support")
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
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The EB MP board probably has a character LCD but the board manual does
not really state which IRQ it has assigned to this device. The invalid
assignment was a mistake by me during submission of the DTSI where I was
looking for the reference, didn't find it and didn't fill it in.
Delete this for now: it can probably be fixed but that requires access
to the actual board for some trial-and-error experiments.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt
DT for 4.16
- New boards:
- Axentia Nattis with Natte power
- sama5d2 PTC ek
- Document and use extended TCB bindings
* tag 'at91-ab-4.16-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (50 commits)
ARM: dts: at91: sama5d2_ptc_ek: use TCB0 as timers
ARM: dts: at91: sama5d27_som1_ek: use TCB0 as timers
ARM: dts: at91: sama5d2 Xplained: use TCB0 as timers
ARM: dts: at91: sama5d2: TC blocks are also simple-mfd and syscon devices
ARM: dts: at91: vinco: use TCB2 as timers
ARM: dts: at91: ma5d4: use TCB2 as timers
ARM: dts: at91: sama5d4 Xplained: use TCB2 as timers
ARM: dts: at91: sama5d4ek: use TCB2 as timers
ARM: dts: at91: sama5d4: Add TCB2
ARM: dts: at91: sama5d4: TC blocks are also simple-mfd and syscon devices
ARM: dts: at91: linea/tse850-3: use TCB0 as timers
ARM: dts: at91: sama5d3xek_cmp: use TCB0 as timers
ARM: dts: at91: kizbox2: use TCB0 as timers
ARM: dts: at91: sama5d3 Xplained: use TCB0 as timers
ARM: dts: at91: sama5d3xek: use TCB0 as timers
ARM: dts: at91: sama5d3: TC blocks are also simple-mfd and syscon devices
ARM: dts: at91: kizboxmini: use TCB0 as timers
ARM: dts: at91: cosino: use TCB0 as timers
ARM: dts: at91: acme/g25: use TCB0 as timers
ARM: dts: at91: at91sam9x5cm: use TCB0 as timers
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Signed-off-by: Olof Johansson <olof@lixom.net>
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Use tcb0 for timers as selected in sama5_defconfig.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Use tcb0 for timers as selected in sama5_defconfig.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Use tcb0 for timers as selected in sama5_defconfig.
Tested-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Add simple-mfd and syscon to the TC blocks to allow to register one of the
channels as clocksource properly at boot time and free up the remaining
channels for other use.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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As TCB2 doesn't have any output pins, use it for timers
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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As TCB2 doesn't have any output pins, use it for timers
Cc: Marek Vasut <marex@denx.de>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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As TCB2 doesn't have any output pins, use for timers.
Tested-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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As TCB2 doesn't have any output pins, use it for timers.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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The third TC block is missing from the dtsi. It has no output pins but can
still be used for timers as the IRQ is wired.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Add simple-mfd and syscon to the TC blocks to allow to register one of the
channels as clocksource properly at boot time and free up the remaining
channels for other use.
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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