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* drm/nouveau: support for buffer moves via MaxwellDmaCopyABen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/ce/gm204: initial supportBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: add support for gm20x fifo channelsBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fifo/gm204: initial supportBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gk104-: prevent reading non-existent regs in intr handlerBen Skeggs2015-04-14
| | | | | | | | | Under certain circumstances the trapped address will contain subc 7, which GK104 GR doesn't have anymore. Notice this case to avoid causing additional priv ring faults. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gm107: very slightly demagic part of attrib cb setupBen Skeggs2015-04-14
| | | | | | | No idea if "3" is a constant or derived from something else, but the value is unchanged in the limited traces of gm107/gm204 I have here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gk104-: correct crop/zrop num_active_fbps settingBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gf100-: add symbolic names for classesBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gm107: support tpc "strand" ctxsw in gpccs ucodeBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gf100-: support mmio access with gpc offset from gpccs ucodeBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr: fix engine name, cosmetic search+replace mistakeBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pmu/gk20a: add some missing staticsAlexandre Courbot2015-04-14
| | | | | | | Make static a few functions and structures that should be. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/platform: fix probe error pathAlexandre Courbot2015-04-14
| | | | | | | | | | | | A "return 0" found its way in the middle of the error path of nouveau_platform_probe(), remove it as it will make the kernel crash if we try to unload the module afterwards. While we are at it, also remove the IOMMU domain if it has been created, as we should. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/platform: release IOMMU's mm upon exitAlexandre Courbot2015-04-14
| | | | | | | | nvkm_mm_fini() was not called when exiting the driver, resulting in a memory leak. Fix this. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gk104-gk20a: call pmu to disable any power-gating before ctor()Ben Skeggs2015-04-14
| | | | | | | | On some of these chipsets, reading NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK can trigger a PRI fault and return an error code instead of a TPC mask, unless PGOB has been disabled first. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pmu/gk208: implement gr power-up magic with gk110_pmu_pgob()Ben Skeggs2015-04-14
| | | | | | | | Before we moved gk110's implementation of this to pmu, the functions were identical. This commit just switches GK208 to use the new (more complete) implementation of the power-up sequence. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pmu/gk110: implement gr power-up magic like PGOB on earlier chipsBen Skeggs2015-04-14
| | | | | | | Turns out the PTHERM part of this dance is bracketed by the same PMU fiddling that occurs on GK104/6, let's assume it's also PGOB. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pbus/hwsq: Make code size u16Roy Spliet2015-04-14
| | | | | | | So we can actually use the full 512 byte code space Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/pbus/hwsq: Support strided register writesRoy Spliet2015-04-14
| | | | | Signed-off-by: Roy Spliet <rspliet@eclipso.eu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/instmem/gk20a: fix crash during error pathAlexandre Courbot2015-04-14
| | | | | | | | | | | | | If a memory allocation fails when using the DMA allocator, gk20a_instobj_dtor_dma() will be called on the failed instmem object. At this time, node->handle might not be NULL despite the call to dma_alloc_attrs() having failed. node->cpuaddr is the right member to check for such a failure, so use it instead. Reported-by: Vince Hsu <vinceh@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/disp/gf110-: fix base channel update debug/error outputBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/disp/nv50-: fix push buffers in vramBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau: bump driver patchlevel for coherent flagBen Skeggs2015-04-14
| | | | Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gem: allow user-space to specify an object should be coherentAlexandre Courbot2015-04-14
| | | | | | | | | | | | | | | | | | | | | | | | User-space use mappable BOs notably for fences, and expects that a value update by the GPU will be immediatly visible through the user-space mapping. ARM has a property that may prevent this from happening though: memory can be mapped multiple times only if the different mappings share the same caching properties. However all the lowmem memory is already identity-mapped into the kernel with cache enabled, so when user-space requests an uncached mapping, we actually get an "undefined caching policy" one and this has strange side-effects described on Freedesktop bug 86690. To prevent this from happening, allow user-space to explicitly specify which objects should be coherent, and create such objects with the TTM_PL_FLAG_UNCACHED flag. This will make TTM allocate memory using the DMA API, which will fix the identify mapping and allow us to safely map the objects to user-space uncached. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/instmem/gk20a: add IOMMU supportAlexandre Courbot2015-04-14
| | | | | | | | | | Let GK20A's instmem take advantage of the IOMMU if it is present. Having an IOMMU means that instmem is no longer allocated using the DMA API, but instead obtained through page_alloc and made contiguous to the GPU by IOMMU mappings. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/platform: probe IOMMU if presentAlexandre Courbot2015-04-14
| | | | | | | | | | | | Tegra SoCs have an IOMMU that can be used to present non-contiguous physical memory as contiguous to the GPU and maximize the use of large pages in the GPU MMU, leading to performance gains. This patch adds support for probing such a IOMMU if present and make its properties available in the nouveau_platform_gpu structure so subsystems can take advantage of it. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/instmem/gk20a: use DMA attributesAlexandre Courbot2015-04-14
| | | | | | | | | | | instmem for GK20A is allocated using dma_alloc_coherent(), which provides us with a coherent CPU mapping that we never use because instmem objects are accessed through PRAMIN. Switch to dma_alloc_attrs() which gives us the option to dismiss that CPU mapping and free up some CPU virtual space. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gk20a: remove RAM deviceAlexandre Courbot2015-04-14
| | | | | | | | Now that Nouveau can operate even when there is no RAM device, remove the dummy one used by GK20A. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/instmem/gk20a: move memory allocation to instmemAlexandre Courbot2015-04-14
| | | | | | | | | GK20A does not have dedicated RAM, thus having a RAM device for it does not make sense. Move the contiguous physical memory allocation to instmem. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* make RAM device optionalAlexandre Courbot2015-04-14
| | | | | | | | | | | | | | | Having a RAM device does not make sense for chips like GK20A which have no dedicated video memory. The dummy RAM device that we used so far works as a temporary band-aid, but in the longer term it is desirable for the driver to be able to work without any kind of VRAM. This patch adds a few conditionals in places where a RAM device was assumed to be present and allows some more objects to be allocated from the TT domain, allowing Nouveau to handle GPUs for which pfb->ram == NULL. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/gr/gf100: Clear notify interruptLauri Peltonen2015-04-14
| | | | | | | | | Notify interrupt is only used for cyclestats. We can just clear it and avoid an "unknown stat" error that gets printed to dmesg otherwise. Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/graph/nvc0: Fix engine pointer retrievalLauri Peltonen2015-04-14
| | | | | | | | | Other methods in this file suggest this is the correct way to retrieve the engine pointer. Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/devinit/nv04: change owner to intBen Skeggs2015-04-14
| | | | | | | We use -1 to mean "not read from hw yet" Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/mxm: indent an if statementDan Carpenter2015-04-14
| | | | | | | | This if statement is correct but it wasn't indented, so it looked like some code was missing. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* drm/nouveau/fuse/gm107: simplify the return logicMartin Peres2015-04-14
| | | | | | | | | Spotted by coccinelle: drivers/gpu/drm/nouveau/core/subdev/fuse/gm107.c:50:5-8: WARNING: end returns can be simpified Signed-off-by: Martin Peres <martin.peres@free.fr> Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
* Merge tag 'imx-drm-next-2015-03-31' of ↵Dave Airlie2015-04-13
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.pengutronix.de/git/pza/linux into drm-next imx-drm changes to use media bus formats and LDB drm_panel support - Add media bus formats needed by imx-drm - Switch to use media bus formats to describe the pixel format on the internal parallel bus between display interface and encoders - Some preparations for TV Output via TVEv2 on i.MX5 - Add drm_panel support to the i.MX LVDS driver, allow to determine the bus pixel format from the panel descriptor. * tag 'imx-drm-next-2015-03-31' of git://git.pengutronix.de/git/pza/linux: drm/imx: imx-ldb: allow to determine bus format from the connected panel drm/imx: imx-ldb: reset display clock input when disabling LVDS drm/imx: imx-ldb: add drm_panel support drm/imx: consolidate bus format variable names drm/imx: switch to use media bus formats Add RGB666_1X24_CPADHI media bus format Add YUV8_1X24 media bus format Add BGR888_1X24 and GBR888_1X24 media bus formats Add LVDS RGB media bus formats Add RGB444_1X12 and RGB565_1X16 media bus formats drm/imx: ipuv3-crtc: Allow to divide DI clock from TVEv2 drm/imx: Add support for interlaced scanout
| * drm/imx: imx-ldb: allow to determine bus format from the connected panelPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | This patch makes the fsl,data-width and fsl,data-mapping device tree properties optional if a panel is connected to the ldb output port via the of_graph bindings. The data mapping is determined from the display_info.bus_format field provided by the panel. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * drm/imx: imx-ldb: reset display clock input when disabling LVDSPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | The LDB driver changes the attached display interface's input clock mux to the LDB_DI clock reference. Change it back again when disabling the LVDS display. Changing back to the PLL5 for example allows to configure the same DI for HDMI output later. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * drm/imx: imx-ldb: add drm_panel supportPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows to optionally attach the lvds-channel to a panel supported by a drm_panel driver using of-graph bindings, instead of supplying the modes via display-timings in the device tree. This depends on of_graph_get_port_by_id and uses the OF graph to link the optional DRM panel to the LDB lvds-channel. The output port number is 1 on devices without the 4-port input multiplexer (i.MX5) and 4 on devices with the mux (i.MX6). Before: ldb { ... lvds-channel@0 { ... display-timings { native-timing = <&timing1>; timing1: etm0700g0dh6 { hactive = <800>; vactive = <480>; clock-frequency = <33260000>; hsync-len = <128>; hback-porch = <88>; hfront-porch = <40>; vsync-len = <2>; vback-porch = <33>; vfront-porch = <10>; hsync-active = <0>; vsync-active = <0>; ... }; }; ... }; }; After: ldb { ... lvds-channel@0 { ... port@4 { reg = <4>; lvds_out: endpoint { remote_endpoint = <&panel_in>; }; }; }; }; panel { compatible = "edt,etm0700g0dh6", "simple-panel"; ... port { panel_in: endpoint { remote-endpoint = <&lvds_out>; }; }; }; [Fixed build error due to missing select on DRM_PANEL --rmk] Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * drm/imx: consolidate bus format variable namesPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | | | This patch consolidates the different interface_pix_fmt, pixel_fmt, pix_fmt, and pixfmt variables to a common name "bus_format" wherever they describe the pixel format on the bus between display controller and encoder hardware. At the same time, it renames imx_drm_panel_format to imx_drm_set_bus_format. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
| * drm/imx: switch to use media bus formatsPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | | | | | imx-drm internally misused the V4L2_PIX_FMT constants, which are supposed to describe the pixel format of frame buffers in memory, to describe the pixel format on the bus between the display controller and the encoder hardware. Now that MEDIA_BUS_FMT constants are available to drm drivers, use those instead. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
| * Add RGB666_1X24_CPADHI media bus formatPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | Commit 9e74d2926a28 ("staging: imx-drm: add LVDS666 support for parallel display") describes a 24-bit bus format where three 6-bit components each take the lower part of 8 bits with the two high bits zero padded. Add a component-wise padded media bus format RGB666_1X24_CPADHI to support this connection. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Tested-by: Emil Renner Berthing <kernel@esmil.dk>
| * Add YUV8_1X24 media bus formatPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | This patch adds the media bus format for a 24-bit bus format with three 8-bit YUV components. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
| * Add BGR888_1X24 and GBR888_1X24 media bus formatsPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | | | This patch adds two more 24-bit RGB formats. BGR888 is more or less common, GBR888 is used on the internal connection between the IPU display interface and the TVE (VGA DAC) on i.MX53 SoCs. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
| * Add LVDS RGB media bus formatsPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | | | | | | | | | This patch adds three new RGB media bus formats that describe 18-bit or 24-bit samples transferred over an LVDS bus with three or four differential data pairs, serialized into 7 time slots, using standard SPWG/PSWG/VESA or JEIDA data ordering. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
| * Add RGB444_1X12 and RGB565_1X16 media bus formatsBoris Brezillion2015-03-31
| | | | | | | | | | | | | | | | | | | | | | | | Add RGB444_1X12 and RGB565_1X16 format definitions and update the documentation. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * drm/imx: ipuv3-crtc: Allow to divide DI clock from TVEv2Philipp Zabel2015-03-31
| | | | | | | | | | | | | | | | This patch allows the IPU to divide the 27 MHz input clock from the TVE by two to obtain the 13.5 MHz pixel clock needed for NTSC/PAL SD modes. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * drm/imx: Add support for interlaced scanoutPhilipp Zabel2015-03-31
| | | | | | | | | | | | | | This patch allows interlaced frame buffer scanout for interlaced output via HDMI or TV-Encoder. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | Merge tag 'of-graph-drm-2015-04-08' of ↵Dave Airlie2015-04-13
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.pengutronix.de/git/pza/linux into drm-next drm: Use of-graph helpers to loop over endpoints Convert all drm callers that use of_graph_get_next_endpoint to loop over of-graph endpoints to the newly introduced for_each_endpoint_of_node helper macro. * tag 'of-graph-drm-2015-04-08' of git://git.pengutronix.de/git/pza/linux: drm/rockchip: use for_each_endpoint_of_node macro, drop endpoint reference on break drm/rcar-du: use for_each_endpoint_of_node macro drm/imx: use for_each_endpoint_of_node macro in imx_drm_encoder_get_mux_id drm: use for_each_endpoint_of_node macro in drm_of_find_possible_crtcs of: Explicitly include linux/types.h in of_graph.h dt-bindings: brcm: rationalize Broadcom documentation naming of/unittest: replace 'selftest' with 'unittest' Documentation: rename of_selftest.txt to of_unittest.txt Documentation: update the of_selftest.txt dt: OF_UNITTEST make dependency broken MAINTAINERS: Pantelis Antoniou device tree overlay maintainer of: Add of_graph_get_port_by_id function of: Add for_each_endpoint_of_node helper macro of: Decrement refcount of previous endpoint in of_graph_get_next_endpoint
| * | drm/rockchip: use for_each_endpoint_of_node macro, drop endpoint reference ↵Philipp Zabel2015-04-08
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on break Using the for_each_... macro should make the code a bit shorter and easier to read. Also, when breaking out of the loop, the endpoint node reference count needs to be decremented. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
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