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* drm/amd/powerplay: enable set lowest mclk clock on baffin.Rex Zhu2016-05-04
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powrplay: fix issue that get wrong enable flag.Rex Zhu2016-05-04
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: fix mclk in high clock for baffinRex Zhu2016-05-04
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: print gpu loading and uvd/vce power gate enablement for ↵Rex Zhu2016-05-04
| | | | | | | | polaris10/11. Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: change ELM/BAF to Polaris10/Polaris11Flora Cui2016-05-04
| | | | | | | | Adjust to preferred code names. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add ELM/BAF pci idsFlora Cui2016-05-04
| | | | | | | Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: update the core VI support for ELM/BAFFlora Cui2016-05-04
| | | | | | Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: ungate SMC clockgating first before suspendFlora Cui2016-05-04
| | | | | | | | | | 46c34bcb6a15dd85329a39a5e72c62108626acdc put all block’s clockgating support in SMC. The sequence in suspend routine should be adjusted accordingly, otherwise it causes asic hang. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: add power gating init for BaffinEric Huang2016-05-04
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: add power gating initialization support for GFX8.0Eric Huang2016-05-04
| | | | | | Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add default clockgating handlingFlora Cui2016-05-04
| | | | | | | | | | This is to workaround regression introduced in 46c34bcb6a15dd85329a39a5e72c62108626acdc. It should be reverted with a final fix. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: add medium grain powergating support for BaffinEric Huang2016-05-04
| | | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add GFX per cu powergating for BaffinEric Huang2016-05-04
| | | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add GFX per cu powergating support through SMU/powerplayEric Huang2016-05-04
| | | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: add query GFX cu info in CGS query system infoEric Huang2016-05-04
| | | | | | | | | Needed for per CU powergating. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add GFX/SYS clockgating support for ELM/BAFEric Huang2016-05-04
| | | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add all blocks clockgating support through SMU/powerplayEric Huang2016-05-04
| | | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: update baffin & ellesmere smc_sk firmware.yanyang12016-05-04
| | | | | | | | sync the code form catalyst CL:#1230866. Signed-off-by: yanyang1 <Young.Yang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: Add smc_sk firmware to baffin & ellesmere.yanyang12016-05-04
| | | | | | | | update relational h files. Signed-off-by: yanyang1 <Young.Yang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/amdgpu: Add smc_sk firmware in baffin & ellesmere.yanyang12016-05-04
| | | | | | | | add CGS_UCODE_ID_SMU_SK. Signed-off-by: yanyang1 <Young.Yang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add UVD&VCE DPM and powergating support for elm/bafEric Huang2016-05-04
| | | | | | Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add thermal control for elm/bafEric Huang2016-05-04
| | | | | | Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: enable powerplay for baffin.Rex Zhu2016-05-04
| | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: init hwmgr for ELM/BAFRex Zhu2016-05-04
| | | | | | Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: enable dpm for baffin.Rex Zhu2016-05-04
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add smu support for ellesmere/baffinrezhu2016-05-04
| | | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amd/powerplay: add header files for ellesmere smu manager.rezhu2016-05-04
| | | | | Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add VCE support to ELM/BAFSonny Jiang2016-05-04
| | | | | | | | | | Ellesmere and Baffin are VCE 3.4 Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add UVD support for ELM/BAFSonny Jiang2016-05-04
| | | | | | | | | | Ellesmere and Baffin are UVD 6.3 Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add GFX support for ELM/BAFFlora Cui2016-05-04
| | | | | | | | | | V2: use gfx_8_0_*.h instead of gfx_8_1_*.h v3: agd: integrate support for gfx info table Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add mmRLC_CGCG_CGLS_CTRL_3D & mmRLC_CGCG_RAMP_CTRL_3DFlora Cui2016-05-04
| | | | | | Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add an interface to get gfx constants from atombiosAlex Deucher2016-05-04
| | | | | | | Fetch the values from atom rather than hardcoding them in the driver. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add SDMA support for ELM/BAFFlora Cui2016-05-04
| | | | | | | | | V2: seperate baffin & ellesmere settings instead of using fiji ones. Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add DCE golden setting for ELM/BAFFlora Cui2016-05-04
| | | | | | | Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: add GMC support for ELM/BAFFlora Cui2016-05-04
| | | | | | | | | V2: add golden_settings_baffin_a11 instead of reuse golden_settings_fiji_a10 Signed-off-by: Flora Cui <Flora.Cui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu/dce11: add dce clock setting for ELM/BAFAlex Deucher2016-05-04
| | | | | | | | | | Setup the disp clock and dp reference clock. This is now a separate command table on elm/baf compared to older asics. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu/dce11: update pll programming for ELM/BAFAlex Deucher2016-05-04
| | | | | | | | | | SetPixelClock table handles pll divider calculation and spread spectrum setup, so no need to use calculate the dividers and call the ss enable cmd table. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add ELM/BAF support to dce_v11_0_pick_pll (v2)Alex Deucher2016-05-04
| | | | | | | | | | New PLL scheme on ELM/BAF. v2: squash in pll fix. Plls are part of the phys. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu/atom: add support for new UNIPHYTransmitterContol cmd tableAlex Deucher2016-05-04
| | | | | | | | New uniphy transmitter setup table for elm/baf. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu/atom: add support for new DIGxEncoderControl cmd tableAlex Deucher2016-05-04
| | | | | | | | New digital encoder setup table for elm/baf. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu/atom: add support for new SetPixelClock tableAlex Deucher2016-05-04
| | | | | | | | | | New version of the SetPixelClock table for elm/baf. The new table calculates the pll dividers and handles spread spectrum calculations and setup. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu/atom: add SetDCEClock helperAlex Deucher2016-05-04
| | | | | | | | | New cmd table for ELM/BAF for setting the dispclock or dprefclock. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: update atombios.h (v2)Alex Deucher2016-05-04
| | | | | | | | | | update to internal version 893 v2: Pull in gfx_info changes from 898 Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: bump the afmt limit for CZ, ST, PolarisAlex Deucher2016-05-04
| | | | | | | | Fixes array overflow on these chips. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: use defines for CRTCs and AMFT blocksAlex Deucher2016-05-04
| | | | | | | | Prerequiste for the next patch which ups the limits. Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
* drm/amdgpu: add ELM/BAF DCE11 configs (v2)Alex Deucher2016-05-04
| | | | | | | | | | Add support for the display configuration on elm/baf. v2: add missing Stoney case Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amdgpu: add ELM/BAF asic typesAlex Deucher2016-05-04
| | | | | | | | New asic types for ellesmere and baffin. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
* drm/amd: add DCE 11.2 register headersAlex Deucher2016-05-04
| | | | | | | | | Add register headers for DCE (Display and Composition Engine) 11.2. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/radeon: Allow setting shader registers using DMA/COPY packet3 on SI.Bas Nieuwenhuizen2016-05-04
| | | | | | | | | | | | | Mesa uses a COPY_DATA packet to copy the grid size for indirect dispatches into COMPUTE_USER_DATA_*. Setting those registers with a SET_SH_REG packet is allowed, not allowing them with other packets seems like an oversight. v2: Clarify commit message. Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
* drm/amdgpu: remove sorting of CS BOsChristian König2016-05-04
| | | | | | | | Not needed any more. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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