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* crypto: atmel-aes - rework crypto request completionCyrille Pitchen2015-12-23
| | | | | | | | | | | | | This patch introduces a new callback 'resume' in the struct atmel_aes_dev. This callback is run to resume/complete the processing of the crypto request when woken up by I/O events such as AES interrupts or DMA completion. This callback will help implementing the GCM mode support in further patches. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - simplify the configuration of the AES IPCyrille Pitchen2015-12-23
| | | | | | | | This patch reworks the AES_FLAGS_* to simplify the configuration of the AES IP. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - remove useless write in the Control RegisterCyrille Pitchen2015-12-23
| | | | | | | | As claimed by the datasheet, writing 0 into the Control Register has no effet. So we remove this useless register access. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - make crypto request queue management more genericCyrille Pitchen2015-12-23
| | | | | | | | | | | | | | | | This patch changes atmel_aes_handle_queue() to make it more generic. The function argument is now a pointer to struct crypto_async_request, which is the common base of struct ablkcipher_request and struct aead_request. Also this patch introduces struct atmel_aes_base_ctx which will be the common base of all the transformation contexts. Hence the very same queue will be used to manage both block cipher and AEAD requests (such as gcm and authenc implemented in further patches). Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - change atmel_aes_write_ctrl() signatureCyrille Pitchen2015-12-23
| | | | | | | | | | | | | | | | This patch changes the signature of atmel_aes_write_ctrl() to make it more generic. This will be used by future patches when implementing new block cipher modes such as GCM. Especially atmel_aes_hw_init() is now called outside atmel_aes_write_ctrl(): this allows to call atmel_aes_write_ctrl() many times, still initializing the hardware only once. Indeed, the support of GCM will require to update the Mode Register and the IV when processing a single request. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - propagate error from atmel_aes_hw_version_init()Cyrille Pitchen2015-12-23
| | | | | | | | | Before this patch atmel_aes_hw_version_init() had no returned value. However it calls atmel_aes_hw_init(), which may fail. So check the returned code of atmel_aes_hw_init() and propagate error if needed. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - remove unused header includesCyrille Pitchen2015-12-23
| | | | | | | Hash headers have nothing to do with AES block ciphers. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - fix unregistration order of crypto algorithmsCyrille Pitchen2015-12-23
| | | | | | | | | This dummy patch fixes atmel_aes_unregister_algs() so crypto algorithms are unregistered in the reverse order they were registered by atmel_aes_register_algs(). Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - change algorithm prioritiesCyrille Pitchen2015-12-23
| | | | | | | | | Increase the algorithm priorities so the hardware acceleration is now preferred to the software computation: the "aes-generice" driver uses 100 as priority. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - constify value argument of atmel_aes_write_n()Cyrille Pitchen2015-12-23
| | | | | | | atmel_aes_write_n() should not modify its value argument. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-aes - add new versionLeilei Zhao2015-12-23
| | | | | | | Add new version of atmel-aes available with SAMA5D2 devices. Signed-off-by: Leilei Zhao <leilei.zhao@atmel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - use list_for_each_entry*Geliang Tang2015-12-22
| | | | | | | | Use list_for_each_entry*() instead of list_for_each*() to simplify the code. Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ux500 - Use precalculated hash from headersLABBE Corentin2015-12-22
| | | | | | | | Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ccp - Use precalculated hash from headersLABBE Corentin2015-12-22
| | | | | | | | | | Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Acked-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: n2 - Use precalculated hash from headersLABBE Corentin2015-12-22
| | | | | | | | Precalculated hash for empty message are now present in hash headers. This patch just use them. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: hash - add zero length message hash for shax and md5LABBE Corentin2015-12-22
| | | | | | | | | | Some crypto drivers cannot process empty data message and return a precalculated hash for md5/sha1/sha224/sha256. This patch add thoses precalculated hash in include/crypto. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - fix some timeout testsPingchao Yang2015-12-22
| | | | | | | | | Change the timeout condition since the times value would be -1 after running MAX_RETRY_TIMES. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Yang Pingchao <pingchao.yang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - fix CTX_ENABLES bits shift direction issuePingchao Yang2015-12-22
| | | | | | | | | AE CTX bits should be 8-15 in CTX_ENABLES, so the mask value 0xff should be left shifted 0x8. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Yang Pingchao <pingchao.yang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: rsa-pkcs1pad - don't allocate buffer on stackAndrzej Zaborowski2015-12-22
| | | | | | | | | Avoid the s390 compile "warning: 'pkcs1pad_encrypt_sign_complete' uses dynamic stack allocation" reported by kbuild test robot. Don't use a flat zero-filled buffer, instead zero the contents of the SGL. Signed-off-by: Andrew Zaborowski <andrew.zaborowski@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap - Removed unused variable "err"Rahul Pathak2015-12-17
| | | | | | | | | | | Removed unused variable "err" and directly return "0" Reported by coccicheck - ./drivers/crypto/omap-aes.c:542:5-8: Unneeded variable: "err". Return "0" on line 551 ./drivers/crypto/omap-des.c:530:5-8: Unneeded variable: "err". Return "0" on line 539 Signed-off-by: Rahul Pathak <rpathak@visteon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: atmel-sha - Removed unused variable "err"Rahul Pathak2015-12-17
| | | | | | | | | | Removed unused variable "err" and directly return "0" Reported by coccicheck - ./drivers/crypto/atmel-sha.c:758:5-8: Unneeded variable: "err". Return "0" on line 766 Signed-off-by: Rahul Pathak <rpathak@visteon.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: nx-842 - Mask XERS0 bit in return valueHaren Myneni2015-12-17
| | | | | | | | | | | | NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is nothing to do with NX request. Since this bit can be set with other valuable return status, mast this bit. One of other bits (INITIATED, BUSY or REJECTED) will be returned for any given NX request. Signed-off-by: Haren Myneni <haren@us.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - uint8_t is not large enough for accel_idTadeusz Struk2015-12-14
| | | | | | | | | accel_id has to be large enough to hold ADF_MAX_DEVICES + 1 (which is > 1025) so uint8_t is too small. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: omap-des - Fix "schedule while atomic" bugSam Protsenko2015-12-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using DES module the next bug appears: BUG: scheduling while atomic: kworker/0:1/63/0x00000102 With backtrace as follows: <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< cut here >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> [<c0012294>] (dump_backtrace) from [<c00124ac>] (show_stack+0x18/0x1c) [<c0012494>] (show_stack) from [<c0752554>] (dump_stack+0x84/0xc4) [<c07524d0>] (dump_stack) from [<c0750218>] (__schedule_bug+0x54/0x64) [<c07501c4>] (__schedule_bug) from [<c07548a4>] (__schedule+0x4ac/0x53c) [<c07543f8>] (__schedule) from [<c075496c>] (schedule+0x38/0x88) [<c0754934>] (schedule) from [<c03c3984>] (rpm_resume+0x158/0x59c) [<c03c382c>] (rpm_resume) from [<c03c3e1c>] (__pm_runtime_resume+0x54/0x6c) [<c03c3dc8>] (__pm_runtime_resume) from [<c0568ff8>] (omap_des_handle_queue+0x154/0x7bc) [<c0568ea4>] (omap_des_handle_queue) from [<c05696b8>] (omap_des_crypt+0x58/0xbc) [<c0569660>] (omap_des_crypt) from [<c0569730>] (omap_des_cbc_decrypt+0x14/0x18) [<c056971c>] (omap_des_cbc_decrypt) from [<c0297534>] (authenc_verify_ahash_done+0xe0/0xe8) [<c0297454>] (authenc_verify_ahash_done) from [<c056a330>] (omap_sham_finish_req+0x58/0xa8) [<c056a2d8>] (omap_sham_finish_req) from [<c056b714>] (omap_sham_done_task+0x1c0/0x1e0) [<c056b554>] (omap_sham_done_task) from [<c003e53c>] (tasklet_action+0x80/0x118) [<c003e4bc>] (tasklet_action) from [<c003e740>] (__do_softirq+0x11c/0x260) [<c003e624>] (__do_softirq) from [<c003eb64>] (irq_exit+0xc0/0xfc) [<c003eaa4>] (irq_exit) from [<c000f1c4>] (handle_IRQ+0x4c/0x98) [<c000f178>] (handle_IRQ) from [<c0008568>] (gic_handle_irq+0x34/0x64) [<c0008534>] (gic_handle_irq) from [<c0758540>] (__irq_svc+0x40/0x70) <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< cut here >>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> Insight was seen in drivers/crypto/omap-sham.c driver. All credits for this patch go to Grygorii Strashko. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - enable VF irq after guest exits ungracefullyZeng Xin2015-12-14
| | | | | | | | | | | The VF bundle interrupt is not triggered any more in the case when guest is shut down with sample app running. Need to clear the flag interrupt bit when restarting to fix this irrecoverable state. Signed-off-by: Zeng Xin <xin.zeng@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: asymmetric_keys - signature.c does not need <module.h>Paul Gortmaker2015-12-11
| | | | | | | | | | | | | This file does not contain any modular related function calls. So get rid of module.h since it drags in a lot of other headers and adds to the preprocessing load. It does export some symbols though, so we'll need to ensure it has export.h present instead. Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: "David S. Miller" <davem@davemloft.net> Cc: linux-crypto@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - select PCI_IOV when VF are enabledTadeusz Struk2015-12-11
| | | | | | | | | Fix i386-randconfig-x004-12092241. PCI_IOV needs to be selected when VFs are enabled Reported-by: <fengguang.wu@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - ring returning retry even though ring has BWHarvijay Saini2015-12-11
| | | | | | | | | | | When many threads submit multiple requests they get blocked until all responses are processed, which prevents them from submitting more requests even though there is space on the rings. To fix this we need to decrement the inflight counter early to in the callback. Signed-off-by: Harvijay Saini <harvijayx.saini@intel.com> Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: akcipher - fix typos in include/crypto/akcipher.hLABBE Corentin2015-12-11
| | | | | | | Fix numerous spelling error in include/crypto/akcipher.h Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: sahara - fix debug output for 64-bit dma_addr_tArnd Bergmann2015-12-10
| | | | | | | | | | | | | | | The sahara_dump_descriptors and sahara_dump_links functions attempt to print a dma_addr_t value with a 0x%08x format string, which produces a warning when dma_addr_t is 64-bit wide: drivers/crypto/sahara.c:419:120: warning: format '%x' expects argument of type 'unsigned int', but argument 5 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] This changes the code to use the %pad format string that is meant for dma_addr_t, which avoids the warning and gives us the correct output in all configurations. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: sahara - fix 64-bit dma_addr_t compilationArnd Bergmann2015-12-10
| | | | | | | | | | | | | | | | | | The sahara hardware uses DMA descriptors with 32-bit addresses, but dma_addr_t is variable size depending on whether we want to support any devices that use 64-bit DMA addresses in hardware. This means that the definition of the DMA descriptor structure is wrong, and we helpfully get a compiler warning about them too: drivers/crypto/sahara.c:423:372: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=] This changes the definition of the sahara_hw_desc and sahara_hw_link structures to only contain fixed-length members, which is required to make the driver work on ARM LPAE mode, and avoids most of the gcc warnings we get. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: drbg - constify drbg_state_ops structuresJulia Lawall2015-12-10
| | | | | | | | | The drbg_state_ops structures are never modified, so declare them as const. Done with the help of Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: chacha20poly1305 - Skip encryption/decryption for 0-lenJason A. Donenfeld2015-12-09
| | | | | | | | | | If the length of the plaintext is zero, there's no need to waste cycles on encryption and decryption. Using the chacha20poly1305 construction for zero-length plaintexts is a common way of using a shared encryption key for AAD authentication. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: rsa - RSA padding algorithmAndrzej Zaborowski2015-12-09
| | | | | | | | | | | | | This patch adds PKCS#1 v1.5 standard RSA padding as a separate template. This way an RSA cipher with padding can be obtained by instantiating "pkcs1pad(rsa)". The reason for adding this is that RSA is almost never used without this padding (or OAEP) so it will be needed for either certificate work in the kernel or the userspace, and I also hear that it is likely implemented by hardware RSA in which case hardware implementations of the whole of pkcs1pad(rsa) can be provided. Signed-off-by: Andrew Zaborowski <andrew.zaborowski@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: akcipher - add akcipher declarations needed by templates.Andrzej Zaborowski2015-12-09
| | | | | | | | | | Add a struct akcipher_instance and struct akcipher_spawn similar to how AEAD declares them and the macros for converting to/from crypto_instance/crypto_spawn. Also add register functions to avoid exposing crypto_akcipher_type. Signed-off-by: Andrew Zaborowski <andrew.zaborowski@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - add support for c62xvf accel typeTadeusz Struk2015-12-09
| | | | | | | Add support for c62x accelerator Virtual Function Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - add support for c3xxxvf accel typeTadeusz Struk2015-12-09
| | | | | | | Add support for c3xxx accelerator Virtual Function Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - add support for c62x accel typeTadeusz Struk2015-12-09
| | | | | | | Add support for qat c62x accel type Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - add support for c3xxx accel typeTadeusz Struk2015-12-09
| | | | | | | Add support for c3xxx accel type. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - move isr files to qat common so that they can be reusedTadeusz Struk2015-12-09
| | | | | | | | | | | Move qat_isr.c and qat_isrvf.c files to qat_common dir so that they can be reused by all devices. Remove adf_drv.h files because thay are not longer needed. Move adf_dev_configure() function to qat_common so it can be reused. Also some minor updates to common code for multidevice. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - add support for new devices to FW loaderPingchao Yang2015-12-09
| | | | | | | FW loader updates for new qat devices Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: qat - add new device definitionsTadeusz Struk2015-12-09
| | | | | | | Add dev ids and names for the new device types. Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: aead - fix kernel-doc warnings in crypto/aead.hRandy Dunlap2015-12-09
| | | | | | | | | Fix 21 occurrences of this kernel-doc warning in <crypto/aead.h>: ..//include/crypto/aead.h:149: warning: No description found for parameter 'base' Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: n2 - Use platform_register/unregister_drivers()Thierry Reding2015-12-04
| | | | | | | | | | These new helpers simplify implementing multi-driver modules and properly handle failure to register one driver by unregistering all previously registered drivers. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: talitos - add new crypto modesLEROY Christophe2015-12-04
| | | | | | | | | | | | This patch adds the following algorithms to the talitos driver: * ecb(aes) * ctr(aes) * ecb(des) * cbc(des) * ecb(des3_ede) Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: vmx - IV size failing on skcipher APILeonidas Da Silva Barbosa2015-12-04
| | | | | | | | | | | IV size was zero on CBC and CTR modes, causing a bug triggered by skcipher. Fixing this adding a correct size. Signed-off-by: Leonidas Da Silva Barbosa <leosilva@linux.vnet.ibm.com> Signed-off-by: Paulo Smorigo <pfsmorigo@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: caam - pass the correct buffer lengthFabio Estevam2015-12-04
| | | | | | | | | When buffer 0 is used we should use buflen_0 instead of buflen_1. Fix it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: cryptd - Assign statesize properlyWang, Rui Y2015-12-04
| | | | | | | | | | | cryptd_create_hash() fails by returning -EINVAL. It is because after 8996eafdc ("crypto: ahash - ensure statesize is non-zero") all ahash drivers must have a non-zero statesize. This patch fixes the problem by properly assigning the statesize. Signed-off-by: Rui Wang <rui.y.wang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: ghash-clmulni - Fix load failureWang, Rui Y2015-12-04
| | | | | | | | | | | | | | | | ghash_clmulni_intel fails to load on Linux 4.3+ with the following message: "modprobe: ERROR: could not insert 'ghash_clmulni_intel': Invalid argument" After 8996eafdc ("crypto: ahash - ensure statesize is non-zero") all ahash drivers are required to implement import()/export(), and must have a non- zero statesize. This patch has been tested with the algif_hash interface. The calculated digest values, after several rounds of import()s and export()s, match those calculated by tcrypt. Signed-off-by: Rui Wang <rui.y.wang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
* crypto: rockchip - fix possible deadlockHeiko Stuebner2015-12-04
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lockdep warns about a possible deadlock resulting from the use of regular spin_locks: ================================= [ INFO: inconsistent lock state ] 4.4.0-rc2+ #2724 Not tainted --------------------------------- inconsistent {SOFTIRQ-ON-W} -> {IN-SOFTIRQ-W} usage. ksoftirqd/0/3 [HC0[0]:SC1[1]:HE1:SE0] takes: (&(&crypto_info->lock)->rlock){+.?...}, at: [<bf14a65c>] rk_crypto_tasklet_cb+0x24/0xb4 [rk_crypto] {SOFTIRQ-ON-W} state was registered at: [<c007f4ac>] lock_acquire+0x178/0x218 [<c0759bac>] _raw_spin_lock+0x54/0x64 [<bf14af88>] rk_handle_req+0x7c/0xbc [rk_crypto] [<bf14b040>] rk_des_ecb_encrypt+0x2c/0x30 [rk_crypto] [<bf14b05c>] rk_aes_ecb_encrypt+0x18/0x1c [rk_crypto] [<c028c820>] skcipher_encrypt_ablkcipher+0x64/0x68 [<c0290770>] __test_skcipher+0x2a8/0x8dc [<c0292e94>] test_skcipher+0x38/0xc4 [<c0292fb0>] alg_test_skcipher+0x90/0xb0 [<c0292158>] alg_test+0x1e8/0x280 [<c028f6f4>] cryptomgr_test+0x34/0x54 [<c004bbe8>] kthread+0xf4/0x10c [<c0010010>] ret_from_fork+0x14/0x24 irq event stamp: 10672 hardirqs last enabled at (10672): [<c002fac8>] tasklet_action+0x48/0x104 hardirqs last disabled at (10671): [<c002faa0>] tasklet_action+0x20/0x104 softirqs last enabled at (10658): [<c002ef84>] __do_softirq+0x358/0x49c softirqs last disabled at (10669): [<c002f108>] run_ksoftirqd+0x40/0x80 other info that might help us debug this: Possible unsafe locking scenario: CPU0 ---- lock(&(&crypto_info->lock)->rlock); <Interrupt> lock(&(&crypto_info->lock)->rlock); *** DEADLOCK *** Fix this by moving to irq-disabling spinlocks. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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