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-rw-r--r--virt/kvm/arm/vgic/vgic-v3.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c
index edc6ee2dc852..be0f4c3e0142 100644
--- a/virt/kvm/arm/vgic/vgic-v3.c
+++ b/virt/kvm/arm/vgic/vgic-v3.c
@@ -229,10 +229,13 @@ void vgic_v3_enable(struct kvm_vcpu *vcpu)
229 /* 229 /*
230 * If we are emulating a GICv3, we do it in an non-GICv2-compatible 230 * If we are emulating a GICv3, we do it in an non-GICv2-compatible
231 * way, so we force SRE to 1 to demonstrate this to the guest. 231 * way, so we force SRE to 1 to demonstrate this to the guest.
232 * Also, we don't support any form of IRQ/FIQ bypass.
232 * This goes with the spec allowing the value to be RAO/WI. 233 * This goes with the spec allowing the value to be RAO/WI.
233 */ 234 */
234 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) { 235 if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
235 vgic_v3->vgic_sre = ICC_SRE_EL1_SRE; 236 vgic_v3->vgic_sre = (ICC_SRE_EL1_DIB |
237 ICC_SRE_EL1_DFB |
238 ICC_SRE_EL1_SRE);
236 vcpu->arch.vgic_cpu.pendbaser = INITIAL_PENDBASER_VALUE; 239 vcpu->arch.vgic_cpu.pendbaser = INITIAL_PENDBASER_VALUE;
237 } else { 240 } else {
238 vgic_v3->vgic_sre = 0; 241 vgic_v3->vgic_sre = 0;