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-rw-r--r--tools/perf/Build10
-rw-r--r--tools/perf/Documentation/perf-record.txt5
-rw-r--r--tools/perf/Makefile.config14
-rw-r--r--tools/perf/Makefile.perf24
-rw-r--r--tools/perf/arch/Build4
-rw-r--r--tools/perf/arch/arm/Build4
-rw-r--r--tools/perf/arch/arm/tests/Build8
-rw-r--r--tools/perf/arch/arm/util/Build8
-rw-r--r--tools/perf/arch/arm64/Build4
-rw-r--r--tools/perf/arch/arm64/tests/Build6
-rw-r--r--tools/perf/arch/arm64/util/Build12
-rw-r--r--tools/perf/arch/nds32/Build2
-rw-r--r--tools/perf/arch/nds32/util/Build2
-rw-r--r--tools/perf/arch/powerpc/Build4
-rw-r--r--tools/perf/arch/powerpc/tests/Build6
-rw-r--r--tools/perf/arch/powerpc/util/Build18
-rw-r--r--tools/perf/arch/s390/Build2
-rw-r--r--tools/perf/arch/s390/util/Build12
-rw-r--r--tools/perf/arch/sh/Build2
-rw-r--r--tools/perf/arch/sh/util/Build2
-rw-r--r--tools/perf/arch/sparc/Build2
-rw-r--r--tools/perf/arch/sparc/util/Build2
-rw-r--r--tools/perf/arch/x86/Build4
-rw-r--r--tools/perf/arch/x86/tests/Build14
-rw-r--r--tools/perf/arch/x86/util/Build30
-rw-r--r--tools/perf/arch/xtensa/Build2
-rw-r--r--tools/perf/arch/xtensa/util/Build2
-rw-r--r--tools/perf/builtin-list.c8
-rw-r--r--tools/perf/builtin-record.c18
-rw-r--r--tools/perf/builtin-trace.c6
-rw-r--r--tools/perf/pmu-events/arch/powerpc/power8/metrics.json2245
-rw-r--r--tools/perf/pmu-events/arch/powerpc/power9/metrics.json1982
-rw-r--r--tools/perf/scripts/Build4
-rw-r--r--tools/perf/scripts/perl/Perf-Trace-Util/Build2
-rw-r--r--tools/perf/scripts/python/Perf-Trace-Util/Build2
-rw-r--r--tools/perf/tests/parse-events.c30
-rw-r--r--tools/perf/trace/beauty/Build26
-rw-r--r--tools/perf/trace/beauty/ioctl.c2
-rw-r--r--tools/perf/trace/beauty/waitid_options.c2
-rw-r--r--tools/perf/ui/Build18
-rw-r--r--tools/perf/ui/browsers/Build10
-rw-r--r--tools/perf/ui/tui/Build8
-rw-r--r--tools/perf/util/Build276
-rw-r--r--tools/perf/util/bpf-event.c4
-rw-r--r--tools/perf/util/c++/Build4
-rw-r--r--tools/perf/util/cs-etm-decoder/Build2
-rw-r--r--tools/perf/util/cs-etm-decoder/cs-etm-decoder.h10
-rw-r--r--tools/perf/util/cs-etm.c458
-rw-r--r--tools/perf/util/cs-etm.h4
-rw-r--r--tools/perf/util/header.c8
-rw-r--r--tools/perf/util/intel-pt-decoder/Build2
-rw-r--r--tools/perf/util/metricgroup.c8
-rw-r--r--tools/perf/util/metricgroup.h3
-rw-r--r--tools/perf/util/parse-events.c2
-rw-r--r--tools/perf/util/parse-events.y4
-rw-r--r--tools/perf/util/s390-cpumsf.c5
-rw-r--r--tools/perf/util/scripting-engines/Build4
57 files changed, 4860 insertions, 502 deletions
diff --git a/tools/perf/Build b/tools/perf/Build
index e5232d567611..5f392dbb88fc 100644
--- a/tools/perf/Build
+++ b/tools/perf/Build
@@ -46,10 +46,10 @@ CFLAGS_builtin-trace.o += -DSTRACE_GROUPS_DIR="BUILD_STR($(STRACE_GROUPS_DIR_
46CFLAGS_builtin-report.o += -DTIPDIR="BUILD_STR($(tipdir_SQ))" 46CFLAGS_builtin-report.o += -DTIPDIR="BUILD_STR($(tipdir_SQ))"
47CFLAGS_builtin-report.o += -DDOCDIR="BUILD_STR($(srcdir_SQ)/Documentation)" 47CFLAGS_builtin-report.o += -DDOCDIR="BUILD_STR($(srcdir_SQ)/Documentation)"
48 48
49libperf-y += util/ 49perf-y += util/
50libperf-y += arch/ 50perf-y += arch/
51libperf-y += ui/ 51perf-y += ui/
52libperf-y += scripts/ 52perf-y += scripts/
53libperf-$(CONFIG_TRACE) += trace/beauty/ 53perf-$(CONFIG_TRACE) += trace/beauty/
54 54
55gtk-y += ui/gtk/ 55gtk-y += ui/gtk/
diff --git a/tools/perf/Documentation/perf-record.txt b/tools/perf/Documentation/perf-record.txt
index 02b4aa2621e7..8f0c2be34848 100644
--- a/tools/perf/Documentation/perf-record.txt
+++ b/tools/perf/Documentation/perf-record.txt
@@ -454,6 +454,11 @@ Use <n> control blocks in asynchronous (Posix AIO) trace writing mode (default:
454Asynchronous mode is supported only when linking Perf tool with libc library 454Asynchronous mode is supported only when linking Perf tool with libc library
455providing implementation for Posix AIO API. 455providing implementation for Posix AIO API.
456 456
457--affinity=mode::
458Set affinity mask of trace reading thread according to the policy defined by 'mode' value:
459 node - thread affinity mask is set to NUMA node cpu mask of the processed mmap buffer
460 cpu - thread affinity mask is set to cpu of the processed mmap buffer
461
457--all-kernel:: 462--all-kernel::
458Configure all used events to run in kernel space. 463Configure all used events to run in kernel space.
459 464
diff --git a/tools/perf/Makefile.config b/tools/perf/Makefile.config
index b441c88cafa1..0f11d5891301 100644
--- a/tools/perf/Makefile.config
+++ b/tools/perf/Makefile.config
@@ -109,6 +109,13 @@ FEATURE_CHECK_LDFLAGS-libunwind = $(LIBUNWIND_LDFLAGS) $(LIBUNWIND_LIBS)
109FEATURE_CHECK_CFLAGS-libunwind-debug-frame = $(LIBUNWIND_CFLAGS) 109FEATURE_CHECK_CFLAGS-libunwind-debug-frame = $(LIBUNWIND_CFLAGS)
110FEATURE_CHECK_LDFLAGS-libunwind-debug-frame = $(LIBUNWIND_LDFLAGS) $(LIBUNWIND_LIBS) 110FEATURE_CHECK_LDFLAGS-libunwind-debug-frame = $(LIBUNWIND_LDFLAGS) $(LIBUNWIND_LIBS)
111 111
112FEATURE_CHECK_LDFLAGS-libunwind-arm = -lunwind -lunwind-arm
113FEATURE_CHECK_LDFLAGS-libunwind-aarch64 = -lunwind -lunwind-aarch64
114FEATURE_CHECK_LDFLAGS-libunwind-x86 = -lunwind -llzma -lunwind-x86
115FEATURE_CHECK_LDFLAGS-libunwind-x86_64 = -lunwind -llzma -lunwind-x86_64
116
117FEATURE_CHECK_LDFLAGS-libcrypto = -lcrypto
118
112ifdef CSINCLUDES 119ifdef CSINCLUDES
113 LIBOPENCSD_CFLAGS := -I$(CSINCLUDES) 120 LIBOPENCSD_CFLAGS := -I$(CSINCLUDES)
114endif 121endif
@@ -218,6 +225,8 @@ FEATURE_CHECK_LDFLAGS-libpython := $(PYTHON_EMBED_LDOPTS)
218FEATURE_CHECK_CFLAGS-libpython-version := $(PYTHON_EMBED_CCOPTS) 225FEATURE_CHECK_CFLAGS-libpython-version := $(PYTHON_EMBED_CCOPTS)
219FEATURE_CHECK_LDFLAGS-libpython-version := $(PYTHON_EMBED_LDOPTS) 226FEATURE_CHECK_LDFLAGS-libpython-version := $(PYTHON_EMBED_LDOPTS)
220 227
228FEATURE_CHECK_LDFLAGS-libaio = -lrt
229
221CFLAGS += -fno-omit-frame-pointer 230CFLAGS += -fno-omit-frame-pointer
222CFLAGS += -ggdb3 231CFLAGS += -ggdb3
223CFLAGS += -funwind-tables 232CFLAGS += -funwind-tables
@@ -386,7 +395,8 @@ ifeq ($(feature-setns), 1)
386 $(call detected,CONFIG_SETNS) 395 $(call detected,CONFIG_SETNS)
387endif 396endif
388 397
389ifndef NO_CORESIGHT 398ifdef CORESIGHT
399 $(call feature_check,libopencsd)
390 ifeq ($(feature-libopencsd), 1) 400 ifeq ($(feature-libopencsd), 1)
391 CFLAGS += -DHAVE_CSTRACE_SUPPORT $(LIBOPENCSD_CFLAGS) 401 CFLAGS += -DHAVE_CSTRACE_SUPPORT $(LIBOPENCSD_CFLAGS)
392 LDFLAGS += $(LIBOPENCSD_LDFLAGS) 402 LDFLAGS += $(LIBOPENCSD_LDFLAGS)
@@ -482,6 +492,7 @@ endif
482ifndef NO_LIBUNWIND 492ifndef NO_LIBUNWIND
483 have_libunwind := 493 have_libunwind :=
484 494
495 $(call feature_check,libunwind-x86)
485 ifeq ($(feature-libunwind-x86), 1) 496 ifeq ($(feature-libunwind-x86), 1)
486 $(call detected,CONFIG_LIBUNWIND_X86) 497 $(call detected,CONFIG_LIBUNWIND_X86)
487 CFLAGS += -DHAVE_LIBUNWIND_X86_SUPPORT 498 CFLAGS += -DHAVE_LIBUNWIND_X86_SUPPORT
@@ -490,6 +501,7 @@ ifndef NO_LIBUNWIND
490 have_libunwind = 1 501 have_libunwind = 1
491 endif 502 endif
492 503
504 $(call feature_check,libunwind-aarch64)
493 ifeq ($(feature-libunwind-aarch64), 1) 505 ifeq ($(feature-libunwind-aarch64), 1)
494 $(call detected,CONFIG_LIBUNWIND_AARCH64) 506 $(call detected,CONFIG_LIBUNWIND_AARCH64)
495 CFLAGS += -DHAVE_LIBUNWIND_AARCH64_SUPPORT 507 CFLAGS += -DHAVE_LIBUNWIND_AARCH64_SUPPORT
diff --git a/tools/perf/Makefile.perf b/tools/perf/Makefile.perf
index 09df1c8a4ec9..01f7555fd933 100644
--- a/tools/perf/Makefile.perf
+++ b/tools/perf/Makefile.perf
@@ -102,7 +102,7 @@ include ../scripts/utilities.mak
102# When selected, pass LLVM_CONFIG=/path/to/llvm-config to `make' if 102# When selected, pass LLVM_CONFIG=/path/to/llvm-config to `make' if
103# llvm-config is not in $PATH. 103# llvm-config is not in $PATH.
104# 104#
105# Define NO_CORESIGHT if you do not want support for CoreSight trace decoding. 105# Define CORESIGHT if you DO WANT support for CoreSight trace decoding.
106# 106#
107# Define NO_AIO if you do not want support of Posix AIO based trace 107# Define NO_AIO if you do not want support of Posix AIO based trace
108# streaming for record mode. Currently Posix AIO trace streaming is 108# streaming for record mode. Currently Posix AIO trace streaming is
@@ -344,9 +344,9 @@ endif
344 344
345export PERL_PATH 345export PERL_PATH
346 346
347LIB_FILE=$(OUTPUT)libperf.a 347LIBPERF_A=$(OUTPUT)libperf.a
348 348
349PERFLIBS = $(LIB_FILE) $(LIBAPI) $(LIBTRACEEVENT) $(LIBSUBCMD) 349PERFLIBS = $(LIBAPI) $(LIBTRACEEVENT) $(LIBSUBCMD)
350ifndef NO_LIBBPF 350ifndef NO_LIBBPF
351 PERFLIBS += $(LIBBPF) 351 PERFLIBS += $(LIBBPF)
352endif 352endif
@@ -549,6 +549,8 @@ JEVENTS_IN := $(OUTPUT)pmu-events/jevents-in.o
549 549
550PMU_EVENTS_IN := $(OUTPUT)pmu-events/pmu-events-in.o 550PMU_EVENTS_IN := $(OUTPUT)pmu-events/pmu-events-in.o
551 551
552LIBPERF_IN := $(OUTPUT)libperf-in.o
553
552export JEVENTS 554export JEVENTS
553 555
554build := -f $(srctree)/tools/build/Makefile.build dir=. obj 556build := -f $(srctree)/tools/build/Makefile.build dir=. obj
@@ -565,9 +567,12 @@ $(JEVENTS): $(JEVENTS_IN)
565$(PMU_EVENTS_IN): $(JEVENTS) FORCE 567$(PMU_EVENTS_IN): $(JEVENTS) FORCE
566 $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=pmu-events obj=pmu-events 568 $(Q)$(MAKE) -f $(srctree)/tools/build/Makefile.build dir=pmu-events obj=pmu-events
567 569
568$(OUTPUT)perf: $(PERFLIBS) $(PERF_IN) $(PMU_EVENTS_IN) $(LIBTRACEEVENT_DYNAMIC_LIST) 570$(LIBPERF_IN): prepare FORCE
571 $(Q)$(MAKE) $(build)=libperf
572
573$(OUTPUT)perf: $(PERFLIBS) $(PERF_IN) $(PMU_EVENTS_IN) $(LIBPERF_IN) $(LIBTRACEEVENT_DYNAMIC_LIST)
569 $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $(LIBTRACEEVENT_DYNAMIC_LIST_LDFLAGS) \ 574 $(QUIET_LINK)$(CC) $(CFLAGS) $(LDFLAGS) $(LIBTRACEEVENT_DYNAMIC_LIST_LDFLAGS) \
570 $(PERF_IN) $(PMU_EVENTS_IN) $(LIBS) -o $@ 575 $(PERF_IN) $(PMU_EVENTS_IN) $(LIBPERF_IN) $(LIBS) -o $@
571 576
572$(GTK_IN): FORCE 577$(GTK_IN): FORCE
573 $(Q)$(MAKE) $(build)=gtk 578 $(Q)$(MAKE) $(build)=gtk
@@ -683,12 +688,7 @@ endif
683 688
684$(patsubst perf-%,%.o,$(PROGRAMS)): $(wildcard */*.h) 689$(patsubst perf-%,%.o,$(PROGRAMS)): $(wildcard */*.h)
685 690
686LIBPERF_IN := $(OUTPUT)libperf-in.o 691$(LIBPERF_A): $(LIBPERF_IN)
687
688$(LIBPERF_IN): prepare FORCE
689 $(Q)$(MAKE) $(build)=libperf
690
691$(LIB_FILE): $(LIBPERF_IN)
692 $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(LIBPERF_IN) $(LIB_OBJS) 692 $(QUIET_AR)$(RM) $@ && $(AR) rcs $@ $(LIBPERF_IN) $(LIB_OBJS)
693 693
694LIBTRACEEVENT_FLAGS += plugin_dir=$(plugindir_SQ) 'EXTRA_CFLAGS=$(EXTRA_CFLAGS)' 'LDFLAGS=$(LDFLAGS)' 694LIBTRACEEVENT_FLAGS += plugin_dir=$(plugindir_SQ) 'EXTRA_CFLAGS=$(EXTRA_CFLAGS)' 'LDFLAGS=$(LDFLAGS)'
@@ -910,7 +910,7 @@ python-clean:
910 $(python-clean) 910 $(python-clean)
911 911
912clean:: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean $(LIBBPF)-clean $(LIBSUBCMD)-clean config-clean fixdep-clean python-clean 912clean:: $(LIBTRACEEVENT)-clean $(LIBAPI)-clean $(LIBBPF)-clean $(LIBSUBCMD)-clean config-clean fixdep-clean python-clean
913 $(call QUIET_CLEAN, core-objs) $(RM) $(LIB_FILE) $(OUTPUT)perf-archive $(OUTPUT)perf-with-kcore $(LANG_BINDINGS) 913 $(call QUIET_CLEAN, core-objs) $(RM) $(LIBPERF_A) $(OUTPUT)perf-archive $(OUTPUT)perf-with-kcore $(LANG_BINDINGS)
914 $(Q)find $(if $(OUTPUT),$(OUTPUT),.) -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete 914 $(Q)find $(if $(OUTPUT),$(OUTPUT),.) -name '*.o' -delete -o -name '\.*.cmd' -delete -o -name '\.*.d' -delete
915 $(Q)$(RM) $(OUTPUT).config-detected 915 $(Q)$(RM) $(OUTPUT).config-detected
916 $(call QUIET_CLEAN, core-progs) $(RM) $(ALL_PROGRAMS) perf perf-read-vdso32 perf-read-vdsox32 $(OUTPUT)pmu-events/jevents $(OUTPUT)$(LIBJVMTI).so 916 $(call QUIET_CLEAN, core-progs) $(RM) $(ALL_PROGRAMS) perf perf-read-vdso32 perf-read-vdsox32 $(OUTPUT)pmu-events/jevents $(OUTPUT)$(LIBJVMTI).so
diff --git a/tools/perf/arch/Build b/tools/perf/arch/Build
index d9b6af837c7d..688818844c11 100644
--- a/tools/perf/arch/Build
+++ b/tools/perf/arch/Build
@@ -1,2 +1,2 @@
1libperf-y += common.o 1perf-y += common.o
2libperf-y += $(SRCARCH)/ 2perf-y += $(SRCARCH)/
diff --git a/tools/perf/arch/arm/Build b/tools/perf/arch/arm/Build
index 41bf61da476a..36222e64bbf7 100644
--- a/tools/perf/arch/arm/Build
+++ b/tools/perf/arch/arm/Build
@@ -1,2 +1,2 @@
1libperf-y += util/ 1perf-y += util/
2libperf-$(CONFIG_DWARF_UNWIND) += tests/ 2perf-$(CONFIG_DWARF_UNWIND) += tests/
diff --git a/tools/perf/arch/arm/tests/Build b/tools/perf/arch/arm/tests/Build
index d9ae2733f9cc..bc8e97380c82 100644
--- a/tools/perf/arch/arm/tests/Build
+++ b/tools/perf/arch/arm/tests/Build
@@ -1,5 +1,5 @@
1libperf-y += regs_load.o 1perf-y += regs_load.o
2libperf-y += dwarf-unwind.o 2perf-y += dwarf-unwind.o
3libperf-y += vectors-page.o 3perf-y += vectors-page.o
4 4
5libperf-y += arch-tests.o 5perf-y += arch-tests.o
diff --git a/tools/perf/arch/arm/util/Build b/tools/perf/arch/arm/util/Build
index e64c5f216448..296f0eac5e18 100644
--- a/tools/perf/arch/arm/util/Build
+++ b/tools/perf/arch/arm/util/Build
@@ -1,6 +1,6 @@
1libperf-$(CONFIG_DWARF) += dwarf-regs.o 1perf-$(CONFIG_DWARF) += dwarf-regs.o
2 2
3libperf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o 3perf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o
4libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o 4perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
5 5
6libperf-$(CONFIG_AUXTRACE) += pmu.o auxtrace.o cs-etm.o 6perf-$(CONFIG_AUXTRACE) += pmu.o auxtrace.o cs-etm.o
diff --git a/tools/perf/arch/arm64/Build b/tools/perf/arch/arm64/Build
index 41bf61da476a..36222e64bbf7 100644
--- a/tools/perf/arch/arm64/Build
+++ b/tools/perf/arch/arm64/Build
@@ -1,2 +1,2 @@
1libperf-y += util/ 1perf-y += util/
2libperf-$(CONFIG_DWARF_UNWIND) += tests/ 2perf-$(CONFIG_DWARF_UNWIND) += tests/
diff --git a/tools/perf/arch/arm64/tests/Build b/tools/perf/arch/arm64/tests/Build
index 883c57ff0c08..41707fea74b3 100644
--- a/tools/perf/arch/arm64/tests/Build
+++ b/tools/perf/arch/arm64/tests/Build
@@ -1,4 +1,4 @@
1libperf-y += regs_load.o 1perf-y += regs_load.o
2libperf-y += dwarf-unwind.o 2perf-y += dwarf-unwind.o
3 3
4libperf-y += arch-tests.o 4perf-y += arch-tests.o
diff --git a/tools/perf/arch/arm64/util/Build b/tools/perf/arch/arm64/util/Build
index 68f8a8eb3ad0..3cde540d2fcf 100644
--- a/tools/perf/arch/arm64/util/Build
+++ b/tools/perf/arch/arm64/util/Build
@@ -1,10 +1,10 @@
1libperf-y += header.o 1perf-y += header.o
2libperf-y += sym-handling.o 2perf-y += sym-handling.o
3libperf-$(CONFIG_DWARF) += dwarf-regs.o 3perf-$(CONFIG_DWARF) += dwarf-regs.o
4libperf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o 4perf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o
5libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o 5perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
6 6
7libperf-$(CONFIG_AUXTRACE) += ../../arm/util/pmu.o \ 7perf-$(CONFIG_AUXTRACE) += ../../arm/util/pmu.o \
8 ../../arm/util/auxtrace.o \ 8 ../../arm/util/auxtrace.o \
9 ../../arm/util/cs-etm.o \ 9 ../../arm/util/cs-etm.o \
10 arm-spe.o 10 arm-spe.o
diff --git a/tools/perf/arch/nds32/Build b/tools/perf/arch/nds32/Build
index 54afe4a467e7..e4e5f33c84d8 100644
--- a/tools/perf/arch/nds32/Build
+++ b/tools/perf/arch/nds32/Build
@@ -1 +1 @@
libperf-y += util/ perf-y += util/
diff --git a/tools/perf/arch/nds32/util/Build b/tools/perf/arch/nds32/util/Build
index ca623bbf993c..d0bc205fe49a 100644
--- a/tools/perf/arch/nds32/util/Build
+++ b/tools/perf/arch/nds32/util/Build
@@ -1 +1 @@
libperf-y += header.o perf-y += header.o
diff --git a/tools/perf/arch/powerpc/Build b/tools/perf/arch/powerpc/Build
index db52fa22d3a1..a7dd46a5b678 100644
--- a/tools/perf/arch/powerpc/Build
+++ b/tools/perf/arch/powerpc/Build
@@ -1,2 +1,2 @@
1libperf-y += util/ 1perf-y += util/
2libperf-y += tests/ 2perf-y += tests/
diff --git a/tools/perf/arch/powerpc/tests/Build b/tools/perf/arch/powerpc/tests/Build
index d827ef384b33..3526ab0af9f9 100644
--- a/tools/perf/arch/powerpc/tests/Build
+++ b/tools/perf/arch/powerpc/tests/Build
@@ -1,4 +1,4 @@
1libperf-$(CONFIG_DWARF_UNWIND) += regs_load.o 1perf-$(CONFIG_DWARF_UNWIND) += regs_load.o
2libperf-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o 2perf-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o
3 3
4libperf-y += arch-tests.o 4perf-y += arch-tests.o
diff --git a/tools/perf/arch/powerpc/util/Build b/tools/perf/arch/powerpc/util/Build
index ba98bd006488..7cf0b8803097 100644
--- a/tools/perf/arch/powerpc/util/Build
+++ b/tools/perf/arch/powerpc/util/Build
@@ -1,11 +1,11 @@
1libperf-y += header.o 1perf-y += header.o
2libperf-y += sym-handling.o 2perf-y += sym-handling.o
3libperf-y += kvm-stat.o 3perf-y += kvm-stat.o
4libperf-y += perf_regs.o 4perf-y += perf_regs.o
5libperf-y += mem-events.o 5perf-y += mem-events.o
6 6
7libperf-$(CONFIG_DWARF) += dwarf-regs.o 7perf-$(CONFIG_DWARF) += dwarf-regs.o
8libperf-$(CONFIG_DWARF) += skip-callchain-idx.o 8perf-$(CONFIG_DWARF) += skip-callchain-idx.o
9 9
10libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o 10perf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o
11libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o 11perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
diff --git a/tools/perf/arch/s390/Build b/tools/perf/arch/s390/Build
index 54afe4a467e7..e4e5f33c84d8 100644
--- a/tools/perf/arch/s390/Build
+++ b/tools/perf/arch/s390/Build
@@ -1 +1 @@
libperf-y += util/ perf-y += util/
diff --git a/tools/perf/arch/s390/util/Build b/tools/perf/arch/s390/util/Build
index 4a233683c684..22797f043b84 100644
--- a/tools/perf/arch/s390/util/Build
+++ b/tools/perf/arch/s390/util/Build
@@ -1,9 +1,9 @@
1libperf-y += header.o 1perf-y += header.o
2libperf-y += kvm-stat.o 2perf-y += kvm-stat.o
3 3
4libperf-$(CONFIG_DWARF) += dwarf-regs.o 4perf-$(CONFIG_DWARF) += dwarf-regs.o
5libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o 5perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
6 6
7libperf-y += machine.o 7perf-y += machine.o
8 8
9libperf-$(CONFIG_AUXTRACE) += auxtrace.o 9perf-$(CONFIG_AUXTRACE) += auxtrace.o
diff --git a/tools/perf/arch/sh/Build b/tools/perf/arch/sh/Build
index 54afe4a467e7..e4e5f33c84d8 100644
--- a/tools/perf/arch/sh/Build
+++ b/tools/perf/arch/sh/Build
@@ -1 +1 @@
libperf-y += util/ perf-y += util/
diff --git a/tools/perf/arch/sh/util/Build b/tools/perf/arch/sh/util/Build
index 954e287bbb89..e813e618954b 100644
--- a/tools/perf/arch/sh/util/Build
+++ b/tools/perf/arch/sh/util/Build
@@ -1 +1 @@
libperf-$(CONFIG_DWARF) += dwarf-regs.o perf-$(CONFIG_DWARF) += dwarf-regs.o
diff --git a/tools/perf/arch/sparc/Build b/tools/perf/arch/sparc/Build
index 54afe4a467e7..e4e5f33c84d8 100644
--- a/tools/perf/arch/sparc/Build
+++ b/tools/perf/arch/sparc/Build
@@ -1 +1 @@
libperf-y += util/ perf-y += util/
diff --git a/tools/perf/arch/sparc/util/Build b/tools/perf/arch/sparc/util/Build
index 954e287bbb89..e813e618954b 100644
--- a/tools/perf/arch/sparc/util/Build
+++ b/tools/perf/arch/sparc/util/Build
@@ -1 +1 @@
libperf-$(CONFIG_DWARF) += dwarf-regs.o perf-$(CONFIG_DWARF) += dwarf-regs.o
diff --git a/tools/perf/arch/x86/Build b/tools/perf/arch/x86/Build
index db52fa22d3a1..a7dd46a5b678 100644
--- a/tools/perf/arch/x86/Build
+++ b/tools/perf/arch/x86/Build
@@ -1,2 +1,2 @@
1libperf-y += util/ 1perf-y += util/
2libperf-y += tests/ 2perf-y += tests/
diff --git a/tools/perf/arch/x86/tests/Build b/tools/perf/arch/x86/tests/Build
index 586849ff83a0..3d83d0c6982d 100644
--- a/tools/perf/arch/x86/tests/Build
+++ b/tools/perf/arch/x86/tests/Build
@@ -1,8 +1,8 @@
1libperf-$(CONFIG_DWARF_UNWIND) += regs_load.o 1perf-$(CONFIG_DWARF_UNWIND) += regs_load.o
2libperf-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o 2perf-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o
3 3
4libperf-y += arch-tests.o 4perf-y += arch-tests.o
5libperf-y += rdpmc.o 5perf-y += rdpmc.o
6libperf-y += perf-time-to-tsc.o 6perf-y += perf-time-to-tsc.o
7libperf-$(CONFIG_AUXTRACE) += insn-x86.o 7perf-$(CONFIG_AUXTRACE) += insn-x86.o
8libperf-$(CONFIG_X86_64) += bp-modify.o 8perf-$(CONFIG_X86_64) += bp-modify.o
diff --git a/tools/perf/arch/x86/util/Build b/tools/perf/arch/x86/util/Build
index 844b8f335532..7aab0be5fc5f 100644
--- a/tools/perf/arch/x86/util/Build
+++ b/tools/perf/arch/x86/util/Build
@@ -1,18 +1,18 @@
1libperf-y += header.o 1perf-y += header.o
2libperf-y += tsc.o 2perf-y += tsc.o
3libperf-y += pmu.o 3perf-y += pmu.o
4libperf-y += kvm-stat.o 4perf-y += kvm-stat.o
5libperf-y += perf_regs.o 5perf-y += perf_regs.o
6libperf-y += group.o 6perf-y += group.o
7libperf-y += machine.o 7perf-y += machine.o
8libperf-y += event.o 8perf-y += event.o
9 9
10libperf-$(CONFIG_DWARF) += dwarf-regs.o 10perf-$(CONFIG_DWARF) += dwarf-regs.o
11libperf-$(CONFIG_BPF_PROLOGUE) += dwarf-regs.o 11perf-$(CONFIG_BPF_PROLOGUE) += dwarf-regs.o
12 12
13libperf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o 13perf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind.o
14libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o 14perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
15 15
16libperf-$(CONFIG_AUXTRACE) += auxtrace.o 16perf-$(CONFIG_AUXTRACE) += auxtrace.o
17libperf-$(CONFIG_AUXTRACE) += intel-pt.o 17perf-$(CONFIG_AUXTRACE) += intel-pt.o
18libperf-$(CONFIG_AUXTRACE) += intel-bts.o 18perf-$(CONFIG_AUXTRACE) += intel-bts.o
diff --git a/tools/perf/arch/xtensa/Build b/tools/perf/arch/xtensa/Build
index 54afe4a467e7..e4e5f33c84d8 100644
--- a/tools/perf/arch/xtensa/Build
+++ b/tools/perf/arch/xtensa/Build
@@ -1 +1 @@
libperf-y += util/ perf-y += util/
diff --git a/tools/perf/arch/xtensa/util/Build b/tools/perf/arch/xtensa/util/Build
index 954e287bbb89..e813e618954b 100644
--- a/tools/perf/arch/xtensa/util/Build
+++ b/tools/perf/arch/xtensa/util/Build
@@ -1 +1 @@
libperf-$(CONFIG_DWARF) += dwarf-regs.o perf-$(CONFIG_DWARF) += dwarf-regs.o
diff --git a/tools/perf/builtin-list.c b/tools/perf/builtin-list.c
index ead221e49f00..c9f98d00c0e9 100644
--- a/tools/perf/builtin-list.c
+++ b/tools/perf/builtin-list.c
@@ -82,9 +82,9 @@ int cmd_list(int argc, const char **argv)
82 else if (strcmp(argv[i], "sdt") == 0) 82 else if (strcmp(argv[i], "sdt") == 0)
83 print_sdt_events(NULL, NULL, raw_dump); 83 print_sdt_events(NULL, NULL, raw_dump);
84 else if (strcmp(argv[i], "metric") == 0) 84 else if (strcmp(argv[i], "metric") == 0)
85 metricgroup__print(true, false, NULL, raw_dump); 85 metricgroup__print(true, false, NULL, raw_dump, details_flag);
86 else if (strcmp(argv[i], "metricgroup") == 0) 86 else if (strcmp(argv[i], "metricgroup") == 0)
87 metricgroup__print(false, true, NULL, raw_dump); 87 metricgroup__print(false, true, NULL, raw_dump, details_flag);
88 else if ((sep = strchr(argv[i], ':')) != NULL) { 88 else if ((sep = strchr(argv[i], ':')) != NULL) {
89 int sep_idx; 89 int sep_idx;
90 90
@@ -102,7 +102,7 @@ int cmd_list(int argc, const char **argv)
102 s[sep_idx] = '\0'; 102 s[sep_idx] = '\0';
103 print_tracepoint_events(s, s + sep_idx + 1, raw_dump); 103 print_tracepoint_events(s, s + sep_idx + 1, raw_dump);
104 print_sdt_events(s, s + sep_idx + 1, raw_dump); 104 print_sdt_events(s, s + sep_idx + 1, raw_dump);
105 metricgroup__print(true, true, s, raw_dump); 105 metricgroup__print(true, true, s, raw_dump, details_flag);
106 free(s); 106 free(s);
107 } else { 107 } else {
108 if (asprintf(&s, "*%s*", argv[i]) < 0) { 108 if (asprintf(&s, "*%s*", argv[i]) < 0) {
@@ -119,7 +119,7 @@ int cmd_list(int argc, const char **argv)
119 details_flag); 119 details_flag);
120 print_tracepoint_events(NULL, s, raw_dump); 120 print_tracepoint_events(NULL, s, raw_dump);
121 print_sdt_events(NULL, s, raw_dump); 121 print_sdt_events(NULL, s, raw_dump);
122 metricgroup__print(true, true, NULL, raw_dump); 122 metricgroup__print(true, true, NULL, raw_dump, details_flag);
123 free(s); 123 free(s);
124 } 124 }
125 } 125 }
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index 3fdfbaebd95e..6c3719ac901d 100644
--- a/tools/perf/builtin-record.c
+++ b/tools/perf/builtin-record.c
@@ -1656,6 +1656,21 @@ static int parse_clockid(const struct option *opt, const char *str, int unset)
1656 return -1; 1656 return -1;
1657} 1657}
1658 1658
1659static int record__parse_affinity(const struct option *opt, const char *str, int unset)
1660{
1661 struct record_opts *opts = (struct record_opts *)opt->value;
1662
1663 if (unset || !str)
1664 return 0;
1665
1666 if (!strcasecmp(str, "node"))
1667 opts->affinity = PERF_AFFINITY_NODE;
1668 else if (!strcasecmp(str, "cpu"))
1669 opts->affinity = PERF_AFFINITY_CPU;
1670
1671 return 0;
1672}
1673
1659static int record__parse_mmap_pages(const struct option *opt, 1674static int record__parse_mmap_pages(const struct option *opt,
1660 const char *str, 1675 const char *str,
1661 int unset __maybe_unused) 1676 int unset __maybe_unused)
@@ -1964,6 +1979,9 @@ static struct option __record_options[] = {
1964 &nr_cblocks_default, "n", "Use <n> control blocks in asynchronous trace writing mode (default: 1, max: 4)", 1979 &nr_cblocks_default, "n", "Use <n> control blocks in asynchronous trace writing mode (default: 1, max: 4)",
1965 record__aio_parse), 1980 record__aio_parse),
1966#endif 1981#endif
1982 OPT_CALLBACK(0, "affinity", &record.opts, "node|cpu",
1983 "Set affinity mask of trace reading thread to NUMA node cpu mask or cpu of processed mmap buffer",
1984 record__parse_affinity),
1967 OPT_END() 1985 OPT_END()
1968}; 1986};
1969 1987
diff --git a/tools/perf/builtin-trace.c b/tools/perf/builtin-trace.c
index b4e420c41831..68a01e624ad3 100644
--- a/tools/perf/builtin-trace.c
+++ b/tools/perf/builtin-trace.c
@@ -1041,6 +1041,9 @@ static const size_t trace__entry_str_size = 2048;
1041 1041
1042static struct file *thread_trace__files_entry(struct thread_trace *ttrace, int fd) 1042static struct file *thread_trace__files_entry(struct thread_trace *ttrace, int fd)
1043{ 1043{
1044 if (fd < 0)
1045 return NULL;
1046
1044 if (fd > ttrace->files.max) { 1047 if (fd > ttrace->files.max) {
1045 struct file *nfiles = realloc(ttrace->files.table, (fd + 1) * sizeof(struct file)); 1048 struct file *nfiles = realloc(ttrace->files.table, (fd + 1) * sizeof(struct file));
1046 1049
@@ -2768,7 +2771,8 @@ static int trace__set_filter_loop_pids(struct trace *trace)
2768 if (parent == NULL) 2771 if (parent == NULL)
2769 break; 2772 break;
2770 2773
2771 if (!strcmp(thread__comm_str(parent), "sshd")) { 2774 if (!strcmp(thread__comm_str(parent), "sshd") ||
2775 strstarts(thread__comm_str(parent), "gnome-terminal")) {
2772 pids[nr++] = parent->tid; 2776 pids[nr++] = parent->tid;
2773 break; 2777 break;
2774 } 2778 }
diff --git a/tools/perf/pmu-events/arch/powerpc/power8/metrics.json b/tools/perf/pmu-events/arch/powerpc/power8/metrics.json
new file mode 100644
index 000000000000..bffb2d4a6420
--- /dev/null
+++ b/tools/perf/pmu-events/arch/powerpc/power8/metrics.json
@@ -0,0 +1,2245 @@
1[
2 {
3 "BriefDescription": "% of finished branches that were treated as BC+8",
4 "MetricExpr": "PM_BR_BC_8_CONV / PM_BRU_FIN * 100",
5 "MetricGroup": "branch_prediction",
6 "MetricName": "bc_8_branch_ratio_percent"
7 },
8 {
9 "BriefDescription": "% of finished branches that were pairable but not treated as BC+8",
10 "MetricExpr": "PM_BR_BC_8 / PM_BRU_FIN * 100",
11 "MetricGroup": "branch_prediction",
12 "MetricName": "bc_8_not_converted_branch_ratio_percent"
13 },
14 {
15 "BriefDescription": "Percent of mispredicted branches out of all predicted (correctly and incorrectly) branches that completed",
16 "MetricExpr": "PM_BR_MPRED_CMPL / (PM_BR_PRED_BR0 + PM_BR_PRED_BR1) * 100",
17 "MetricGroup": "branch_prediction",
18 "MetricName": "br_misprediction_percent"
19 },
20 {
21 "BriefDescription": "% of Branch miss predictions per instruction",
22 "MetricExpr": "PM_BR_MPRED_CMPL / PM_RUN_INST_CMPL * 100",
23 "MetricGroup": "branch_prediction",
24 "MetricName": "branch_mispredict_rate_percent"
25 },
26 {
27 "BriefDescription": "Count cache branch misprediction per instruction",
28 "MetricExpr": "PM_BR_MPRED_CCACHE / PM_RUN_INST_CMPL * 100",
29 "MetricGroup": "branch_prediction",
30 "MetricName": "ccache_mispredict_rate_percent"
31 },
32 {
33 "BriefDescription": "Percent of count catch mispredictions out of all completed branches that required count cache predictionn",
34 "MetricExpr": "PM_BR_MPRED_CCACHE / (PM_BR_PRED_CCACHE_BR0 + PM_BR_PRED_CCACHE_BR1) * 100",
35 "MetricGroup": "branch_prediction",
36 "MetricName": "ccache_misprediction_percent"
37 },
38 {
39 "BriefDescription": "CR MisPredictions per Instruction",
40 "MetricExpr": "PM_BR_MPRED_CR / PM_RUN_INST_CMPL * 100",
41 "MetricGroup": "branch_prediction",
42 "MetricName": "cr_mispredict_rate_percent"
43 },
44 {
45 "BriefDescription": "Link stack branch misprediction",
46 "MetricExpr": "(PM_BR_MPRED_TA - PM_BR_MPRED_CCACHE) / PM_RUN_INST_CMPL * 100",
47 "MetricGroup": "branch_prediction",
48 "MetricName": "lstack_mispredict_rate_percent"
49 },
50 {
51 "BriefDescription": "Percent of link stack mispredictions out of all completed branches that required link stack prediction",
52 "MetricExpr": "(PM_BR_MPRED_TA - PM_BR_MPRED_CCACHE) / (PM_BR_PRED_LSTACK_BR0 + PM_BR_PRED_LSTACK_BR1) * 100",
53 "MetricGroup": "branch_prediction",
54 "MetricName": "lstack_misprediction_percent"
55 },
56 {
57 "BriefDescription": "TA MisPredictions per Instruction",
58 "MetricExpr": "PM_BR_MPRED_TA / PM_RUN_INST_CMPL * 100",
59 "MetricGroup": "branch_prediction",
60 "MetricName": "ta_mispredict_rate_percent"
61 },
62 {
63 "BriefDescription": "Percent of target address mispredictions out of all completed branches that required address prediction",
64 "MetricExpr": "PM_BR_MPRED_TA / (PM_BR_PRED_CCACHE_BR0 + PM_BR_PRED_CCACHE_BR1 + PM_BR_PRED_LSTACK_BR0 + PM_BR_PRED_LSTACK_BR1) * 100",
65 "MetricGroup": "branch_prediction",
66 "MetricName": "ta_misprediction_percent"
67 },
68 {
69 "BriefDescription": "Percent of branches completed that were taken",
70 "MetricExpr": "PM_BR_TAKEN_CMPL * 100 / PM_BR_CMPL",
71 "MetricGroup": "branch_prediction",
72 "MetricName": "taken_branches_percent"
73 },
74 {
75 "BriefDescription": "Percent of chip+group+sys pumps that were incorrectly predicted",
76 "MetricExpr": "PM_PUMP_MPRED * 100 / (PM_PUMP_CPRED + PM_PUMP_MPRED)",
77 "MetricGroup": "bus_stats",
78 "MetricName": "any_pump_mpred_percent"
79 },
80 {
81 "BriefDescription": "Percent of chip pumps that were correctly predicted as chip pumps the first time",
82 "MetricExpr": "PM_CHIP_PUMP_CPRED * 100 / PM_L2_CHIP_PUMP",
83 "MetricGroup": "bus_stats",
84 "MetricName": "chip_pump_cpred_percent"
85 },
86 {
87 "BriefDescription": "Percent of group pumps that were correctly predicted as group pumps the first time",
88 "MetricExpr": "PM_GRP_PUMP_CPRED * 100 / PM_L2_GROUP_PUMP",
89 "MetricGroup": "bus_stats",
90 "MetricName": "group_pump_cpred_percent"
91 },
92 {
93 "BriefDescription": "Percent of system pumps that were correctly predicted as group pumps the first time",
94 "MetricExpr": "PM_SYS_PUMP_CPRED * 100 / PM_L2_GROUP_PUMP",
95 "MetricGroup": "bus_stats",
96 "MetricName": "sys_pump_cpred_percent"
97 },
98 {
99 "BriefDescription": "Cycles stalled due to CRU or BRU operations",
100 "MetricExpr": "PM_CMPLU_STALL_BRU_CRU / PM_RUN_INST_CMPL",
101 "MetricGroup": "cpi_breakdown",
102 "MetricName": "bru_cru_stall_cpi"
103 },
104 {
105 "BriefDescription": "Cycles stalled due to ISU Branch Operations",
106 "MetricExpr": "PM_CMPLU_STALL_BRU / PM_RUN_INST_CMPL",
107 "MetricGroup": "cpi_breakdown",
108 "MetricName": "bru_stall_cpi"
109 },
110 {
111 "BriefDescription": "Cycles in which a Group Completed",
112 "MetricExpr": "PM_GRP_CMPL / PM_RUN_INST_CMPL",
113 "MetricGroup": "cpi_breakdown",
114 "MetricName": "completion_cpi"
115 },
116 {
117 "BriefDescription": "Cycles stalled by CO queue full",
118 "MetricExpr": "PM_CMPLU_STALL_COQ_FULL / PM_RUN_INST_CMPL",
119 "MetricGroup": "cpi_breakdown",
120 "MetricName": "coq_full_stall_cpi"
121 },
122 {
123 "BriefDescription": "Cycles stalled due to CRU Operations",
124 "MetricExpr": "(PM_CMPLU_STALL_BRU_CRU - PM_CMPLU_STALL_BRU) / PM_RUN_INST_CMPL",
125 "MetricGroup": "cpi_breakdown",
126 "MetricName": "cru_stall_cpi"
127 },
128 {
129 "BriefDescription": "Cycles stalled by flushes",
130 "MetricExpr": "PM_CMPLU_STALL_FLUSH / PM_RUN_INST_CMPL",
131 "MetricGroup": "cpi_breakdown",
132 "MetricName": "flush_stall_cpi"
133 },
134 {
135 "BriefDescription": "Cycles stalled by FXU Multi-Cycle Instructions",
136 "MetricExpr": "PM_CMPLU_STALL_FXLONG / PM_RUN_INST_CMPL",
137 "MetricGroup": "cpi_breakdown",
138 "MetricName": "fxu_multi_cyc_cpi"
139 },
140 {
141 "BriefDescription": "Cycles stalled by FXU",
142 "MetricExpr": "PM_CMPLU_STALL_FXU / PM_RUN_INST_CMPL",
143 "MetricGroup": "cpi_breakdown",
144 "MetricName": "fxu_stall_cpi"
145 },
146 {
147 "BriefDescription": "Other cycles stalled by FXU",
148 "MetricExpr": "(PM_CMPLU_STALL_FXU / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_FXLONG / PM_RUN_INST_CMPL)",
149 "MetricGroup": "cpi_breakdown",
150 "MetricName": "fxu_stall_other_cpi"
151 },
152 {
153 "BriefDescription": "Cycles GCT empty due to Branch Mispredicts",
154 "MetricExpr": "PM_GCT_NOSLOT_BR_MPRED / PM_RUN_INST_CMPL",
155 "MetricGroup": "cpi_breakdown",
156 "MetricName": "gct_empty_br_mpred_cpi"
157 },
158 {
159 "BriefDescription": "Cycles GCT empty due to Branch Mispredicts and Icache Misses",
160 "MetricExpr": "PM_GCT_NOSLOT_BR_MPRED_ICMISS / PM_RUN_INST_CMPL",
161 "MetricGroup": "cpi_breakdown",
162 "MetricName": "gct_empty_br_mpred_ic_miss_cpi"
163 },
164 {
165 "BriefDescription": "GCT empty cycles",
166 "MetricExpr": "PM_GCT_NOSLOT_CYC / PM_RUN_INST_CMPL",
167 "MetricGroup": "cpi_breakdown",
168 "MetricName": "gct_empty_cpi"
169 },
170 {
171 "BriefDescription": "Cycles GCT empty where dispatch was held",
172 "MetricExpr": "(PM_GCT_NOSLOT_DISP_HELD_MAP + PM_GCT_NOSLOT_DISP_HELD_SRQ + PM_GCT_NOSLOT_DISP_HELD_ISSQ + PM_GCT_NOSLOT_DISP_HELD_OTHER) / PM_RUN_INST_CMPL)",
173 "MetricGroup": "cpi_breakdown",
174 "MetricName": "gct_empty_disp_held_cpi"
175 },
176 {
177 "BriefDescription": "Cycles GCT empty where dispatch was held due to issue queue",
178 "MetricExpr": "PM_GCT_NOSLOT_DISP_HELD_ISSQ / PM_RUN_INST_CMPL",
179 "MetricGroup": "cpi_breakdown",
180 "MetricName": "gct_empty_disp_held_issq_cpi"
181 },
182 {
183 "BriefDescription": "Cycles GCT empty where dispatch was held due to maps",
184 "MetricExpr": "PM_GCT_NOSLOT_DISP_HELD_MAP / PM_RUN_INST_CMPL",
185 "MetricGroup": "cpi_breakdown",
186 "MetricName": "gct_empty_disp_held_map_cpi"
187 },
188 {
189 "BriefDescription": "Cycles GCT empty where dispatch was held due to syncs and other effects",
190 "MetricExpr": "PM_GCT_NOSLOT_DISP_HELD_OTHER / PM_RUN_INST_CMPL",
191 "MetricGroup": "cpi_breakdown",
192 "MetricName": "gct_empty_disp_held_other_cpi"
193 },
194 {
195 "BriefDescription": "Cycles GCT empty where dispatch was held due to SRQ",
196 "MetricExpr": "PM_GCT_NOSLOT_DISP_HELD_SRQ / PM_RUN_INST_CMPL",
197 "MetricGroup": "cpi_breakdown",
198 "MetricName": "gct_empty_disp_held_srq_cpi"
199 },
200 {
201 "BriefDescription": "Cycles stalled by GCT empty due to Icache misses",
202 "MetricExpr": "PM_GCT_NOSLOT_IC_MISS / PM_RUN_INST_CMPL",
203 "MetricGroup": "cpi_breakdown",
204 "MetricName": "gct_empty_ic_miss_cpi"
205 },
206 {
207 "BriefDescription": "Cycles stalled by GCT empty due to Icache misses that resolve in the local L2 or L3",
208 "MetricExpr": "(PM_GCT_NOSLOT_IC_MISS - PM_GCT_NOSLOT_IC_L3MISS) / PM_RUN_INST_CMPL",
209 "MetricGroup": "cpi_breakdown",
210 "MetricName": "gct_empty_ic_miss_l2l3_cpi"
211 },
212 {
213 "BriefDescription": "Cycles stalled by GCT empty due to Icache misses that resolve off-chip",
214 "MetricExpr": "PM_GCT_NOSLOT_IC_L3MISS / PM_RUN_INST_CMPL",
215 "MetricGroup": "cpi_breakdown",
216 "MetricName": "gct_empty_ic_miss_l3miss_cpi"
217 },
218 {
219 "BriefDescription": "Other GCT empty cycles",
220 "MetricExpr": "(PM_GCT_NOSLOT_CYC / PM_RUN_INST_CMPL) - (PM_GCT_NOSLOT_IC_MISS / PM_RUN_INST_CMPL) - (PM_GCT_NOSLOT_BR_MPRED / PM_RUN_INST_CMPL) - (PM_GCT_NOSLOT_BR_MPRED_ICMISS / PM_RUN_INST_CMPL) - ((PM_GCT_NOSLOT_DISP_HELD_MAP / PM_RUN_INST_CMPL) + (PM_GCT_NOSLOT_DISP_HELD_SRQ / PM_RUN_INST_CMPL) + (PM_GCT_NOSLOT_DISP_HELD_ISSQ / PM_RUN_INST_CMPL) + (PM_GCT_NOSLOT_DISP_HELD_OTHER / PM_RUN_INST_CMPL))",
221 "MetricGroup": "cpi_breakdown",
222 "MetricName": "gct_empty_other_cpi"
223 },
224 {
225 "BriefDescription": "Cycles stalled by heavyweight syncs",
226 "MetricExpr": "PM_CMPLU_STALL_HWSYNC / PM_RUN_INST_CMPL",
227 "MetricGroup": "cpi_breakdown",
228 "MetricName": "hwsync_stall_cpi"
229 },
230 {
231 "BriefDescription": "Cycles stalled by LSU",
232 "MetricExpr": "PM_CMPLU_STALL_LSU / PM_RUN_INST_CMPL",
233 "MetricGroup": "cpi_breakdown",
234 "MetricName": "lsu_stall_cpi"
235 },
236 {
237 "BriefDescription": "Cycles stalled by D-Cache Misses",
238 "MetricExpr": "PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL",
239 "MetricGroup": "cpi_breakdown",
240 "MetricName": "lsu_stall_dcache_miss_cpi"
241 },
242 {
243 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in distant interventions and memory",
244 "MetricExpr": "(PM_CMPLU_STALL_DMISS_L3MISS - PM_CMPLU_STALL_DMISS_LMEM - PM_CMPLU_STALL_DMISS_L21_L31 - PM_CMPLU_STALL_DMISS_REMOTE) / PM_RUN_INST_CMPL",
245 "MetricGroup": "cpi_breakdown",
246 "MetricName": "lsu_stall_dcache_miss_distant_cpi"
247 },
248 {
249 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in remote or distant caches",
250 "MetricExpr": "PM_CMPLU_STALL_DMISS_L21_L31 / PM_RUN_INST_CMPL",
251 "MetricGroup": "cpi_breakdown",
252 "MetricName": "lsu_stall_dcache_miss_l21l31_cpi"
253 },
254 {
255 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in the local L2 or L3, where there was a conflict",
256 "MetricExpr": "PM_CMPLU_STALL_DMISS_L2L3_CONFLICT / PM_RUN_INST_CMPL",
257 "MetricGroup": "cpi_breakdown",
258 "MetricName": "lsu_stall_dcache_miss_l2l3_conflict_cpi"
259 },
260 {
261 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in the local L2 or L3",
262 "MetricExpr": "PM_CMPLU_STALL_DMISS_L2L3 / PM_RUN_INST_CMPL",
263 "MetricGroup": "cpi_breakdown",
264 "MetricName": "lsu_stall_dcache_miss_l2l3_cpi"
265 },
266 {
267 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in the local L2 or L3, where there was no conflict",
268 "MetricExpr": "(PM_CMPLU_STALL_DMISS_L2L3 - PM_CMPLU_STALL_DMISS_L2L3_CONFLICT) / PM_RUN_INST_CMPL",
269 "MetricGroup": "cpi_breakdown",
270 "MetricName": "lsu_stall_dcache_miss_l2l3_noconflict_cpi"
271 },
272 {
273 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in other core's caches or memory",
274 "MetricExpr": "PM_CMPLU_STALL_DMISS_L3MISS / PM_RUN_INST_CMPL",
275 "MetricGroup": "cpi_breakdown",
276 "MetricName": "lsu_stall_dcache_miss_l3miss_cpi"
277 },
278 {
279 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in local memory or local L4",
280 "MetricExpr": "PM_CMPLU_STALL_DMISS_LMEM / PM_RUN_INST_CMPL",
281 "MetricGroup": "cpi_breakdown",
282 "MetricName": "lsu_stall_dcache_miss_lmem_cpi"
283 },
284 {
285 "BriefDescription": "Cycles stalled by D-Cache Misses that resolved in remote interventions and memory",
286 "MetricExpr": "PM_CMPLU_STALL_DMISS_REMOTE / PM_RUN_INST_CMPL",
287 "MetricGroup": "cpi_breakdown",
288 "MetricName": "lsu_stall_dcache_miss_remote_cpi"
289 },
290 {
291 "BriefDescription": "Cycles stalled by ERAT Translation rejects",
292 "MetricExpr": "PM_CMPLU_STALL_ERAT_MISS / PM_RUN_INST_CMPL",
293 "MetricGroup": "cpi_breakdown",
294 "MetricName": "lsu_stall_erat_miss_cpi"
295 },
296 {
297 "BriefDescription": "Cycles stalled by LSU load finishes",
298 "MetricExpr": "PM_CMPLU_STALL_LOAD_FINISH / PM_RUN_INST_CMPL",
299 "MetricGroup": "cpi_breakdown",
300 "MetricName": "lsu_stall_ld_fin_cpi"
301 },
302 {
303 "BriefDescription": "Cycles stalled by LHS rejects",
304 "MetricExpr": "PM_CMPLU_STALL_REJECT_LHS / PM_RUN_INST_CMPL",
305 "MetricGroup": "cpi_breakdown",
306 "MetricName": "lsu_stall_lhs_cpi"
307 },
308 {
309 "BriefDescription": "Cycles stalled by LMQ Full rejects",
310 "MetricExpr": "PM_CMPLU_STALL_REJ_LMQ_FULL / PM_RUN_INST_CMPL",
311 "MetricGroup": "cpi_breakdown",
312 "MetricName": "lsu_stall_lmq_full_cpi"
313 },
314 {
315 "BriefDescription": "Cycles stalled by Other LSU Operations",
316 "MetricExpr": "(PM_CMPLU_STALL_LSU / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_REJECT / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_STORE / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_LOAD_FINISH / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_ST_FWD / PM_RUN_INST_CMPL)",
317 "MetricGroup": "cpi_breakdown",
318 "MetricName": "lsu_stall_other_cpi"
319 },
320 {
321 "BriefDescription": "Cycles stalled by LSU Rejects",
322 "MetricExpr": "PM_CMPLU_STALL_REJECT / PM_RUN_INST_CMPL",
323 "MetricGroup": "cpi_breakdown",
324 "MetricName": "lsu_stall_reject_cpi"
325 },
326 {
327 "BriefDescription": "Cycles stalled by Other LSU Rejects",
328 "MetricExpr": "(PM_CMPLU_STALL_REJECT / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_REJECT_LHS / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_ERAT_MISS / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_REJ_LMQ_FULL / PM_RUN_INST_CMPL)",
329 "MetricGroup": "cpi_breakdown",
330 "MetricName": "lsu_stall_reject_other_cpi"
331 },
332 {
333 "BriefDescription": "Cycles stalled by LSU store forwarding",
334 "MetricExpr": "PM_CMPLU_STALL_ST_FWD / PM_RUN_INST_CMPL",
335 "MetricGroup": "cpi_breakdown",
336 "MetricName": "lsu_stall_st_fwd_cpi"
337 },
338 {
339 "BriefDescription": "Cycles stalled by LSU Stores",
340 "MetricExpr": "PM_CMPLU_STALL_STORE / PM_RUN_INST_CMPL",
341 "MetricGroup": "cpi_breakdown",
342 "MetricName": "lsu_stall_store_cpi"
343 },
344 {
345 "BriefDescription": "Cycles stalled by lightweight syncs",
346 "MetricExpr": "PM_CMPLU_STALL_LWSYNC / PM_RUN_INST_CMPL",
347 "MetricGroup": "cpi_breakdown",
348 "MetricName": "lwsync_stall_cpi"
349 },
350 {
351 "MetricExpr": "PM_CMPLU_STALL_MEM_ECC_DELAY / PM_RUN_INST_CMPL",
352 "MetricGroup": "cpi_breakdown",
353 "MetricName": "mem_ecc_delay_stall_cpi"
354 },
355 {
356 "BriefDescription": "Cycles stalled by nops (nothing next to finish)",
357 "MetricExpr": "PM_CMPLU_STALL_NO_NTF / PM_RUN_INST_CMPL",
358 "MetricGroup": "cpi_breakdown",
359 "MetricName": "no_ntf_stall_cpi"
360 },
361 {
362 "MetricExpr": "PM_NTCG_ALL_FIN / PM_RUN_INST_CMPL",
363 "MetricGroup": "cpi_breakdown",
364 "MetricName": "ntcg_all_fin_cpi"
365 },
366 {
367 "MetricExpr": "PM_CMPLU_STALL_NTCG_FLUSH / PM_RUN_INST_CMPL",
368 "MetricGroup": "cpi_breakdown",
369 "MetricName": "ntcg_flush_cpi"
370 },
371 {
372 "BriefDescription": "Other thread block stall cycles",
373 "MetricExpr": "(PM_CMPLU_STALL_THRD - PM_CMPLU_STALL_LWSYNC - PM_CMPLU_STALL_HWSYNC - PM_CMPLU_STALL_MEM_ECC_DELAY - PM_CMPLU_STALL_FLUSH - PM_CMPLU_STALL_COQ_FULL) / PM_RUN_INST_CMPL",
374 "MetricGroup": "cpi_breakdown",
375 "MetricName": "other_block_stall_cpi"
376 },
377 {
378 "BriefDescription": "Cycles unaccounted for",
379 "MetricExpr": "(PM_RUN_CYC / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL / PM_RUN_INST_CMPL) - (PM_GCT_NOSLOT_CYC / PM_RUN_INST_CMPL) - (PM_NTCG_ALL_FIN / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_THRD / PM_RUN_INST_CMPL) - (PM_GRP_CMPL / PM_RUN_INST_CMPL)",
380 "MetricGroup": "cpi_breakdown",
381 "MetricName": "other_cpi"
382 },
383 {
384 "BriefDescription": "Stall cycles unaccounted for",
385 "MetricExpr": "(PM_CMPLU_STALL / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_BRU_CRU / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_FXU / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_VSU / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_LSU / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_NTCG_FLUSH / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_NO_NTF / PM_RUN_INST_CMPL)",
386 "MetricGroup": "cpi_breakdown",
387 "MetricName": "other_stall_cpi"
388 },
389 {
390 "BriefDescription": "Run cycles per run instruction",
391 "MetricExpr": "PM_RUN_CYC / PM_RUN_INST_CMPL",
392 "MetricGroup": "cpi_breakdown",
393 "MetricName": "run_cpi"
394 },
395 {
396 "BriefDescription": "Completion Stall Cycles",
397 "MetricExpr": "PM_CMPLU_STALL / PM_RUN_INST_CMPL",
398 "MetricGroup": "cpi_breakdown",
399 "MetricName": "stall_cpi"
400 },
401 {
402 "BriefDescription": "Cycles a thread was blocked",
403 "MetricExpr": "PM_CMPLU_STALL_THRD / PM_RUN_INST_CMPL",
404 "MetricGroup": "cpi_breakdown",
405 "MetricName": "thread_block_stall_cpi"
406 },
407 {
408 "BriefDescription": "Cycles stalled by VSU",
409 "MetricExpr": "PM_CMPLU_STALL_VSU / PM_RUN_INST_CMPL",
410 "MetricGroup": "cpi_breakdown",
411 "MetricName": "vsu_stall_cpi"
412 },
413 {
414 "BriefDescription": "Cycles stalled by other VSU Operations",
415 "MetricExpr": "(PM_CMPLU_STALL_VSU - PM_CMPLU_STALL_VECTOR - PM_CMPLU_STALL_SCALAR) / PM_RUN_INST_CMPL",
416 "MetricGroup": "cpi_breakdown",
417 "MetricName": "vsu_stall_other_cpi"
418 },
419 {
420 "BriefDescription": "Cycles stalled by VSU Scalar Operations",
421 "MetricExpr": "PM_CMPLU_STALL_SCALAR / PM_RUN_INST_CMPL",
422 "MetricGroup": "cpi_breakdown",
423 "MetricName": "vsu_stall_scalar_cpi"
424 },
425 {
426 "BriefDescription": "Cycles stalled by VSU Scalar Long Operations",
427 "MetricExpr": "PM_CMPLU_STALL_SCALAR_LONG / PM_RUN_INST_CMPL",
428 "MetricGroup": "cpi_breakdown",
429 "MetricName": "vsu_stall_scalar_long_cpi"
430 },
431 {
432 "BriefDescription": "Cycles stalled by Other VSU Scalar Operations",
433 "MetricExpr": "(PM_CMPLU_STALL_SCALAR / PM_RUN_INST_CMPL) - (PM_CMPLU_STALL_SCALAR_LONG / PM_RUN_INST_CMPL)",
434 "MetricGroup": "cpi_breakdown",
435 "MetricName": "vsu_stall_scalar_other_cpi"
436 },
437 {
438 "BriefDescription": "Cycles stalled by VSU Vector Operations",
439 "MetricExpr": "PM_CMPLU_STALL_VECTOR / PM_RUN_INST_CMPL",
440 "MetricGroup": "cpi_breakdown",
441 "MetricName": "vsu_stall_vector_cpi"
442 },
443 {
444 "BriefDescription": "Cycles stalled by VSU Vector Long Operations",
445 "MetricExpr": "PM_CMPLU_STALL_VECTOR_LONG / PM_RUN_INST_CMPL",
446 "MetricGroup": "cpi_breakdown",
447 "MetricName": "vsu_stall_vector_long_cpi"
448 },
449 {
450 "BriefDescription": "Cycles stalled by other VSU Vector Operations",
451 "MetricExpr": "(PM_CMPLU_STALL_VECTOR - PM_CMPLU_STALL_VECTOR_LONG) / PM_RUN_INST_CMPL",
452 "MetricGroup": "cpi_breakdown",
453 "MetricName": "vsu_stall_vector_other_cpi"
454 },
455 {
456 "BriefDescription": "% of DL1 Reloads from Distant L2 or L3 (Modified) per Inst",
457 "MetricExpr": "PM_DATA_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
458 "MetricGroup": "dl1_reloads_percent_per_inst",
459 "MetricName": "dl1_reload_from_dl2l3_mod_rate_percent"
460 },
461 {
462 "BriefDescription": "% of DL1 Reloads from Distant L2 or L3 (Shared) per Inst",
463 "MetricExpr": "PM_DATA_FROM_DL2L3_SHR * 100 / PM_RUN_INST_CMPL",
464 "MetricGroup": "dl1_reloads_percent_per_inst",
465 "MetricName": "dl1_reload_from_dl2l3_shr_rate_percent"
466 },
467 {
468 "BriefDescription": "% of DL1 Reloads from Distant L4 per Inst",
469 "MetricExpr": "PM_DATA_FROM_DL4 * 100 / PM_RUN_INST_CMPL",
470 "MetricGroup": "dl1_reloads_percent_per_inst",
471 "MetricName": "dl1_reload_from_dl4_rate_percent"
472 },
473 {
474 "BriefDescription": "% of DL1 Reloads from Distant Memory per Inst",
475 "MetricExpr": "PM_DATA_FROM_DMEM * 100 / PM_RUN_INST_CMPL",
476 "MetricGroup": "dl1_reloads_percent_per_inst",
477 "MetricName": "dl1_reload_from_dmem_rate_percent"
478 },
479 {
480 "BriefDescription": "% of DL1 reloads from Private L2, other core per Inst",
481 "MetricExpr": "PM_DATA_FROM_L21_MOD * 100 / PM_RUN_INST_CMPL",
482 "MetricGroup": "dl1_reloads_percent_per_inst",
483 "MetricName": "dl1_reload_from_l21_mod_rate_percent"
484 },
485 {
486 "BriefDescription": "% of DL1 reloads from Private L2, other core per Inst",
487 "MetricExpr": "PM_DATA_FROM_L21_SHR * 100 / PM_RUN_INST_CMPL",
488 "MetricGroup": "dl1_reloads_percent_per_inst",
489 "MetricName": "dl1_reload_from_l21_shr_rate_percent"
490 },
491 {
492 "BriefDescription": "Percentage of L2 load hits per instruction where the L2 experienced a Load-Hit-Store conflict",
493 "MetricExpr": "PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST * 100 / PM_RUN_INST_CMPL",
494 "MetricGroup": "dl1_reloads_percent_per_inst",
495 "MetricName": "dl1_reload_from_l2_lhs_rate_percent"
496 },
497 {
498 "BriefDescription": "% of DL1 reloads from L2 per Inst",
499 "MetricExpr": "PM_DATA_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
500 "MetricGroup": "dl1_reloads_percent_per_inst",
501 "MetricName": "dl1_reload_from_l2_miss_rate_percent"
502 },
503 {
504 "BriefDescription": "Percentage of L2 load hits per instruction where the L2 did not experience a conflict",
505 "MetricExpr": "PM_DATA_FROM_L2_NO_CONFLICT * 100 / PM_RUN_INST_CMPL",
506 "MetricGroup": "dl1_reloads_percent_per_inst",
507 "MetricName": "dl1_reload_from_l2_no_conflict_rate_percent"
508 },
509 {
510 "BriefDescription": "Percentage of L2 load hits per instruction where the L2 experienced some conflict other than Load-Hit-Store",
511 "MetricExpr": "PM_DATA_FROM_L2_DISP_CONFLICT_OTHER * 100 / PM_RUN_INST_CMPL",
512 "MetricGroup": "dl1_reloads_percent_per_inst",
513 "MetricName": "dl1_reload_from_l2_other_conflict_rate_percent"
514 },
515 {
516 "BriefDescription": "% of DL1 reloads from L2 per Inst",
517 "MetricExpr": "PM_DATA_FROM_L2 * 100 / PM_RUN_INST_CMPL",
518 "MetricGroup": "dl1_reloads_percent_per_inst",
519 "MetricName": "dl1_reload_from_l2_rate_percent"
520 },
521 {
522 "BriefDescription": "% of DL1 reloads from Private L3 M state, other core per Inst",
523 "MetricExpr": "PM_DATA_FROM_L31_MOD * 100 / PM_RUN_INST_CMPL",
524 "MetricGroup": "dl1_reloads_percent_per_inst",
525 "MetricName": "dl1_reload_from_l31_mod_rate_percent"
526 },
527 {
528 "BriefDescription": "% of DL1 reloads from Private L3 S tate, other core per Inst",
529 "MetricExpr": "PM_DATA_FROM_L31_SHR * 100 / PM_RUN_INST_CMPL",
530 "MetricGroup": "dl1_reloads_percent_per_inst",
531 "MetricName": "dl1_reload_from_l31_shr_rate_percent"
532 },
533 {
534 "BriefDescription": "Percentage of L3 load hits per instruction where the load collided with a pending prefetch",
535 "MetricExpr": "PM_DATA_FROM_L3_DISP_CONFLICT * 100 / PM_RUN_INST_CMPL",
536 "MetricGroup": "dl1_reloads_percent_per_inst",
537 "MetricName": "dl1_reload_from_l3_conflict_rate_percent"
538 },
539 {
540 "BriefDescription": "% of DL1 reloads from L3 per Inst",
541 "MetricExpr": "PM_DATA_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
542 "MetricGroup": "dl1_reloads_percent_per_inst",
543 "MetricName": "dl1_reload_from_l3_miss_rate_percent"
544 },
545 {
546 "BriefDescription": "Percentage of L3 load hits per instruction where the L3 did not experience a conflict",
547 "MetricExpr": "PM_DATA_FROM_L3_NO_CONFLICT * 100 / PM_RUN_INST_CMPL",
548 "MetricGroup": "dl1_reloads_percent_per_inst",
549 "MetricName": "dl1_reload_from_l3_no_conflict_rate_percent"
550 },
551 {
552 "BriefDescription": "% of DL1 Reloads from L3 per Inst",
553 "MetricExpr": "PM_DATA_FROM_L3 * 100 / PM_RUN_INST_CMPL",
554 "MetricGroup": "dl1_reloads_percent_per_inst",
555 "MetricName": "dl1_reload_from_l3_rate_percent"
556 },
557 {
558 "BriefDescription": "% of DL1 Reloads from Local L4 per Inst",
559 "MetricExpr": "PM_DATA_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
560 "MetricGroup": "dl1_reloads_percent_per_inst",
561 "MetricName": "dl1_reload_from_ll4_rate_percent"
562 },
563 {
564 "BriefDescription": "% of DL1 Reloads from Local Memory per Inst",
565 "MetricExpr": "PM_DATA_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
566 "MetricGroup": "dl1_reloads_percent_per_inst",
567 "MetricName": "dl1_reload_from_lmem_rate_percent"
568 },
569 {
570 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
571 "MetricExpr": "PM_DATA_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
572 "MetricGroup": "dl1_reloads_percent_per_inst",
573 "MetricName": "dl1_reload_from_rl2l3_mod_rate_percent"
574 },
575 {
576 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
577 "MetricExpr": "PM_DATA_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
578 "MetricGroup": "dl1_reloads_percent_per_inst",
579 "MetricName": "dl1_reload_from_rl2l3_shr_rate_percent"
580 },
581 {
582 "BriefDescription": "% of DL1 Reloads from Remote Memory per Inst",
583 "MetricExpr": "PM_DATA_FROM_RL4 * 100 / PM_RUN_INST_CMPL",
584 "MetricGroup": "dl1_reloads_percent_per_inst",
585 "MetricName": "dl1_reload_from_rl4_rate_percent"
586 },
587 {
588 "BriefDescription": "% of DL1 Reloads from Remote Memory per Inst",
589 "MetricExpr": "PM_DATA_FROM_RMEM * 100 / PM_RUN_INST_CMPL",
590 "MetricGroup": "dl1_reloads_percent_per_inst",
591 "MetricName": "dl1_reload_from_rmem_rate_percent"
592 },
593 {
594 "BriefDescription": "Percentage of L1 demand load misses per run instruction",
595 "MetricExpr": "PM_LD_MISS_L1 * 100 / PM_RUN_INST_CMPL",
596 "MetricGroup": "dl1_reloads_percent_per_inst",
597 "MetricName": "l1_ld_miss_rate_percent"
598 },
599 {
600 "BriefDescription": "% of DL1 misses that result in a cache reload",
601 "MetricExpr": "PM_L1_DCACHE_RELOAD_VALID * 100 / PM_LD_MISS_L1",
602 "MetricGroup": "dl1_reloads_percent_per_ref",
603 "MetricName": "dl1_miss_reloads_percent"
604 },
605 {
606 "BriefDescription": "% of DL1 dL1_Reloads from Distant L2 or L3 (Modified)",
607 "MetricExpr": "PM_DATA_FROM_DL2L3_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
608 "MetricGroup": "dl1_reloads_percent_per_ref",
609 "MetricName": "dl1_reload_from_dl2l3_mod_percent"
610 },
611 {
612 "BriefDescription": "% of DL1 dL1_Reloads from Distant L2 or L3 (Shared)",
613 "MetricExpr": "PM_DATA_FROM_DL2L3_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
614 "MetricGroup": "dl1_reloads_percent_per_ref",
615 "MetricName": "dl1_reload_from_dl2l3_shr_percent"
616 },
617 {
618 "BriefDescription": "% of DL1 dL1_Reloads from Distant L4",
619 "MetricExpr": "PM_DATA_FROM_DL4 * 100 / PM_L1_DCACHE_RELOAD_VALID",
620 "MetricGroup": "dl1_reloads_percent_per_ref",
621 "MetricName": "dl1_reload_from_dl4_percent"
622 },
623 {
624 "BriefDescription": "% of DL1 dL1_Reloads from Distant Memory",
625 "MetricExpr": "PM_DATA_FROM_DMEM * 100 / PM_L1_DCACHE_RELOAD_VALID",
626 "MetricGroup": "dl1_reloads_percent_per_ref",
627 "MetricName": "dl1_reload_from_dmem_percent"
628 },
629 {
630 "BriefDescription": "% of DL1 reloads from Private L2, other core",
631 "MetricExpr": "PM_DATA_FROM_L21_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
632 "MetricGroup": "dl1_reloads_percent_per_ref",
633 "MetricName": "dl1_reload_from_l21_mod_percent"
634 },
635 {
636 "BriefDescription": "% of DL1 reloads from Private L2, other core",
637 "MetricExpr": "PM_DATA_FROM_L21_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
638 "MetricGroup": "dl1_reloads_percent_per_ref",
639 "MetricName": "dl1_reload_from_l21_shr_percent"
640 },
641 {
642 "BriefDescription": "Percentage of DL1 reloads from L2 with a Load-Hit-Store conflict",
643 "MetricExpr": "PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST * 100 / PM_L1_DCACHE_RELOAD_VALID",
644 "MetricGroup": "dl1_reloads_percent_per_ref",
645 "MetricName": "dl1_reload_from_l2_lhs_percent"
646 },
647 {
648 "BriefDescription": "Percentage of DL1 reloads from L2 with no conflicts",
649 "MetricExpr": "PM_DATA_FROM_L2_NO_CONFLICT * 100 / PM_L1_DCACHE_RELOAD_VALID",
650 "MetricGroup": "dl1_reloads_percent_per_ref",
651 "MetricName": "dl1_reload_from_l2_no_conflict_percent"
652 },
653 {
654 "BriefDescription": "Percentage of DL1 reloads from L2 with some conflict other than Load-Hit-Store",
655 "MetricExpr": "PM_DATA_FROM_L2_DISP_CONFLICT_OTHER * 100 / PM_L1_DCACHE_RELOAD_VALID",
656 "MetricGroup": "dl1_reloads_percent_per_ref",
657 "MetricName": "dl1_reload_from_l2_other_conflict_percent"
658 },
659 {
660 "BriefDescription": "% of DL1 reloads from L2",
661 "MetricExpr": "PM_DATA_FROM_L2 * 100 / PM_L1_DCACHE_RELOAD_VALID",
662 "MetricGroup": "dl1_reloads_percent_per_ref",
663 "MetricName": "dl1_reload_from_l2_percent"
664 },
665 {
666 "BriefDescription": "% of DL1 reloads from Private L3, other core",
667 "MetricExpr": "PM_DATA_FROM_L31_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
668 "MetricGroup": "dl1_reloads_percent_per_ref",
669 "MetricName": "dl1_reload_from_l31_mod_percent"
670 },
671 {
672 "BriefDescription": "% of DL1 reloads from Private L3, other core",
673 "MetricExpr": "PM_DATA_FROM_L31_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
674 "MetricGroup": "dl1_reloads_percent_per_ref",
675 "MetricName": "dl1_reload_from_l31_shr_percent"
676 },
677 {
678 "BriefDescription": "Percentage of DL1 reloads from L3 where the load collided with a pending prefetch",
679 "MetricExpr": "PM_DATA_FROM_L3_DISP_CONFLICT * 100 / PM_L1_DCACHE_RELOAD_VALID",
680 "MetricGroup": "dl1_reloads_percent_per_ref",
681 "MetricName": "dl1_reload_from_l3_conflict_percent"
682 },
683 {
684 "BriefDescription": "Percentage of L3 load hits per instruction where the line was brought into the L3 by a prefetch operation",
685 "MetricExpr": "PM_DATA_FROM_L3_MEPF * 100 / PM_RUN_INST_CMPL",
686 "MetricGroup": "dl1_reloads_percent_per_ref",
687 "MetricName": "dl1_reload_from_l3_mepf_rate_percent"
688 },
689 {
690 "BriefDescription": "Percentage of DL1 reloads from L3 without conflicts",
691 "MetricExpr": "PM_DATA_FROM_L3_NO_CONFLICT * 100 / PM_L1_DCACHE_RELOAD_VALID",
692 "MetricGroup": "dl1_reloads_percent_per_ref",
693 "MetricName": "dl1_reload_from_l3_no_conflict_percent"
694 },
695 {
696 "BriefDescription": "% of DL1 Reloads from L3",
697 "MetricExpr": "PM_DATA_FROM_L3 * 100 / PM_L1_DCACHE_RELOAD_VALID",
698 "MetricGroup": "dl1_reloads_percent_per_ref",
699 "MetricName": "dl1_reload_from_l3_percent"
700 },
701 {
702 "BriefDescription": "% of DL1 dL1_Reloads from Local L4",
703 "MetricExpr": "PM_DATA_FROM_LL4 * 100 / PM_L1_DCACHE_RELOAD_VALID",
704 "MetricGroup": "dl1_reloads_percent_per_ref",
705 "MetricName": "dl1_reload_from_ll4_percent"
706 },
707 {
708 "BriefDescription": "% of DL1 dL1_Reloads from Local Memory",
709 "MetricExpr": "PM_DATA_FROM_LMEM * 100 / PM_L1_DCACHE_RELOAD_VALID",
710 "MetricGroup": "dl1_reloads_percent_per_ref",
711 "MetricName": "dl1_reload_from_lmem_percent"
712 },
713 {
714 "BriefDescription": "% of DL1 dL1_Reloads from Remote L2 or L3 (Modified)",
715 "MetricExpr": "PM_DATA_FROM_RL2L3_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
716 "MetricGroup": "dl1_reloads_percent_per_ref",
717 "MetricName": "dl1_reload_from_rl2l3_mod_percent"
718 },
719 {
720 "BriefDescription": "% of DL1 dL1_Reloads from Remote L2 or L3 (Shared)",
721 "MetricExpr": "PM_DATA_FROM_RL2L3_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
722 "MetricGroup": "dl1_reloads_percent_per_ref",
723 "MetricName": "dl1_reload_from_rl2l3_shr_percent"
724 },
725 {
726 "BriefDescription": "% of DL1 dL1_Reloads from Remote L4",
727 "MetricExpr": "PM_DATA_FROM_RL4 * 100 / PM_L1_DCACHE_RELOAD_VALID",
728 "MetricGroup": "dl1_reloads_percent_per_ref",
729 "MetricName": "dl1_reload_from_rl4_percent"
730 },
731 {
732 "BriefDescription": "% of DL1 dL1_Reloads from Remote Memory",
733 "MetricExpr": "PM_DATA_FROM_RMEM * 100 / PM_L1_DCACHE_RELOAD_VALID",
734 "MetricGroup": "dl1_reloads_percent_per_ref",
735 "MetricName": "dl1_reload_from_rmem_percent"
736 },
737 {
738 "BriefDescription": "dL1 miss portion of CPI",
739 "MetricExpr": "( (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)/ (PM_RUN_CYC / PM_RUN_INST_CMPL)) * 100",
740 "MetricGroup": "estimated_dcache_miss_cpi",
741 "MetricName": "dcache_miss_cpi_percent"
742 },
743 {
744 "BriefDescription": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache miss cpi",
745 "MetricExpr": "(((PM_DATA_FROM_DL2L3_MOD / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_DL2L3_MOD_CYC/ PM_MRK_DATA_FROM_DL2L3_MOD)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
746 "MetricGroup": "estimated_dcache_miss_cpi",
747 "MetricName": "dl2l3_mod_cpi_percent"
748 },
749 {
750 "BriefDescription": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache miss cpi",
751 "MetricExpr": "(((PM_DATA_FROM_DL2L3_SHR / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_DL2L3_SHR_CYC/ PM_MRK_DATA_FROM_DL2L3_SHR)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
752 "MetricGroup": "estimated_dcache_miss_cpi",
753 "MetricName": "dl2l3_shr_cpi_percent"
754 },
755 {
756 "BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache miss cpi",
757 "MetricExpr": "(((PM_DATA_FROM_DL4 / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_DL4_CYC/ PM_MRK_DATA_FROM_DL4)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
758 "MetricGroup": "estimated_dcache_miss_cpi",
759 "MetricName": "dl4_cpi_percent"
760 },
761 {
762 "BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dcache miss cpi",
763 "MetricExpr": "(((PM_DATA_FROM_DMEM / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_DMEM_CYC/ PM_MRK_DATA_FROM_DMEM)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
764 "MetricGroup": "estimated_dcache_miss_cpi",
765 "MetricName": "dmem_cpi_percent"
766 },
767 {
768 "BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache miss cpi",
769 "MetricExpr": "(((PM_DATA_FROM_L21_MOD / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_L21_MOD_CYC/ PM_MRK_DATA_FROM_L21_MOD)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
770 "MetricGroup": "estimated_dcache_miss_cpi",
771 "MetricName": "l21_mod_cpi_percent"
772 },
773 {
774 "BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache miss cpi",
775 "MetricExpr": "(((PM_DATA_FROM_L21_SHR / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_L21_SHR_CYC/ PM_MRK_DATA_FROM_L21_SHR)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
776 "MetricGroup": "estimated_dcache_miss_cpi",
777 "MetricName": "l21_shr_cpi_percent"
778 },
779 {
780 "BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi",
781 "MetricExpr": "(((PM_DATA_FROM_L2 / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_L2_CYC/ PM_MRK_DATA_FROM_L2)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL) ) *100",
782 "MetricGroup": "estimated_dcache_miss_cpi",
783 "MetricName": "l2_cpi_percent"
784 },
785 {
786 "BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache miss cpi",
787 "MetricExpr": "(((PM_DATA_FROM_L31_MOD / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_L31_MOD_CYC/ PM_MRK_DATA_FROM_L31_MOD)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
788 "MetricGroup": "estimated_dcache_miss_cpi",
789 "MetricName": "l31_mod_cpi_percent"
790 },
791 {
792 "BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache miss cpi",
793 "MetricExpr": "(((PM_DATA_FROM_L31_SHR / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_L31_SHR_CYC/ PM_MRK_DATA_FROM_L31_SHR)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
794 "MetricGroup": "estimated_dcache_miss_cpi",
795 "MetricName": "l31_shr_cpi_percent"
796 },
797 {
798 "BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi",
799 "MetricExpr": "(((PM_DATA_FROM_L3 / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_L3_CYC/ PM_MRK_DATA_FROM_L3)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) * 100",
800 "MetricGroup": "estimated_dcache_miss_cpi",
801 "MetricName": "l3_cpi_percent"
802 },
803 {
804 "BriefDescription": "estimate of Local L4 miss rates with measured LL4 latency as a %of dcache miss cpi",
805 "MetricExpr": "(((PM_DATA_FROM_LL4 / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_LL4_CYC/ PM_MRK_DATA_FROM_LL4)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
806 "MetricGroup": "estimated_dcache_miss_cpi",
807 "MetricName": "ll4_cpi_percent"
808 },
809 {
810 "BriefDescription": "estimate of Local memory miss rates with measured LMEM latency as a %of dcache miss cpi",
811 "MetricExpr": "(((PM_DATA_FROM_LMEM / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_LMEM_CYC/ PM_MRK_DATA_FROM_LMEM)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
812 "MetricGroup": "estimated_dcache_miss_cpi",
813 "MetricName": "lmem_cpi_percent"
814 },
815 {
816 "BriefDescription": "estimate of dl2l3 remote MOD miss rates with measured RL2L3 MOD latency as a %of dcache miss cpi",
817 "MetricExpr": "(((PM_DATA_FROM_RL2L3_MOD / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_RL2L3_MOD_CYC/ PM_MRK_DATA_FROM_RL2L3_MOD)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
818 "MetricGroup": "estimated_dcache_miss_cpi",
819 "MetricName": "rl2l3_mod_cpi_percent"
820 },
821 {
822 "BriefDescription": "estimate of dl2l3 shared miss rates with measured RL2L3 SHR latency as a %of dcache miss cpi",
823 "MetricExpr": "(((PM_DATA_FROM_RL2L3_SHR / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_RL2L3_SHR_CYC/ PM_MRK_DATA_FROM_RL2L3_SHR)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) * 100",
824 "MetricGroup": "estimated_dcache_miss_cpi",
825 "MetricName": "rl2l3_shr_cpi_percent"
826 },
827 {
828 "BriefDescription": "estimate of remote L4 miss rates with measured RL4 latency as a %of dcache miss cpi",
829 "MetricExpr": "(((PM_DATA_FROM_RL4 / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_RL4_CYC/ PM_MRK_DATA_FROM_RL4)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
830 "MetricGroup": "estimated_dcache_miss_cpi",
831 "MetricName": "rl4_cpi_percent"
832 },
833 {
834 "BriefDescription": "estimate of remote memory miss rates with measured RMEM latency as a %of dcache miss cpi",
835 "MetricExpr": "(((PM_DATA_FROM_RMEM / PM_RUN_INST_CMPL) * (PM_MRK_DATA_FROM_RMEM_CYC/ PM_MRK_DATA_FROM_RMEM)) / (PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL)) *100",
836 "MetricGroup": "estimated_dcache_miss_cpi",
837 "MetricName": "rmem_cpi_percent"
838 },
839 {
840 "BriefDescription": "Branch Mispredict flushes per instruction",
841 "MetricExpr": "PM_FLUSH_BR_MPRED / PM_RUN_INST_CMPL * 100",
842 "MetricGroup": "general",
843 "MetricName": "br_mpred_flush_rate_percent"
844 },
845 {
846 "BriefDescription": "Cycles per instruction",
847 "MetricExpr": "PM_CYC / PM_INST_CMPL",
848 "MetricGroup": "general",
849 "MetricName": "cpi"
850 },
851 {
852 "BriefDescription": "Percentage Cycles a group completed",
853 "MetricExpr": "PM_GRP_CMPL / PM_CYC * 100",
854 "MetricGroup": "general",
855 "MetricName": "cyc_grp_completed_percent"
856 },
857 {
858 "BriefDescription": "Percentage Cycles a group dispatched",
859 "MetricExpr": "PM_1PLUS_PPC_DISP / PM_CYC * 100",
860 "MetricGroup": "general",
861 "MetricName": "cyc_grp_dispatched_percent"
862 },
863 {
864 "BriefDescription": "Cycles per group",
865 "MetricExpr": "PM_CYC / PM_1PLUS_PPC_CMPL",
866 "MetricGroup": "general",
867 "MetricName": "cyc_per_group"
868 },
869 {
870 "BriefDescription": "GCT empty cycles",
871 "MetricExpr": "(PM_FLUSH_DISP / PM_RUN_INST_CMPL) * 100",
872 "MetricGroup": "general",
873 "MetricName": "disp_flush_rate_percent"
874 },
875 {
876 "BriefDescription": "% DTLB miss rate per inst",
877 "MetricExpr": "PM_DTLB_MISS / PM_RUN_INST_CMPL *100",
878 "MetricGroup": "general",
879 "MetricName": "dtlb_miss_rate_percent"
880 },
881 {
882 "BriefDescription": "Flush rate (%)",
883 "MetricExpr": "PM_FLUSH * 100 / PM_RUN_INST_CMPL",
884 "MetricGroup": "general",
885 "MetricName": "flush_rate_percent"
886 },
887 {
888 "BriefDescription": "GCT slot utilization (11 to 14) as a % of cycles this thread had atleast 1 slot valid",
889 "MetricExpr": "PM_GCT_UTIL_11_14_ENTRIES / ( PM_RUN_CYC - PM_GCT_NOSLOT_CYC) * 100",
890 "MetricGroup": "general",
891 "MetricName": "gct_util_11to14_slots_percent"
892 },
893 {
894 "BriefDescription": "GCT slot utilization (15 to 17) as a % of cycles this thread had atleast 1 slot valid",
895 "MetricExpr": "PM_GCT_UTIL_15_17_ENTRIES / ( PM_RUN_CYC - PM_GCT_NOSLOT_CYC) * 100",
896 "MetricGroup": "general",
897 "MetricName": "gct_util_15to17_slots_percent"
898 },
899 {
900 "BriefDescription": "GCT slot utilization 18+ as a % of cycles this thread had atleast 1 slot valid",
901 "MetricExpr": "PM_GCT_UTIL_18_ENTRIES / ( PM_RUN_CYC - PM_GCT_NOSLOT_CYC) * 100",
902 "MetricGroup": "general",
903 "MetricName": "gct_util_18plus_slots_percent"
904 },
905 {
906 "BriefDescription": "GCT slot utilization (1 to 2) as a % of cycles this thread had atleast 1 slot valid",
907 "MetricExpr": "PM_GCT_UTIL_1_2_ENTRIES / ( PM_RUN_CYC - PM_GCT_NOSLOT_CYC) * 100",
908 "MetricGroup": "general",
909 "MetricName": "gct_util_1to2_slots_percent"
910 },
911 {
912 "BriefDescription": "GCT slot utilization (3 to 6) as a % of cycles this thread had atleast 1 slot valid",
913 "MetricExpr": "PM_GCT_UTIL_3_6_ENTRIES / ( PM_RUN_CYC - PM_GCT_NOSLOT_CYC) * 100",
914 "MetricGroup": "general",
915 "MetricName": "gct_util_3to6_slots_percent"
916 },
917 {
918 "BriefDescription": "GCT slot utilization (7 to 10) as a % of cycles this thread had atleast 1 slot valid",
919 "MetricExpr": "PM_GCT_UTIL_7_10_ENTRIES / ( PM_RUN_CYC - PM_GCT_NOSLOT_CYC) * 100",
920 "MetricGroup": "general",
921 "MetricName": "gct_util_7to10_slots_percent"
922 },
923 {
924 "BriefDescription": "Avg. group size",
925 "MetricExpr": "PM_INST_CMPL / PM_1PLUS_PPC_CMPL",
926 "MetricGroup": "general",
927 "MetricName": "group_size"
928 },
929 {
930 "BriefDescription": "Instructions per group",
931 "MetricExpr": "PM_INST_CMPL / PM_1PLUS_PPC_CMPL",
932 "MetricGroup": "general",
933 "MetricName": "inst_per_group"
934 },
935 {
936 "BriefDescription": "Instructions per cycles",
937 "MetricExpr": "PM_INST_CMPL / PM_CYC",
938 "MetricGroup": "general",
939 "MetricName": "ipc"
940 },
941 {
942 "BriefDescription": "% ITLB miss rate per inst",
943 "MetricExpr": "PM_ITLB_MISS / PM_RUN_INST_CMPL *100",
944 "MetricGroup": "general",
945 "MetricName": "itlb_miss_rate_percent"
946 },
947 {
948 "BriefDescription": "Percentage of L1 load misses per L1 load ref",
949 "MetricExpr": "PM_LD_MISS_L1 / PM_LD_REF_L1 * 100",
950 "MetricGroup": "general",
951 "MetricName": "l1_ld_miss_ratio_percent"
952 },
953 {
954 "BriefDescription": "Percentage of L1 store misses per run instruction",
955 "MetricExpr": "PM_ST_MISS_L1 * 100 / PM_RUN_INST_CMPL",
956 "MetricGroup": "general",
957 "MetricName": "l1_st_miss_rate_percent"
958 },
959 {
960 "BriefDescription": "Percentage of L1 store misses per L1 store ref",
961 "MetricExpr": "PM_ST_MISS_L1 / PM_ST_FIN * 100",
962 "MetricGroup": "general",
963 "MetricName": "l1_st_miss_ratio_percent"
964 },
965 {
966 "BriefDescription": "L2 Instruction Miss Rate (per instruction)(%)",
967 "MetricExpr": "PM_INST_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
968 "MetricGroup": "general",
969 "MetricName": "l2_inst_miss_rate_percent"
970 },
971 {
972 "BriefDescription": "L2 dmand Load Miss Rate (per run instruction)(%)",
973 "MetricExpr": "PM_DATA_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
974 "MetricGroup": "general",
975 "MetricName": "l2_ld_miss_rate_percent"
976 },
977 {
978 "BriefDescription": "L2 PTEG Miss Rate (per run instruction)(%)",
979 "MetricExpr": "PM_DPTEG_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
980 "MetricGroup": "general",
981 "MetricName": "l2_pteg_miss_rate_percent"
982 },
983 {
984 "BriefDescription": "Percentage of L2 store misses per run instruction",
985 "MetricExpr": "PM_ST_MISS_L1 * 100 / PM_RUN_INST_CMPL",
986 "MetricGroup": "general",
987 "MetricName": "l2_st_miss_rate_percent"
988 },
989 {
990 "BriefDescription": "L3 Instruction Miss Rate (per instruction)(%)",
991 "MetricExpr": "PM_INST_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
992 "MetricGroup": "general",
993 "MetricName": "l3_inst_miss_rate_percent"
994 },
995 {
996 "BriefDescription": "L3 demand Load Miss Rate (per run instruction)(%)",
997 "MetricExpr": "PM_DATA_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
998 "MetricGroup": "general",
999 "MetricName": "l3_ld_miss_rate_percent"
1000 },
1001 {
1002 "BriefDescription": "L3 PTEG Miss Rate (per run instruction)(%)",
1003 "MetricExpr": "PM_DPTEG_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
1004 "MetricGroup": "general",
1005 "MetricName": "l3_pteg_miss_rate_percent"
1006 },
1007 {
1008 "BriefDescription": "Run cycles per cycle",
1009 "MetricExpr": "PM_RUN_CYC / PM_CYC*100",
1010 "MetricGroup": "general",
1011 "MetricName": "run_cycles_percent"
1012 },
1013 {
1014 "BriefDescription": "Percentage of cycles spent in SMT2 Mode",
1015 "MetricExpr": "(PM_RUN_CYC_SMT2_MODE/PM_RUN_CYC) * 100",
1016 "MetricGroup": "general",
1017 "MetricName": "smt2_cycles_percent"
1018 },
1019 {
1020 "BriefDescription": "Percentage of cycles spent in SMT4 Mode",
1021 "MetricExpr": "(PM_RUN_CYC_SMT4_MODE/PM_RUN_CYC) * 100",
1022 "MetricGroup": "general",
1023 "MetricName": "smt4_cycles_percent"
1024 },
1025 {
1026 "BriefDescription": "Percentage of cycles spent in SMT8 Mode",
1027 "MetricExpr": "(PM_RUN_CYC_SMT8_MODE/PM_RUN_CYC) * 100",
1028 "MetricGroup": "general",
1029 "MetricName": "smt8_cycles_percent"
1030 },
1031 {
1032 "BriefDescription": "IPC of all instructions completed by the core while this thread was stalled",
1033 "MetricExpr": "PM_CMPLU_STALL_OTHER_CMPL/PM_RUN_CYC",
1034 "MetricGroup": "general",
1035 "MetricName": "smt_benefit"
1036 },
1037 {
1038 "BriefDescription": "Instruction dispatch-to-completion ratio",
1039 "MetricExpr": "PM_INST_DISP / PM_INST_CMPL",
1040 "MetricGroup": "general",
1041 "MetricName": "speculation"
1042 },
1043 {
1044 "BriefDescription": "Percentage of cycles spent in Single Thread Mode",
1045 "MetricExpr": "(PM_RUN_CYC_ST_MODE/PM_RUN_CYC) * 100",
1046 "MetricGroup": "general",
1047 "MetricName": "st_cycles_percent"
1048 },
1049 {
1050 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Modified) per Inst",
1051 "MetricExpr": "PM_INST_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
1052 "MetricGroup": "instruction_misses_percent_per_inst",
1053 "MetricName": "inst_from_dl2l3_mod_rate_percent"
1054 },
1055 {
1056 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Shared) per Inst",
1057 "MetricExpr": "PM_INST_FROM_DL2L3_SHR * 100 / PM_RUN_INST_CMPL",
1058 "MetricGroup": "instruction_misses_percent_per_inst",
1059 "MetricName": "inst_from_dl2l3_shr_rate_percent"
1060 },
1061 {
1062 "BriefDescription": "% of ICache reloads from Distant L4 per Inst",
1063 "MetricExpr": "PM_INST_FROM_DL4 * 100 / PM_RUN_INST_CMPL",
1064 "MetricGroup": "instruction_misses_percent_per_inst",
1065 "MetricName": "inst_from_dl4_rate_percent"
1066 },
1067 {
1068 "BriefDescription": "% of ICache reloads from Distant Memory per Inst",
1069 "MetricExpr": "PM_INST_FROM_DMEM * 100 / PM_RUN_INST_CMPL",
1070 "MetricGroup": "instruction_misses_percent_per_inst",
1071 "MetricName": "inst_from_dmem_rate_percent"
1072 },
1073 {
1074 "BriefDescription": "% of ICache reloads from Private L2, other core per Inst",
1075 "MetricExpr": "PM_INST_FROM_L21_MOD * 100 / PM_RUN_INST_CMPL",
1076 "MetricGroup": "instruction_misses_percent_per_inst",
1077 "MetricName": "inst_from_l21_mod_rate_percent"
1078 },
1079 {
1080 "BriefDescription": "% of ICache reloads from Private L2, other core per Inst",
1081 "MetricExpr": "PM_INST_FROM_L21_SHR * 100 / PM_RUN_INST_CMPL",
1082 "MetricGroup": "instruction_misses_percent_per_inst",
1083 "MetricName": "inst_from_l21_shr_rate_percent"
1084 },
1085 {
1086 "BriefDescription": "% of ICache reloads from L2 per Inst",
1087 "MetricExpr": "PM_INST_FROM_L2 * 100 / PM_RUN_INST_CMPL",
1088 "MetricGroup": "instruction_misses_percent_per_inst",
1089 "MetricName": "inst_from_l2_rate_percent"
1090 },
1091 {
1092 "BriefDescription": "% of ICache reloads from Private L3, other core per Inst",
1093 "MetricExpr": "PM_INST_FROM_L31_MOD * 100 / PM_RUN_INST_CMPL",
1094 "MetricGroup": "instruction_misses_percent_per_inst",
1095 "MetricName": "inst_from_l31_mod_rate_percent"
1096 },
1097 {
1098 "BriefDescription": "% of ICache reloads from Private L3 other core per Inst",
1099 "MetricExpr": "PM_INST_FROM_L31_SHR * 100 / PM_RUN_INST_CMPL",
1100 "MetricGroup": "instruction_misses_percent_per_inst",
1101 "MetricName": "inst_from_l31_shr_rate_percent"
1102 },
1103 {
1104 "BriefDescription": "% of ICache reloads from L3 per Inst",
1105 "MetricExpr": "PM_INST_FROM_L3 * 100 / PM_RUN_INST_CMPL",
1106 "MetricGroup": "instruction_misses_percent_per_inst",
1107 "MetricName": "inst_from_l3_rate_percent"
1108 },
1109 {
1110 "BriefDescription": "% of ICache reloads from Local L4 per Inst",
1111 "MetricExpr": "PM_INST_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
1112 "MetricGroup": "instruction_misses_percent_per_inst",
1113 "MetricName": "inst_from_ll4_rate_percent"
1114 },
1115 {
1116 "BriefDescription": "% of ICache reloads from Local Memory per Inst",
1117 "MetricExpr": "PM_INST_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
1118 "MetricGroup": "instruction_misses_percent_per_inst",
1119 "MetricName": "inst_from_lmem_rate_percent"
1120 },
1121 {
1122 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Modified) per Inst",
1123 "MetricExpr": "PM_INST_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
1124 "MetricGroup": "instruction_misses_percent_per_inst",
1125 "MetricName": "inst_from_rl2l3_mod_rate_percent"
1126 },
1127 {
1128 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Shared) per Inst",
1129 "MetricExpr": "PM_INST_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
1130 "MetricGroup": "instruction_misses_percent_per_inst",
1131 "MetricName": "inst_from_rl2l3_shr_rate_percent"
1132 },
1133 {
1134 "BriefDescription": "% of ICache reloads from Remote L4 per Inst",
1135 "MetricExpr": "PM_INST_FROM_RL4 * 100 / PM_RUN_INST_CMPL",
1136 "MetricGroup": "instruction_misses_percent_per_inst",
1137 "MetricName": "inst_from_rl4_rate_percent"
1138 },
1139 {
1140 "BriefDescription": "% of ICache reloads from Remote Memory per Inst",
1141 "MetricExpr": "PM_INST_FROM_RMEM * 100 / PM_RUN_INST_CMPL",
1142 "MetricGroup": "instruction_misses_percent_per_inst",
1143 "MetricName": "inst_from_rmem_rate_percent"
1144 },
1145 {
1146 "BriefDescription": "Instruction Cache Miss Rate (Per run Instruction)(%)",
1147 "MetricExpr": "PM_L1_ICACHE_MISS * 100 / PM_RUN_INST_CMPL",
1148 "MetricGroup": "instruction_misses_percent_per_inst",
1149 "MetricName": "l1_inst_miss_rate_percent"
1150 },
1151 {
1152 "BriefDescription": "% Branches per instruction",
1153 "MetricExpr": "PM_BRU_FIN / PM_RUN_INST_CMPL",
1154 "MetricGroup": "instruction_mix",
1155 "MetricName": "branches_per_inst"
1156 },
1157 {
1158 "BriefDescription": "Total Fixed point operations",
1159 "MetricExpr": "(PM_FXU0_FIN + PM_FXU1_FIN)/PM_RUN_INST_CMPL",
1160 "MetricGroup": "instruction_mix",
1161 "MetricName": "fixed_per_inst"
1162 },
1163 {
1164 "BriefDescription": "FXU0 balance",
1165 "MetricExpr": "PM_FXU0_FIN / (PM_FXU0_FIN + PM_FXU1_FIN)",
1166 "MetricGroup": "instruction_mix",
1167 "MetricName": "fxu0_balance"
1168 },
1169 {
1170 "BriefDescription": "Fraction of cycles that FXU0 is in use",
1171 "MetricExpr": "PM_FXU0_FIN / PM_RUN_CYC",
1172 "MetricGroup": "instruction_mix",
1173 "MetricName": "fxu0_fin"
1174 },
1175 {
1176 "BriefDescription": "FXU0 only Busy",
1177 "MetricExpr": "PM_FXU0_BUSY_FXU1_IDLE / PM_CYC",
1178 "MetricGroup": "instruction_mix",
1179 "MetricName": "fxu0_only_busy"
1180 },
1181 {
1182 "BriefDescription": "Fraction of cycles that FXU1 is in use",
1183 "MetricExpr": "PM_FXU1_FIN / PM_RUN_CYC",
1184 "MetricGroup": "instruction_mix",
1185 "MetricName": "fxu1_fin"
1186 },
1187 {
1188 "BriefDescription": "FXU1 only Busy",
1189 "MetricExpr": "PM_FXU1_BUSY_FXU0_IDLE / PM_CYC",
1190 "MetricGroup": "instruction_mix",
1191 "MetricName": "fxu1_only_busy"
1192 },
1193 {
1194 "BriefDescription": "Both FXU Busy",
1195 "MetricExpr": "PM_FXU_BUSY / PM_CYC",
1196 "MetricGroup": "instruction_mix",
1197 "MetricName": "fxu_both_busy"
1198 },
1199 {
1200 "BriefDescription": "Both FXU Idle",
1201 "MetricExpr": "PM_FXU_IDLE / PM_CYC",
1202 "MetricGroup": "instruction_mix",
1203 "MetricName": "fxu_both_idle"
1204 },
1205 {
1206 "BriefDescription": "PCT instruction loads",
1207 "MetricExpr": "PM_LD_REF_L1 / PM_RUN_INST_CMPL",
1208 "MetricGroup": "instruction_mix",
1209 "MetricName": "loads_per_inst"
1210 },
1211 {
1212 "BriefDescription": "PCT instruction stores",
1213 "MetricExpr": "PM_ST_FIN / PM_RUN_INST_CMPL",
1214 "MetricGroup": "instruction_mix",
1215 "MetricName": "stores_per_inst"
1216 },
1217 {
1218 "BriefDescription": "Icache Fetchs per Icache Miss",
1219 "MetricExpr": "(PM_L1_ICACHE_MISS - PM_IC_PREF_WRITE) / PM_L1_ICACHE_MISS",
1220 "MetricGroup": "instruction_stats_percent_per_ref",
1221 "MetricName": "icache_miss_reload"
1222 },
1223 {
1224 "BriefDescription": "% of ICache reloads due to prefetch",
1225 "MetricExpr": "PM_IC_PREF_WRITE * 100 / PM_L1_ICACHE_MISS",
1226 "MetricGroup": "instruction_stats_percent_per_ref",
1227 "MetricName": "icache_pref_percent"
1228 },
1229 {
1230 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Modified)",
1231 "MetricExpr": "PM_INST_FROM_DL2L3_MOD * 100 / PM_L1_ICACHE_MISS",
1232 "MetricGroup": "instruction_stats_percent_per_ref",
1233 "MetricName": "inst_from_dl2l3_mod_percent"
1234 },
1235 {
1236 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Shared)",
1237 "MetricExpr": "PM_INST_FROM_DL2L3_SHR * 100 / PM_L1_ICACHE_MISS",
1238 "MetricGroup": "instruction_stats_percent_per_ref",
1239 "MetricName": "inst_from_dl2l3_shr_percent"
1240 },
1241 {
1242 "BriefDescription": "% of ICache reloads from Distant L4",
1243 "MetricExpr": "PM_INST_FROM_DL4 * 100 / PM_L1_ICACHE_MISS",
1244 "MetricGroup": "instruction_stats_percent_per_ref",
1245 "MetricName": "inst_from_dl4_percent"
1246 },
1247 {
1248 "BriefDescription": "% of ICache reloads from Distant Memory",
1249 "MetricExpr": "PM_INST_FROM_DMEM * 100 / PM_L1_ICACHE_MISS",
1250 "MetricGroup": "instruction_stats_percent_per_ref",
1251 "MetricName": "inst_from_dmem_percent"
1252 },
1253 {
1254 "BriefDescription": "% of ICache reloads from Private L2, other core",
1255 "MetricExpr": "PM_INST_FROM_L21_MOD * 100 / PM_L1_ICACHE_MISS",
1256 "MetricGroup": "instruction_stats_percent_per_ref",
1257 "MetricName": "inst_from_l21_mod_percent"
1258 },
1259 {
1260 "BriefDescription": "% of ICache reloads from Private L2, other core",
1261 "MetricExpr": "PM_INST_FROM_L21_SHR * 100 / PM_L1_ICACHE_MISS",
1262 "MetricGroup": "instruction_stats_percent_per_ref",
1263 "MetricName": "inst_from_l21_shr_percent"
1264 },
1265 {
1266 "BriefDescription": "% of ICache reloads from L2",
1267 "MetricExpr": "PM_INST_FROM_L2 * 100 / PM_L1_ICACHE_MISS",
1268 "MetricGroup": "instruction_stats_percent_per_ref",
1269 "MetricName": "inst_from_l2_percent"
1270 },
1271 {
1272 "BriefDescription": "% of ICache reloads from Private L3, other core",
1273 "MetricExpr": "PM_INST_FROM_L31_MOD * 100 / PM_L1_ICACHE_MISS",
1274 "MetricGroup": "instruction_stats_percent_per_ref",
1275 "MetricName": "inst_from_l31_mod_percent"
1276 },
1277 {
1278 "BriefDescription": "% of ICache reloads from Private L3, other core",
1279 "MetricExpr": "PM_INST_FROM_L31_SHR * 100 / PM_L1_ICACHE_MISS",
1280 "MetricGroup": "instruction_stats_percent_per_ref",
1281 "MetricName": "inst_from_l31_shr_percent"
1282 },
1283 {
1284 "BriefDescription": "% of ICache reloads from L3",
1285 "MetricExpr": "PM_INST_FROM_L3 * 100 / PM_L1_ICACHE_MISS",
1286 "MetricGroup": "instruction_stats_percent_per_ref",
1287 "MetricName": "inst_from_l3_percent"
1288 },
1289 {
1290 "BriefDescription": "% of ICache reloads from Local L4",
1291 "MetricExpr": "PM_INST_FROM_LL4 * 100 / PM_L1_ICACHE_MISS",
1292 "MetricGroup": "instruction_stats_percent_per_ref",
1293 "MetricName": "inst_from_ll4_percent"
1294 },
1295 {
1296 "BriefDescription": "% of ICache reloads from Local Memory",
1297 "MetricExpr": "PM_INST_FROM_LMEM * 100 / PM_L1_ICACHE_MISS",
1298 "MetricGroup": "instruction_stats_percent_per_ref",
1299 "MetricName": "inst_from_lmem_percent"
1300 },
1301 {
1302 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Modified)",
1303 "MetricExpr": "PM_INST_FROM_RL2L3_MOD * 100 / PM_L1_ICACHE_MISS",
1304 "MetricGroup": "instruction_stats_percent_per_ref",
1305 "MetricName": "inst_from_rl2l3_mod_percent"
1306 },
1307 {
1308 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Shared)",
1309 "MetricExpr": "PM_INST_FROM_RL2L3_SHR * 100 / PM_L1_ICACHE_MISS",
1310 "MetricGroup": "instruction_stats_percent_per_ref",
1311 "MetricName": "inst_from_rl2l3_shr_percent"
1312 },
1313 {
1314 "BriefDescription": "% of ICache reloads from Remote L4",
1315 "MetricExpr": "PM_INST_FROM_RL4 * 100 / PM_L1_ICACHE_MISS",
1316 "MetricGroup": "instruction_stats_percent_per_ref",
1317 "MetricName": "inst_from_rl4_percent"
1318 },
1319 {
1320 "BriefDescription": "% of ICache reloads from Remote Memory",
1321 "MetricExpr": "PM_INST_FROM_RMEM * 100 / PM_L1_ICACHE_MISS",
1322 "MetricGroup": "instruction_stats_percent_per_ref",
1323 "MetricName": "inst_from_rmem_percent"
1324 },
1325 {
1326 "BriefDescription": "Average number of stores that gather in the store buffer before being sent to an L2 RC machine",
1327 "MetricExpr": "PM_ST_CMPL / (PM_L2_ST / 2)",
1328 "MetricGroup": "l2_stats",
1329 "MetricName": "avg_stores_gathered"
1330 },
1331 {
1332 "BriefDescription": "L2 Store misses as a % of total L2 Store dispatches (per thread)",
1333 "MetricExpr": "PM_L2_ST_MISS / PM_L2_ST * 100",
1334 "MetricGroup": "l2_stats",
1335 "MetricName": "l2_st_miss_ratio_percent"
1336 },
1337 {
1338 "BriefDescription": "Percentage of L2 store misses per drained store. A drained store may contain multiple individual stores if they target the same line",
1339 "MetricExpr": "PM_L2_ST_MISS / (PM_L2_ST / 2)",
1340 "MetricGroup": "l2_stats",
1341 "MetricName": "l2_store_miss_ratio_percent"
1342 },
1343 {
1344 "BriefDescription": "average L1 miss latency using marked events",
1345 "MetricExpr": "PM_MRK_LD_MISS_L1_CYC / PM_MRK_LD_MISS_L1",
1346 "MetricGroup": "latency",
1347 "MetricName": "average_dl1miss_latency"
1348 },
1349 {
1350 "BriefDescription": "Average icache miss latency",
1351 "MetricExpr": "(PM_IC_DEMAND_CYC / PM_IC_DEMAND_REQ)",
1352 "MetricGroup": "latency",
1353 "MetricName": "average_il1_miss_latency"
1354 },
1355 {
1356 "BriefDescription": "average service time for SYNC",
1357 "MetricExpr": "PM_LSU_SRQ_SYNC_CYC / PM_LSU_SRQ_SYNC",
1358 "MetricGroup": "latency",
1359 "MetricName": "average_sync_cyc"
1360 },
1361 {
1362 "BriefDescription": "Cycles LMQ slot0 was active on an average",
1363 "MetricExpr": "PM_LSU_LMQ_S0_VALID / PM_LSU_LMQ_S0_ALLOC",
1364 "MetricGroup": "latency",
1365 "MetricName": "avg_lmq_life_time"
1366 },
1367 {
1368 "BriefDescription": "Average number of cycles LRQ stays active for one load. Slot 0 is VALID ONLY FOR EVEN THREADS",
1369 "MetricExpr": "PM_LSU_LRQ_S0_VALID / PM_LSU_LRQ_S0_ALLOC",
1370 "MetricGroup": "latency",
1371 "MetricName": "avg_lrq_life_time_even"
1372 },
1373 {
1374 "BriefDescription": "Average number of cycles LRQ stays active for one load. Slot 43 is valid ONLY FOR ODD THREADS",
1375 "MetricExpr": "PM_LSU_LRQ_S43_VALID / PM_LSU_LRQ_S43_ALLOC",
1376 "MetricGroup": "latency",
1377 "MetricName": "avg_lrq_life_time_odd"
1378 },
1379 {
1380 "BriefDescription": "Average number of cycles SRQ stays active for one load. Slot 0 is VALID ONLY FOR EVEN THREADS",
1381 "MetricExpr": "PM_LSU_SRQ_S0_VALID / PM_LSU_SRQ_S0_ALLOC",
1382 "MetricGroup": "latency",
1383 "MetricName": "avg_srq_life_time_even"
1384 },
1385 {
1386 "BriefDescription": "Average number of cycles SRQ stays active for one load. Slot 39 is valid ONLY FOR ODD THREADS",
1387 "MetricExpr": "PM_LSU_SRQ_S39_VALID / PM_LSU_SRQ_S39_ALLOC",
1388 "MetricGroup": "latency",
1389 "MetricName": "avg_srq_life_time_odd"
1390 },
1391 {
1392 "BriefDescription": "Marked background kill latency, measured in L2",
1393 "MetricExpr": "PM_MRK_FAB_RSP_BKILL_CYC / PM_MRK_FAB_RSP_BKILL",
1394 "MetricGroup": "latency",
1395 "MetricName": "bkill_latency"
1396 },
1397 {
1398 "BriefDescription": "Marked dclaim latency, measured in L2",
1399 "MetricExpr": "PM_MRK_FAB_RSP_DCLAIM_CYC / PM_MRK_FAB_RSP_DCLAIM",
1400 "MetricGroup": "latency",
1401 "MetricName": "dclaim_latency"
1402 },
1403 {
1404 "BriefDescription": "Marked L2L3 remote Load latency",
1405 "MetricExpr": "PM_MRK_DATA_FROM_DL2L3_MOD_CYC/ PM_MRK_DATA_FROM_DL2L3_MOD",
1406 "MetricGroup": "latency",
1407 "MetricName": "dl2l3_mod_latency"
1408 },
1409 {
1410 "BriefDescription": "Marked L2L3 distant Load latency",
1411 "MetricExpr": "PM_MRK_DATA_FROM_DL2L3_SHR_CYC/ PM_MRK_DATA_FROM_DL2L3_SHR",
1412 "MetricGroup": "latency",
1413 "MetricName": "dl2l3_shr_latency"
1414 },
1415 {
1416 "BriefDescription": "Distant L4 average load latency",
1417 "MetricExpr": "PM_MRK_DATA_FROM_DL4_CYC/ PM_MRK_DATA_FROM_DL4",
1418 "MetricGroup": "latency",
1419 "MetricName": "dl4_latency"
1420 },
1421 {
1422 "BriefDescription": "Marked Dmem Load latency",
1423 "MetricExpr": "PM_MRK_DATA_FROM_DMEM_CYC/ PM_MRK_DATA_FROM_DMEM",
1424 "MetricGroup": "latency",
1425 "MetricName": "dmem_latency"
1426 },
1427 {
1428 "BriefDescription": "estimated exposed miss latency for dL1 misses, ie load miss when we were NTC",
1429 "MetricExpr": "PM_MRK_LD_MISS_EXPOSED_CYC / PM_MRK_LD_MISS_EXPOSED",
1430 "MetricGroup": "latency",
1431 "MetricName": "exposed_dl1miss_latency"
1432 },
1433 {
1434 "BriefDescription": "Average load latency for all marked demand loads that came from L2.1 in the M state",
1435 "MetricExpr": "PM_MRK_DATA_FROM_L21_MOD_CYC/ PM_MRK_DATA_FROM_L21_MOD",
1436 "MetricGroup": "latency",
1437 "MetricName": "l21_mod_latency"
1438 },
1439 {
1440 "BriefDescription": "Average load latency for all marked demand loads that came from L2.1 in the S state",
1441 "MetricExpr": "PM_MRK_DATA_FROM_L21_SHR_CYC/ PM_MRK_DATA_FROM_L21_SHR",
1442 "MetricGroup": "latency",
1443 "MetricName": "l21_shr_latency"
1444 },
1445 {
1446 "BriefDescription": "Average load latency for all marked demand loads that came from the L2 and suffered a conflict at RC machine dispatch time due to load-hit-store",
1447 "MetricExpr": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST_CYC/ PM_MRK_DATA_FROM_L2_DISP_CONFLICT_LDHITST",
1448 "MetricGroup": "latency",
1449 "MetricName": "l2_disp_conflict_ldhitst_latency"
1450 },
1451 {
1452 "BriefDescription": "Average load latency for all marked demand loads that came from the L2 and suffered a conflict at RC machine dispatch time NOT due load-hit-store",
1453 "MetricExpr": "PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER_CYC/ PM_MRK_DATA_FROM_L2_DISP_CONFLICT_OTHER",
1454 "MetricGroup": "latency",
1455 "MetricName": "l2_disp_conflict_other_latency"
1456 },
1457 {
1458 "BriefDescription": "Average load latency for all marked demand loads that came from the L2",
1459 "MetricExpr": "PM_MRK_DATA_FROM_L2_CYC/ PM_MRK_DATA_FROM_L2",
1460 "MetricGroup": "latency",
1461 "MetricName": "l2_latency"
1462 },
1463 {
1464 "BriefDescription": "Average load latency for all marked demand loads that were satisfied by lines prefetched into the L3. This information is forwarded from the L3",
1465 "MetricExpr": "PM_MRK_DATA_FROM_L2_MEPF_CYC/ PM_MRK_DATA_FROM_L2",
1466 "MetricGroup": "latency",
1467 "MetricName": "l2_mepf_latency"
1468 },
1469 {
1470 "BriefDescription": "Average load latency for all marked demand loads that came from the L2 and suffered no conflicts",
1471 "MetricExpr": "PM_MRK_DATA_FROM_L2_NO_CONFLICT_CYC/ PM_MRK_DATA_FROM_L2",
1472 "MetricGroup": "latency",
1473 "MetricName": "l2_no_conflict_latency"
1474 },
1475 {
1476 "BriefDescription": "Average load latency for all marked demand loads that came from the L3 and beyond",
1477 "MetricExpr": "PM_MRK_DATA_FROM_L2MISS_CYC/ PM_MRK_DATA_FROM_L2MISS",
1478 "MetricGroup": "latency",
1479 "MetricName": "l2miss_latency"
1480 },
1481 {
1482 "BriefDescription": "Marked L31 Load latency",
1483 "MetricExpr": "PM_MRK_DATA_FROM_L31_MOD_CYC/ PM_MRK_DATA_FROM_L31_MOD",
1484 "MetricGroup": "latency",
1485 "MetricName": "l31_mod_latency"
1486 },
1487 {
1488 "BriefDescription": "Marked L31 Load latency",
1489 "MetricExpr": "PM_MRK_DATA_FROM_L31_SHR_CYC/ PM_MRK_DATA_FROM_L31_SHR",
1490 "MetricGroup": "latency",
1491 "MetricName": "l31_shr_latency"
1492 },
1493 {
1494 "BriefDescription": "Average load latency for all marked demand loads that came from the L3",
1495 "MetricExpr": "PM_MRK_DATA_FROM_L3_CYC/ PM_MRK_DATA_FROM_L3",
1496 "MetricGroup": "latency",
1497 "MetricName": "l3_latency"
1498 },
1499 {
1500 "BriefDescription": "Average load latency for all marked demand loads that came from the L3 and suffered no conflicts",
1501 "MetricExpr": "PM_MRK_DATA_FROM_L3_NO_CONFLICT_CYC/ PM_MRK_DATA_FROM_L2",
1502 "MetricGroup": "latency",
1503 "MetricName": "l3_no_conflict_latency"
1504 },
1505 {
1506 "BriefDescription": "Average load latency for all marked demand loads that come from beyond the L3",
1507 "MetricExpr": "PM_MRK_DATA_FROM_L3MISS_CYC/ PM_MRK_DATA_FROM_L3MISS",
1508 "MetricGroup": "latency",
1509 "MetricName": "l3miss_latency"
1510 },
1511 {
1512 "BriefDescription": "Average latency for marked reloads that hit in the L3 on the MEPF state. i.e. lines that were prefetched into the L3",
1513 "MetricExpr": "PM_MRK_DATA_FROM_L3_MEPF_CYC/ PM_MRK_DATA_FROM_L3_MEPF",
1514 "MetricGroup": "latency",
1515 "MetricName": "l3pref_latency"
1516 },
1517 {
1518 "BriefDescription": "Local L4 average load latency",
1519 "MetricExpr": "PM_MRK_DATA_FROM_LL4_CYC/ PM_MRK_DATA_FROM_LL4",
1520 "MetricGroup": "latency",
1521 "MetricName": "ll4_latency"
1522 },
1523 {
1524 "BriefDescription": "Marked Lmem Load latency",
1525 "MetricExpr": "PM_MRK_DATA_FROM_LMEM_CYC/ PM_MRK_DATA_FROM_LMEM",
1526 "MetricGroup": "latency",
1527 "MetricName": "lmem_latency"
1528 },
1529 {
1530 "BriefDescription": "Latency for marked reloads that hit in the L2 or L3 of any other core on a different chip",
1531 "MetricExpr": "PM_MRK_DATA_FROM_OFF_CHIP_CACHE_CYC/ PM_MRK_DATA_FROM_OFF_CHIP_CACHE",
1532 "MetricGroup": "latency",
1533 "MetricName": "off_chip_cache_latency"
1534 },
1535 {
1536 "BriefDescription": "Latency for marked reloads that hit in the L2 or L3 of any other core on the same chip",
1537 "MetricExpr": "PM_MRK_DATA_FROM_ON_CHIP_CACHE_CYC/ PM_MRK_DATA_FROM_ON_CHIP_CACHE",
1538 "MetricGroup": "latency",
1539 "MetricName": "on_chip_cache_latency"
1540 },
1541 {
1542 "BriefDescription": "Marked L2L3 remote Load latency",
1543 "MetricExpr": "PM_MRK_DATA_FROM_RL2L3_MOD_CYC/ PM_MRK_DATA_FROM_RL2L3_MOD",
1544 "MetricGroup": "latency",
1545 "MetricName": "rl2l3_mod_latency"
1546 },
1547 {
1548 "BriefDescription": "Marked L2L3 remote Load latency",
1549 "MetricExpr": "PM_MRK_DATA_FROM_RL2L3_SHR_CYC/ PM_MRK_DATA_FROM_RL2L3_SHR",
1550 "MetricGroup": "latency",
1551 "MetricName": "rl2l3_shr_latency"
1552 },
1553 {
1554 "BriefDescription": "Remote L4 average load latency",
1555 "MetricExpr": "PM_MRK_DATA_FROM_RL4_CYC/ PM_MRK_DATA_FROM_RL4",
1556 "MetricGroup": "latency",
1557 "MetricName": "rl4_latency"
1558 },
1559 {
1560 "BriefDescription": "Marked Rmem Load latency",
1561 "MetricExpr": "PM_MRK_DATA_FROM_RMEM_CYC/ PM_MRK_DATA_FROM_RMEM",
1562 "MetricGroup": "latency",
1563 "MetricName": "rmem_latency"
1564 },
1565 {
1566 "BriefDescription": "ERAT miss reject ratio",
1567 "MetricExpr": "PM_LSU_REJECT_ERAT_MISS * 100 / PM_RUN_INST_CMPL",
1568 "MetricGroup": "lsu_rejects",
1569 "MetricName": "erat_reject_rate_percent"
1570 },
1571 {
1572 "BriefDescription": "ERAT miss reject ratio",
1573 "MetricExpr": "PM_LSU_REJECT_ERAT_MISS * 100 / (PM_LSU_FIN - PM_LSU_FX_FIN)",
1574 "MetricGroup": "lsu_rejects",
1575 "MetricName": "erat_reject_ratio_percent"
1576 },
1577 {
1578 "BriefDescription": "LHS reject ratio",
1579 "MetricExpr": "PM_LSU_REJECT_LHS *100/ PM_RUN_INST_CMPL",
1580 "MetricGroup": "lsu_rejects",
1581 "MetricName": "lhs_reject_rate_percent"
1582 },
1583 {
1584 "BriefDescription": "LHS reject ratio",
1585 "MetricExpr": "PM_LSU_REJECT_LHS *100/ (PM_LSU_FIN - PM_LSU_FX_FIN)",
1586 "MetricGroup": "lsu_rejects",
1587 "MetricName": "lhs_reject_ratio_percent"
1588 },
1589 {
1590 "BriefDescription": "LMQ full reject ratio",
1591 "MetricExpr": "PM_LSU_REJECT_LMQ_FULL * 100 / PM_RUN_INST_CMPL",
1592 "MetricGroup": "lsu_rejects",
1593 "MetricName": "lmq_full_reject_rate_percent"
1594 },
1595 {
1596 "BriefDescription": "ERAT miss reject ratio",
1597 "MetricExpr": "PM_LSU_REJECT_LMQ_FULL * 100 / PM_LD_REF_L1",
1598 "MetricGroup": "lsu_rejects",
1599 "MetricName": "lmq_full_reject_ratio_percent"
1600 },
1601 {
1602 "BriefDescription": "LSU reject ratio",
1603 "MetricExpr": "PM_LSU_REJECT *100/ PM_RUN_INST_CMPL",
1604 "MetricGroup": "lsu_rejects",
1605 "MetricName": "lsu_reject_rate_percent"
1606 },
1607 {
1608 "BriefDescription": "LSU reject ratio",
1609 "MetricExpr": "PM_LSU_REJECT *100/ (PM_LSU_FIN - PM_LSU_FX_FIN)",
1610 "MetricGroup": "lsu_rejects",
1611 "MetricName": "lsu_reject_ratio_percent"
1612 },
1613 {
1614 "BriefDescription": "Ratio of reloads from local L4 to distant L4",
1615 "MetricExpr": "PM_DATA_FROM_LL4 / PM_DATA_FROM_DL4",
1616 "MetricGroup": "memory",
1617 "MetricName": "ld_ll4_per_ld_dmem"
1618 },
1619 {
1620 "BriefDescription": "Ratio of reloads from local L4 to remote+distant L4",
1621 "MetricExpr": "PM_DATA_FROM_LL4 / (PM_DATA_FROM_DL4 + PM_DATA_FROM_RL4)",
1622 "MetricGroup": "memory",
1623 "MetricName": "ld_ll4_per_ld_mem"
1624 },
1625 {
1626 "BriefDescription": "Ratio of reloads from local L4 to remote L4",
1627 "MetricExpr": "PM_DATA_FROM_LL4 / PM_DATA_FROM_RL4",
1628 "MetricGroup": "memory",
1629 "MetricName": "ld_ll4_per_ld_rl4"
1630 },
1631 {
1632 "BriefDescription": "Number of loads from local memory per loads from distant memory",
1633 "MetricExpr": "PM_DATA_FROM_LMEM / PM_DATA_FROM_DMEM",
1634 "MetricGroup": "memory",
1635 "MetricName": "ld_lmem_per_ld_dmem"
1636 },
1637 {
1638 "BriefDescription": "Number of loads from local memory per loads from remote and distant memory",
1639 "MetricExpr": "PM_DATA_FROM_LMEM / (PM_DATA_FROM_DMEM + PM_DATA_FROM_RMEM)",
1640 "MetricGroup": "memory",
1641 "MetricName": "ld_lmem_per_ld_mem"
1642 },
1643 {
1644 "BriefDescription": "Number of loads from local memory per loads from remote memory",
1645 "MetricExpr": "PM_DATA_FROM_LMEM / PM_DATA_FROM_RMEM",
1646 "MetricGroup": "memory",
1647 "MetricName": "ld_lmem_per_ld_rmem"
1648 },
1649 {
1650 "BriefDescription": "Number of loads from remote memory per loads from distant memory",
1651 "MetricExpr": "PM_DATA_FROM_RMEM / PM_DATA_FROM_DMEM",
1652 "MetricGroup": "memory",
1653 "MetricName": "ld_rmem_per_ld_dmem"
1654 },
1655 {
1656 "BriefDescription": "Memory locality",
1657 "MetricExpr": "(PM_DATA_FROM_LL4 + PM_DATA_FROM_LMEM) * 100/ (PM_DATA_FROM_LMEM + PM_DATA_FROM_LL4 + PM_DATA_FROM_RMEM + PM_DATA_FROM_RL4 + PM_DATA_FROM_DMEM + PM_DATA_FROM_DL4)",
1658 "MetricGroup": "memory",
1659 "MetricName": "mem_locality_percent"
1660 },
1661 {
1662 "BriefDescription": "DERAT Miss Rate (per run instruction)(%)",
1663 "MetricExpr": "PM_LSU_DERAT_MISS * 100 / PM_RUN_INST_CMPL",
1664 "MetricGroup": "pteg_reloads_percent_per_inst",
1665 "MetricName": "derat_miss_rate_percent"
1666 },
1667 {
1668 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Modified) per inst",
1669 "MetricExpr": "PM_DPTEG_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
1670 "MetricGroup": "pteg_reloads_percent_per_inst",
1671 "MetricName": "pteg_from_dl2l3_mod_rate_percent"
1672 },
1673 {
1674 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Shared) per inst",
1675 "MetricExpr": "PM_DPTEG_FROM_DL2L3_SHR * 100 / PM_RUN_INST_CMPL",
1676 "MetricGroup": "pteg_reloads_percent_per_inst",
1677 "MetricName": "pteg_from_dl2l3_shr_rate_percent"
1678 },
1679 {
1680 "BriefDescription": "% of DERAT reloads from Distant L4 per inst",
1681 "MetricExpr": "PM_DPTEG_FROM_DL4 * 100 / PM_RUN_INST_CMPL",
1682 "MetricGroup": "pteg_reloads_percent_per_inst",
1683 "MetricName": "pteg_from_dl4_rate_percent"
1684 },
1685 {
1686 "BriefDescription": "% of DERAT reloads from Distant Memory per inst",
1687 "MetricExpr": "PM_DPTEG_FROM_DMEM * 100 / PM_RUN_INST_CMPL",
1688 "MetricGroup": "pteg_reloads_percent_per_inst",
1689 "MetricName": "pteg_from_dmem_rate_percent"
1690 },
1691 {
1692 "BriefDescription": "% of DERAT reloads from Private L2, other core per inst",
1693 "MetricExpr": "PM_DPTEG_FROM_L21_MOD * 100 / PM_RUN_INST_CMPL",
1694 "MetricGroup": "pteg_reloads_percent_per_inst",
1695 "MetricName": "pteg_from_l21_mod_rate_percent"
1696 },
1697 {
1698 "BriefDescription": "% of DERAT reloads from Private L2, other core per inst",
1699 "MetricExpr": "PM_DPTEG_FROM_L21_SHR * 100 / PM_RUN_INST_CMPL",
1700 "MetricGroup": "pteg_reloads_percent_per_inst",
1701 "MetricName": "pteg_from_l21_shr_rate_percent"
1702 },
1703 {
1704 "BriefDescription": "% of DERAT reloads from L2 per inst",
1705 "MetricExpr": "PM_DPTEG_FROM_L2 * 100 / PM_RUN_INST_CMPL",
1706 "MetricGroup": "pteg_reloads_percent_per_inst",
1707 "MetricName": "pteg_from_l2_rate_percent"
1708 },
1709 {
1710 "BriefDescription": "% of DERAT reloads from Private L3, other core per inst",
1711 "MetricExpr": "PM_DPTEG_FROM_L31_MOD * 100 / PM_RUN_INST_CMPL",
1712 "MetricGroup": "pteg_reloads_percent_per_inst",
1713 "MetricName": "pteg_from_l31_mod_rate_percent"
1714 },
1715 {
1716 "BriefDescription": "% of DERAT reloads from Private L3, other core per inst",
1717 "MetricExpr": "PM_DPTEG_FROM_L31_SHR * 100 / PM_RUN_INST_CMPL",
1718 "MetricGroup": "pteg_reloads_percent_per_inst",
1719 "MetricName": "pteg_from_l31_shr_rate_percent"
1720 },
1721 {
1722 "BriefDescription": "% of DERAT reloads from L3 per inst",
1723 "MetricExpr": "PM_DPTEG_FROM_L3 * 100 / PM_RUN_INST_CMPL",
1724 "MetricGroup": "pteg_reloads_percent_per_inst",
1725 "MetricName": "pteg_from_l3_rate_percent"
1726 },
1727 {
1728 "BriefDescription": "% of DERAT reloads from Local L4 per inst",
1729 "MetricExpr": "PM_DPTEG_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
1730 "MetricGroup": "pteg_reloads_percent_per_inst",
1731 "MetricName": "pteg_from_ll4_rate_percent"
1732 },
1733 {
1734 "BriefDescription": "% of DERAT reloads from Local Memory per inst",
1735 "MetricExpr": "PM_DPTEG_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
1736 "MetricGroup": "pteg_reloads_percent_per_inst",
1737 "MetricName": "pteg_from_lmem_rate_percent"
1738 },
1739 {
1740 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Modified) per inst",
1741 "MetricExpr": "PM_DPTEG_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
1742 "MetricGroup": "pteg_reloads_percent_per_inst",
1743 "MetricName": "pteg_from_rl2l3_mod_rate_percent"
1744 },
1745 {
1746 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Shared) per inst",
1747 "MetricExpr": "PM_DPTEG_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
1748 "MetricGroup": "pteg_reloads_percent_per_inst",
1749 "MetricName": "pteg_from_rl2l3_shr_rate_percent"
1750 },
1751 {
1752 "BriefDescription": "% of DERAT reloads from Remote L4 per inst",
1753 "MetricExpr": "PM_DPTEG_FROM_RL4 * 100 / PM_RUN_INST_CMPL",
1754 "MetricGroup": "pteg_reloads_percent_per_inst",
1755 "MetricName": "pteg_from_rl4_rate_percent"
1756 },
1757 {
1758 "BriefDescription": "% of DERAT reloads from Remote Memory per inst",
1759 "MetricExpr": "PM_DPTEG_FROM_RMEM * 100 / PM_RUN_INST_CMPL",
1760 "MetricGroup": "pteg_reloads_percent_per_inst",
1761 "MetricName": "pteg_from_rmem_rate_percent"
1762 },
1763 {
1764 "BriefDescription": "% of DERAT misses that result in an ERAT reload",
1765 "MetricExpr": "PM_DTLB_MISS * 100 / PM_LSU_DERAT_MISS",
1766 "MetricGroup": "pteg_reloads_percent_per_ref",
1767 "MetricName": "derat_miss_reload_percent"
1768 },
1769 {
1770 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Modified)",
1771 "MetricExpr": "PM_DPTEG_FROM_DL2L3_MOD * 100 / PM_DTLB_MISS",
1772 "MetricGroup": "pteg_reloads_percent_per_ref",
1773 "MetricName": "pteg_from_dl2l3_mod_percent"
1774 },
1775 {
1776 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Shared)",
1777 "MetricExpr": "PM_DPTEG_FROM_DL2L3_SHR * 100 / PM_DTLB_MISS",
1778 "MetricGroup": "pteg_reloads_percent_per_ref",
1779 "MetricName": "pteg_from_dl2l3_shr_percent"
1780 },
1781 {
1782 "BriefDescription": "% of DERAT reloads from Distant L4",
1783 "MetricExpr": "PM_DPTEG_FROM_DL4 * 100 / PM_DTLB_MISS",
1784 "MetricGroup": "pteg_reloads_percent_per_ref",
1785 "MetricName": "pteg_from_dl4_percent"
1786 },
1787 {
1788 "BriefDescription": "% of DERAT reloads from Distant Memory",
1789 "MetricExpr": "PM_DPTEG_FROM_DMEM * 100 / PM_DTLB_MISS",
1790 "MetricGroup": "pteg_reloads_percent_per_ref",
1791 "MetricName": "pteg_from_dmem_percent"
1792 },
1793 {
1794 "BriefDescription": "% of DERAT reloads from Private L2, other core",
1795 "MetricExpr": "PM_DPTEG_FROM_L21_MOD * 100 / PM_DTLB_MISS",
1796 "MetricGroup": "pteg_reloads_percent_per_ref",
1797 "MetricName": "pteg_from_l21_mod_percent"
1798 },
1799 {
1800 "BriefDescription": "% of DERAT reloads from Private L2, other core",
1801 "MetricExpr": "PM_DPTEG_FROM_L21_SHR * 100 / PM_DTLB_MISS",
1802 "MetricGroup": "pteg_reloads_percent_per_ref",
1803 "MetricName": "pteg_from_l21_shr_percent"
1804 },
1805 {
1806 "BriefDescription": "% of DERAT reloads from L2",
1807 "MetricExpr": "PM_DPTEG_FROM_L2 * 100 / PM_DTLB_MISS",
1808 "MetricGroup": "pteg_reloads_percent_per_ref",
1809 "MetricName": "pteg_from_l2_percent"
1810 },
1811 {
1812 "BriefDescription": "% of DERAT reloads from Private L3, other core",
1813 "MetricExpr": "PM_DPTEG_FROM_L31_MOD * 100 / PM_DTLB_MISS",
1814 "MetricGroup": "pteg_reloads_percent_per_ref",
1815 "MetricName": "pteg_from_l31_mod_percent"
1816 },
1817 {
1818 "BriefDescription": "% of DERAT reloads from Private L3, other core",
1819 "MetricExpr": "PM_DPTEG_FROM_L31_SHR * 100 / PM_DTLB_MISS",
1820 "MetricGroup": "pteg_reloads_percent_per_ref",
1821 "MetricName": "pteg_from_l31_shr_percent"
1822 },
1823 {
1824 "BriefDescription": "% of DERAT reloads from L3",
1825 "MetricExpr": "PM_DPTEG_FROM_L3 * 100 / PM_DTLB_MISS",
1826 "MetricGroup": "pteg_reloads_percent_per_ref",
1827 "MetricName": "pteg_from_l3_percent"
1828 },
1829 {
1830 "BriefDescription": "% of DERAT reloads from Local L4",
1831 "MetricExpr": "PM_DPTEG_FROM_LL4 * 100 / PM_DTLB_MISS",
1832 "MetricGroup": "pteg_reloads_percent_per_ref",
1833 "MetricName": "pteg_from_ll4_percent"
1834 },
1835 {
1836 "BriefDescription": "% of DERAT reloads from Local Memory",
1837 "MetricExpr": "PM_DPTEG_FROM_LMEM * 100 / PM_DTLB_MISS",
1838 "MetricGroup": "pteg_reloads_percent_per_ref",
1839 "MetricName": "pteg_from_lmem_percent"
1840 },
1841 {
1842 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Modified)",
1843 "MetricExpr": "PM_DPTEG_FROM_RL2L3_MOD * 100 / PM_DTLB_MISS",
1844 "MetricGroup": "pteg_reloads_percent_per_ref",
1845 "MetricName": "pteg_from_rl2l3_mod_percent"
1846 },
1847 {
1848 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Shared)",
1849 "MetricExpr": "PM_DPTEG_FROM_RL2L3_SHR * 100 / PM_DTLB_MISS",
1850 "MetricGroup": "pteg_reloads_percent_per_ref",
1851 "MetricName": "pteg_from_rl2l3_shr_percent"
1852 },
1853 {
1854 "BriefDescription": "% of DERAT reloads from Remote L4",
1855 "MetricExpr": "PM_DPTEG_FROM_RL4 * 100 / PM_DTLB_MISS",
1856 "MetricGroup": "pteg_reloads_percent_per_ref",
1857 "MetricName": "pteg_from_rl4_percent"
1858 },
1859 {
1860 "BriefDescription": "% of DERAT reloads from Remote Memory",
1861 "MetricExpr": "PM_DPTEG_FROM_RMEM * 100 / PM_DTLB_MISS",
1862 "MetricGroup": "pteg_reloads_percent_per_ref",
1863 "MetricName": "pteg_from_rmem_percent"
1864 },
1865 {
1866 "BriefDescription": "% DERAT miss ratio for 16G page per inst",
1867 "MetricExpr": "100 * PM_DERAT_MISS_16G / PM_RUN_INST_CMPL",
1868 "MetricGroup": "translation",
1869 "MetricName": "derat_16g_miss_rate_percent"
1870 },
1871 {
1872 "BriefDescription": "DERAT miss ratio for 16G page",
1873 "MetricExpr": "PM_DERAT_MISS_16G / PM_LSU_DERAT_MISS",
1874 "MetricGroup": "translation",
1875 "MetricName": "derat_16g_miss_ratio"
1876 },
1877 {
1878 "BriefDescription": "% DERAT miss rate for 16M page per inst",
1879 "MetricExpr": "PM_DERAT_MISS_16M * 100 / PM_RUN_INST_CMPL",
1880 "MetricGroup": "translation",
1881 "MetricName": "derat_16m_miss_rate_percent"
1882 },
1883 {
1884 "BriefDescription": "DERAT miss ratio for 16M page",
1885 "MetricExpr": "PM_DERAT_MISS_16M / PM_LSU_DERAT_MISS",
1886 "MetricGroup": "translation",
1887 "MetricName": "derat_16m_miss_ratio"
1888 },
1889 {
1890 "BriefDescription": "% DERAT miss rate for 4K page per inst",
1891 "MetricExpr": "PM_DERAT_MISS_4K * 100 / PM_RUN_INST_CMPL",
1892 "MetricGroup": "translation",
1893 "MetricName": "derat_4k_miss_rate_percent"
1894 },
1895 {
1896 "BriefDescription": "DERAT miss ratio for 4K page",
1897 "MetricExpr": "PM_DERAT_MISS_4K / PM_LSU_DERAT_MISS",
1898 "MetricGroup": "translation",
1899 "MetricName": "derat_4k_miss_ratio"
1900 },
1901 {
1902 "BriefDescription": "% DERAT miss ratio for 64K page per inst",
1903 "MetricExpr": "PM_DERAT_MISS_64K * 100 / PM_RUN_INST_CMPL",
1904 "MetricGroup": "translation",
1905 "MetricName": "derat_64k_miss_rate_percent"
1906 },
1907 {
1908 "BriefDescription": "DERAT miss ratio for 64K page",
1909 "MetricExpr": "PM_DERAT_MISS_64K / PM_LSU_DERAT_MISS",
1910 "MetricGroup": "translation",
1911 "MetricName": "derat_64k_miss_ratio"
1912 },
1913 {
1914 "BriefDescription": "% DSLB_Miss_Rate per inst",
1915 "MetricExpr": "PM_DSLB_MISS * 100 / PM_RUN_INST_CMPL",
1916 "MetricGroup": "translation",
1917 "MetricName": "dslb_miss_rate_percent"
1918 },
1919 {
1920 "BriefDescription": "% ISLB miss rate per inst",
1921 "MetricExpr": "PM_ISLB_MISS * 100 / PM_RUN_INST_CMPL",
1922 "MetricGroup": "translation",
1923 "MetricName": "islb_miss_rate_percent"
1924 },
1925 {
1926 "BriefDescription": "Fraction of hits on any Centaur (local, remote, or distant) on either L4 or DRAM per L1 load ref",
1927 "MetricExpr": "PM_DATA_FROM_MEMORY / PM_LD_REF_L1",
1928 "MetricName": "any_centaur_ld_hit_ratio"
1929 },
1930 {
1931 "BriefDescription": "Base Completion Cycles",
1932 "MetricExpr": "PM_1PLUS_PPC_CMPL / PM_RUN_INST_CMPL",
1933 "MetricName": "base_completion_cpi"
1934 },
1935 {
1936 "BriefDescription": "Marked background kill latency, measured in L2",
1937 "MetricExpr": "PM_MRK_FAB_RSP_BKILL_CYC / PM_MRK_FAB_RSP_BKILL",
1938 "MetricName": "bkill_ratio_percent"
1939 },
1940 {
1941 "BriefDescription": "cycles",
1942 "MetricExpr": "PM_RUN_CYC",
1943 "MetricName": "custom_secs"
1944 },
1945 {
1946 "BriefDescription": "Fraction of hits on a distant chip's Centaur (L4 or DRAM) per L1 load ref",
1947 "MetricExpr": "(PM_DATA_FROM_DMEM + PM_DATA_FROM_DL4) / PM_LD_REF_L1",
1948 "MetricName": "distant_centaur_ld_hit_ratio"
1949 },
1950 {
1951 "BriefDescription": "% of DL1 reloads that came from the L3 and beyond",
1952 "MetricExpr": "PM_DATA_FROM_L2MISS * 100 / PM_L1_DCACHE_RELOAD_VALID",
1953 "MetricName": "dl1_reload_from_l2_miss_percent"
1954 },
1955 {
1956 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
1957 "MetricExpr": "(PM_DATA_FROM_L31_MOD + PM_DATA_FROM_L31_SHR) * 100 / PM_RUN_INST_CMPL",
1958 "MetricName": "dl1_reload_from_l31_rate_percent"
1959 },
1960 {
1961 "BriefDescription": "Percentage of DL1 reloads from L3 where the lines were brought into the L3 by a prefetch operation",
1962 "MetricExpr": "PM_DATA_FROM_L3_MEPF * 100 / PM_L1_DCACHE_RELOAD_VALID",
1963 "MetricName": "dl1_reload_from_l3_mepf_percent"
1964 },
1965 {
1966 "BriefDescription": "% of DL1 Reloads from beyond the local L3",
1967 "MetricExpr": "PM_DATA_FROM_L3MISS * 100 / PM_L1_DCACHE_RELOAD_VALID",
1968 "MetricName": "dl1_reload_from_l3_miss_percent"
1969 },
1970 {
1971 "BriefDescription": "Fraction of hits of a line in the M (exclusive) state on the L2 or L3 of a core on a distant chip per L1 load ref",
1972 "MetricExpr": "PM_DATA_FROM_DL2L3_MOD / PM_LD_REF_L1",
1973 "MetricName": "dl2l3_mod_ld_hit_ratio"
1974 },
1975 {
1976 "BriefDescription": "Fraction of hits of a line in the S state on the L2 or L3 of a core on a distant chip per L1 load ref",
1977 "MetricExpr": "PM_DATA_FROM_DL2L3_SHR / PM_LD_REF_L1",
1978 "MetricName": "dl2l3_shr_ld_hit_ratio"
1979 },
1980 {
1981 "BriefDescription": "Fraction of hits on a distant Centaur's cache per L1 load ref",
1982 "MetricExpr": "PM_DATA_FROM_DL4 / PM_LD_REF_L1",
1983 "MetricName": "dl4_ld_hit_ratio"
1984 },
1985 {
1986 "BriefDescription": "Fraction of hits on a distant Centaur's DRAM per L1 load ref",
1987 "MetricExpr": "PM_DATA_FROM_DMEM / PM_LD_REF_L1",
1988 "MetricName": "dmem_ld_hit_ratio"
1989 },
1990 {
1991 "BriefDescription": "Rate of DERAT reloads from L2",
1992 "MetricExpr": "PM_DPTEG_FROM_L2 * 100 / PM_RUN_INST_CMPL",
1993 "MetricName": "dpteg_from_l2_rate_percent"
1994 },
1995 {
1996 "BriefDescription": "Rate of DERAT reloads from L3",
1997 "MetricExpr": "PM_DPTEG_FROM_L3 * 100 / PM_RUN_INST_CMPL",
1998 "MetricName": "dpteg_from_l3_rate_percent"
1999 },
2000 {
2001 "BriefDescription": "Overhead of expansion cycles",
2002 "MetricExpr": "(PM_GRP_CMPL / PM_RUN_INST_CMPL) - (PM_1PLUS_PPC_CMPL / PM_RUN_INST_CMPL)",
2003 "MetricName": "expansion_overhead_cpi"
2004 },
2005 {
2006 "BriefDescription": "Total Fixed point operations executded in the Load/Store Unit following a load/store operation",
2007 "MetricExpr": "PM_LSU_FX_FIN/PM_RUN_INST_CMPL",
2008 "MetricName": "fixed_in_lsu_per_inst"
2009 },
2010 {
2011 "BriefDescription": "GCT empty cycles",
2012 "MetricExpr": "(PM_GCT_NOSLOT_CYC / PM_RUN_CYC) * 100",
2013 "MetricName": "gct_empty_percent"
2014 },
2015 {
2016 "BriefDescription": "Rate of IERAT reloads from L2",
2017 "MetricExpr": "PM_IPTEG_FROM_L2 * 100 / PM_RUN_INST_CMPL",
2018 "MetricName": "ipteg_from_l2_rate_percent"
2019 },
2020 {
2021 "BriefDescription": "Rate of IERAT reloads from L3",
2022 "MetricExpr": "PM_IPTEG_FROM_L3 * 100 / PM_RUN_INST_CMPL",
2023 "MetricName": "ipteg_from_l3_rate_percent"
2024 },
2025 {
2026 "BriefDescription": "Rate of IERAT reloads from local memory",
2027 "MetricExpr": "PM_IPTEG_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
2028 "MetricName": "ipteg_from_ll4_rate_percent"
2029 },
2030 {
2031 "BriefDescription": "Rate of IERAT reloads from local memory",
2032 "MetricExpr": "PM_IPTEG_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
2033 "MetricName": "ipteg_from_lmem_rate_percent"
2034 },
2035 {
2036 "BriefDescription": "Fraction of L1 hits per load ref",
2037 "MetricExpr": "(PM_LD_REF_L1 - PM_LD_MISS_L1) / PM_LD_REF_L1",
2038 "MetricName": "l1_ld_hit_ratio"
2039 },
2040 {
2041 "BriefDescription": "Fraction of L1 load misses per L1 load ref",
2042 "MetricExpr": "PM_LD_MISS_L1 / PM_LD_REF_L1",
2043 "MetricName": "l1_ld_miss_ratio"
2044 },
2045 {
2046 "BriefDescription": "Fraction of hits on another core's L2 on the same chip per L1 load ref",
2047 "MetricExpr": "(PM_DATA_FROM_L21_MOD + PM_DATA_FROM_L21_SHR) / PM_LD_REF_L1",
2048 "MetricName": "l2_1_ld_hit_ratio"
2049 },
2050 {
2051 "BriefDescription": "Fraction of hits of a line in the M (exclusive) state on another core's L2 on the same chip per L1 load ref",
2052 "MetricExpr": "PM_DATA_FROM_L21_MOD / PM_LD_REF_L1",
2053 "MetricName": "l2_1_mod_ld_hit_ratio"
2054 },
2055 {
2056 "BriefDescription": "Fraction of hits of a line in the S state on another core's L2 on the same chip per L1 load ref",
2057 "MetricExpr": "PM_DATA_FROM_L21_SHR / PM_LD_REF_L1",
2058 "MetricName": "l2_1_shr_ld_hit_ratio"
2059 },
2060 {
2061 "BriefDescription": "Average number of Castout machines used. 1 of 16 CO machines is sampled every L2 cycle",
2062 "MetricExpr": "(PM_CO_USAGE / PM_RUN_CYC) * 16",
2063 "MetricName": "l2_co_usage"
2064 },
2065 {
2066 "BriefDescription": "Fraction of L2 load hits per L1 load ref",
2067 "MetricExpr": "PM_DATA_FROM_L2 / PM_LD_REF_L1",
2068 "MetricName": "l2_ld_hit_ratio"
2069 },
2070 {
2071 "BriefDescription": "Fraction of L2 load misses per L1 load ref",
2072 "MetricExpr": "PM_DATA_FROM_L2MISS / PM_LD_REF_L1",
2073 "MetricName": "l2_ld_miss_ratio"
2074 },
2075 {
2076 "BriefDescription": "Fraction of L2 load hits per L1 load ref where the L2 experienced a Load-Hit-Store conflict",
2077 "MetricExpr": "PM_DATA_FROM_L2_DISP_CONFLICT_LDHITST / PM_LD_REF_L1",
2078 "MetricName": "l2_lhs_ld_hit_ratio"
2079 },
2080 {
2081 "BriefDescription": "Fraction of L2 load hits per L1 load ref where the L2 did not experience a conflict",
2082 "MetricExpr": "PM_DATA_FROM_L2_NO_CONFLICT / PM_LD_REF_L1",
2083 "MetricName": "l2_no_conflict_ld_hit_ratio"
2084 },
2085 {
2086 "BriefDescription": "Fraction of L2 load hits per L1 load ref where the L2 experienced some conflict other than Load-Hit-Store",
2087 "MetricExpr": "PM_DATA_FROM_L2_DISP_CONFLICT_OTHER / PM_LD_REF_L1",
2088 "MetricName": "l2_other_conflict_ld_hit_ratio"
2089 },
2090 {
2091 "BriefDescription": "Average number of Read/Claim machines used. 1 of 16 RC machines is sampled every L2 cycle",
2092 "MetricExpr": "(PM_RC_USAGE / PM_RUN_CYC) * 16",
2093 "MetricName": "l2_rc_usage"
2094 },
2095 {
2096 "BriefDescription": "Average number of Snoop machines used. 1 of 8 SN machines is sampled every L2 cycle",
2097 "MetricExpr": "(PM_SN_USAGE / PM_RUN_CYC) * 8",
2098 "MetricName": "l2_sn_usage"
2099 },
2100 {
2101 "BriefDescription": "Marked L31 Load latency",
2102 "MetricExpr": "(PM_MRK_DATA_FROM_L31_SHR_CYC + PM_MRK_DATA_FROM_L31_MOD_CYC) / (PM_MRK_DATA_FROM_L31_SHR + PM_MRK_DATA_FROM_L31_MOD)",
2103 "MetricName": "l31_latency"
2104 },
2105 {
2106 "BriefDescription": "Fraction of hits on another core's L3 on the same chip per L1 load ref",
2107 "MetricExpr": "(PM_DATA_FROM_L31_MOD + PM_DATA_FROM_L31_SHR) / PM_LD_REF_L1",
2108 "MetricName": "l3_1_ld_hit_ratio"
2109 },
2110 {
2111 "BriefDescription": "Fraction of hits of a line in the M (exclusive) state on another core's L3 on the same chip per L1 load ref",
2112 "MetricExpr": "PM_DATA_FROM_L31_MOD / PM_LD_REF_L1",
2113 "MetricName": "l3_1_mod_ld_hit_ratio"
2114 },
2115 {
2116 "BriefDescription": "Fraction of hits of a line in the S state on another core's L3 on the same chip per L1 load ref",
2117 "MetricExpr": "PM_DATA_FROM_L31_SHR / PM_LD_REF_L1",
2118 "MetricName": "l3_1_shr_ld_hit_ratio"
2119 },
2120 {
2121 "BriefDescription": "Fraction of L3 load hits per load ref where the demand load collided with a pending prefetch",
2122 "MetricExpr": "PM_DATA_FROM_L3_DISP_CONFLICT / PM_LD_REF_L1",
2123 "MetricName": "l3_conflict_ld_hit_ratio"
2124 },
2125 {
2126 "BriefDescription": "Fraction of L3 load hits per L1 load ref",
2127 "MetricExpr": "PM_DATA_FROM_L3 / PM_LD_REF_L1",
2128 "MetricName": "l3_ld_hit_ratio"
2129 },
2130 {
2131 "BriefDescription": "Fraction of L3 load misses per L1 load ref",
2132 "MetricExpr": "PM_DATA_FROM_L3MISS / PM_LD_REF_L1",
2133 "MetricName": "l3_ld_miss_ratio"
2134 },
2135 {
2136 "BriefDescription": "Fraction of L3 load hits per load ref where the L3 did not experience a conflict",
2137 "MetricExpr": "PM_DATA_FROM_L3_NO_CONFLICT / PM_LD_REF_L1",
2138 "MetricName": "l3_no_conflict_ld_hit_ratio"
2139 },
2140 {
2141 "BriefDescription": "Fraction of L3 hits on lines that were not in the MEPF state per L1 load ref",
2142 "MetricExpr": "(PM_DATA_FROM_L3 - PM_DATA_FROM_L3_MEPF) / PM_LD_REF_L1",
2143 "MetricName": "l3other_ld_hit_ratio"
2144 },
2145 {
2146 "BriefDescription": "Fraction of L3 hits on lines that were recently prefetched into the L3 (MEPF state) per L1 load ref",
2147 "MetricExpr": "PM_DATA_FROM_L3_MEPF / PM_LD_REF_L1",
2148 "MetricName": "l3pref_ld_hit_ratio"
2149 },
2150 {
2151 "BriefDescription": "Fraction of hits on a local Centaur's cache per L1 load ref",
2152 "MetricExpr": "PM_DATA_FROM_LL4 / PM_LD_REF_L1",
2153 "MetricName": "ll4_ld_hit_ratio"
2154 },
2155 {
2156 "BriefDescription": "Fraction of hits on a local Centaur's DRAM per L1 load ref",
2157 "MetricExpr": "PM_DATA_FROM_LMEM / PM_LD_REF_L1",
2158 "MetricName": "lmem_ld_hit_ratio"
2159 },
2160 {
2161 "BriefDescription": "Fraction of hits on a local Centaur (L4 or DRAM) per L1 load ref",
2162 "MetricExpr": "(PM_DATA_FROM_LMEM + PM_DATA_FROM_LL4) / PM_LD_REF_L1",
2163 "MetricName": "local_centaur_ld_hit_ratio"
2164 },
2165 {
2166 "BriefDescription": "Cycles stalled by Other LSU Operations",
2167 "MetricExpr": "(PM_CMPLU_STALL_LSU - PM_CMPLU_STALL_REJECT - PM_CMPLU_STALL_DCACHE_MISS - PM_CMPLU_STALL_STORE) / (PM_LD_REF_L1 - PM_LD_MISS_L1)",
2168 "MetricName": "lsu_stall_avg_cyc_per_l1hit_stfw"
2169 },
2170 {
2171 "BriefDescription": "Fraction of hits on another core's L2 or L3 on a different chip (remote or distant) per L1 load ref",
2172 "MetricExpr": "PM_DATA_FROM_OFF_CHIP_CACHE / PM_LD_REF_L1",
2173 "MetricName": "off_chip_cache_ld_hit_ratio"
2174 },
2175 {
2176 "BriefDescription": "Fraction of hits on another core's L2 or L3 on the same chip per L1 load ref",
2177 "MetricExpr": "PM_DATA_FROM_ON_CHIP_CACHE / PM_LD_REF_L1",
2178 "MetricName": "on_chip_cache_ld_hit_ratio"
2179 },
2180 {
2181 "BriefDescription": "Fraction of hits on a remote chip's Centaur (L4 or DRAM) per L1 load ref",
2182 "MetricExpr": "(PM_DATA_FROM_RMEM + PM_DATA_FROM_RL4) / PM_LD_REF_L1",
2183 "MetricName": "remote_centaur_ld_hit_ratio"
2184 },
2185 {
2186 "BriefDescription": "Percent of all FXU/VSU instructions that got rejected because of unavailable resources or facilities",
2187 "MetricExpr": "PM_ISU_REJECT_RES_NA *100/ PM_RUN_INST_CMPL",
2188 "MetricName": "resource_na_reject_rate_percent"
2189 },
2190 {
2191 "BriefDescription": "Fraction of hits of a line in the M (exclusive) state on the L2 or L3 of a core on a remote chip per L1 load ref",
2192 "MetricExpr": "PM_DATA_FROM_RL2L3_MOD / PM_LD_REF_L1",
2193 "MetricName": "rl2l3_mod_ld_hit_ratio"
2194 },
2195 {
2196 "BriefDescription": "Fraction of hits of a line in the S state on the L2 or L3 of a core on a remote chip per L1 load ref",
2197 "MetricExpr": "PM_DATA_FROM_RL2L3_SHR / PM_LD_REF_L1",
2198 "MetricName": "rl2l3_shr_ld_hit_ratio"
2199 },
2200 {
2201 "BriefDescription": "Fraction of hits on a remote Centaur's cache per L1 load ref",
2202 "MetricExpr": "PM_DATA_FROM_RL4 / PM_LD_REF_L1",
2203 "MetricName": "rl4_ld_hit_ratio"
2204 },
2205 {
2206 "BriefDescription": "Fraction of hits on a remote Centaur's DRAM per L1 load ref",
2207 "MetricExpr": "PM_DATA_FROM_RMEM / PM_LD_REF_L1",
2208 "MetricName": "rmem_ld_hit_ratio"
2209 },
2210 {
2211 "BriefDescription": "Percent of all FXU/VSU instructions that got rejected due to SAR Bypass",
2212 "MetricExpr": "PM_ISU_REJECT_SAR_BYPASS *100/ PM_RUN_INST_CMPL",
2213 "MetricName": "sar_bypass_reject_rate_percent"
2214 },
2215 {
2216 "BriefDescription": "Percent of all FXU/VSU instructions that got rejected because of unavailable sources",
2217 "MetricExpr": "PM_ISU_REJECT_SRC_NA *100/ PM_RUN_INST_CMPL",
2218 "MetricName": "source_na_reject_rate_percent"
2219 },
2220 {
2221 "BriefDescription": "Store forward rate",
2222 "MetricExpr": "100 * (PM_LSU0_SRQ_STFWD + PM_LSU1_SRQ_STFWD) / PM_RUN_INST_CMPL",
2223 "MetricName": "store_forward_rate_percent"
2224 },
2225 {
2226 "BriefDescription": "Store forward rate",
2227 "MetricExpr": "100 * (PM_LSU0_SRQ_STFWD + PM_LSU1_SRQ_STFWD) / (PM_LD_REF_L1 - PM_LD_MISS_L1)",
2228 "MetricName": "store_forward_ratio_percent"
2229 },
2230 {
2231 "BriefDescription": "Marked store latency, from core completion to L2 RC machine completion",
2232 "MetricExpr": "(PM_MRK_ST_L2DISP_TO_CMPL_CYC + PM_MRK_ST_DRAIN_TO_L2DISP_CYC) / PM_MRK_ST_NEST",
2233 "MetricName": "store_latency"
2234 },
2235 {
2236 "BriefDescription": "Cycles stalled by any sync",
2237 "MetricExpr": "(PM_CMPLU_STALL_LWSYNC + PM_CMPLU_STALL_HWSYNC) / PM_RUN_INST_CMPL",
2238 "MetricName": "sync_stall_cpi"
2239 },
2240 {
2241 "BriefDescription": "Percentage of lines that were prefetched into the L3 and evicted before they were consumed",
2242 "MetricExpr": "(PM_L3_CO_MEPF / 2) / PM_L3_PREF_ALL * 100",
2243 "MetricName": "wasted_l3_prefetch_percent"
2244 }
2245]
diff --git a/tools/perf/pmu-events/arch/powerpc/power9/metrics.json b/tools/perf/pmu-events/arch/powerpc/power9/metrics.json
new file mode 100644
index 000000000000..811c2a8c1c9e
--- /dev/null
+++ b/tools/perf/pmu-events/arch/powerpc/power9/metrics.json
@@ -0,0 +1,1982 @@
1[
2 {
3 "MetricExpr": "PM_BR_MPRED_CMPL / PM_BR_PRED * 100",
4 "MetricGroup": "branch_prediction",
5 "MetricName": "br_misprediction_percent"
6 },
7 {
8 "BriefDescription": "Count cache branch misprediction per instruction",
9 "MetricExpr": "PM_BR_MPRED_CCACHE / PM_RUN_INST_CMPL * 100",
10 "MetricGroup": "branch_prediction",
11 "MetricName": "ccache_mispredict_rate_percent"
12 },
13 {
14 "BriefDescription": "Count cache branch misprediction",
15 "MetricExpr": "PM_BR_MPRED_CCACHE / PM_BR_PRED_CCACHE * 100",
16 "MetricGroup": "branch_prediction",
17 "MetricName": "ccache_misprediction_percent"
18 },
19 {
20 "BriefDescription": "Link stack branch misprediction",
21 "MetricExpr": "PM_BR_MPRED_LSTACK / PM_RUN_INST_CMPL * 100",
22 "MetricGroup": "branch_prediction",
23 "MetricName": "lstack_mispredict_rate_percent"
24 },
25 {
26 "BriefDescription": "Link stack branch misprediction",
27 "MetricExpr": "PM_BR_MPRED_LSTACK/ PM_BR_PRED_LSTACK * 100",
28 "MetricGroup": "branch_prediction",
29 "MetricName": "lstack_misprediction_percent"
30 },
31 {
32 "BriefDescription": "% Branches Taken",
33 "MetricExpr": "PM_BR_TAKEN_CMPL * 100 / PM_BRU_FIN",
34 "MetricGroup": "branch_prediction",
35 "MetricName": "taken_branches_percent"
36 },
37 {
38 "BriefDescription": "Completion stall due to a Branch Unit",
39 "MetricExpr": "PM_CMPLU_STALL_BRU/PM_RUN_INST_CMPL",
40 "MetricGroup": "cpi_breakdown",
41 "MetricName": "bru_stall_cpi"
42 },
43 {
44 "BriefDescription": "Finish stall because the NTF instruction was routed to the crypto execution pipe and was waiting to finish",
45 "MetricExpr": "PM_CMPLU_STALL_CRYPTO/PM_RUN_INST_CMPL",
46 "MetricGroup": "cpi_breakdown",
47 "MetricName": "crypto_stall_cpi"
48 },
49 {
50 "BriefDescription": "Finish stall because the NTF instruction was a load that missed the L1 and was waiting for the data to return from the nest",
51 "MetricExpr": "PM_CMPLU_STALL_DCACHE_MISS/PM_RUN_INST_CMPL",
52 "MetricGroup": "cpi_breakdown",
53 "MetricName": "dcache_miss_stall_cpi"
54 },
55 {
56 "BriefDescription": "Finish stall because the NTF instruction was a multi-cycle instruction issued to the Decimal Floating Point execution pipe and waiting to finish.",
57 "MetricExpr": "PM_CMPLU_STALL_DFLONG/PM_RUN_INST_CMPL",
58 "MetricGroup": "cpi_breakdown",
59 "MetricName": "dflong_stall_cpi"
60 },
61 {
62 "BriefDescription": "Stalls due to short latency decimal floating ops.",
63 "MetricExpr": "(PM_CMPLU_STALL_DFU - PM_CMPLU_STALL_DFLONG)/PM_RUN_INST_CMPL",
64 "MetricGroup": "cpi_breakdown",
65 "MetricName": "dfu_other_stall_cpi"
66 },
67 {
68 "BriefDescription": "Finish stall because the NTF instruction was issued to the Decimal Floating Point execution pipe and waiting to finish.",
69 "MetricExpr": "PM_CMPLU_STALL_DFU/PM_RUN_INST_CMPL",
70 "MetricGroup": "cpi_breakdown",
71 "MetricName": "dfu_stall_cpi"
72 },
73 {
74 "BriefDescription": "Completion stall by Dcache miss which resolved off node memory/cache",
75 "MetricExpr": "(PM_CMPLU_STALL_DMISS_L3MISS - PM_CMPLU_STALL_DMISS_L21_L31 - PM_CMPLU_STALL_DMISS_LMEM - PM_CMPLU_STALL_DMISS_REMOTE)/PM_RUN_INST_CMPL",
76 "MetricGroup": "cpi_breakdown",
77 "MetricName": "dmiss_distant_stall_cpi"
78 },
79 {
80 "BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)",
81 "MetricExpr": "PM_CMPLU_STALL_DMISS_L21_L31/PM_RUN_INST_CMPL",
82 "MetricGroup": "cpi_breakdown",
83 "MetricName": "dmiss_l21_l31_stall_cpi"
84 },
85 {
86 "BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a conflict",
87 "MetricExpr": "PM_CMPLU_STALL_DMISS_L2L3_CONFLICT/PM_RUN_INST_CMPL",
88 "MetricGroup": "cpi_breakdown",
89 "MetricName": "dmiss_l2l3_conflict_stall_cpi"
90 },
91 {
92 "BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 without conflict",
93 "MetricExpr": "(PM_CMPLU_STALL_DMISS_L2L3 - PM_CMPLU_STALL_DMISS_L2L3_CONFLICT)/PM_RUN_INST_CMPL",
94 "MetricGroup": "cpi_breakdown",
95 "MetricName": "dmiss_l2l3_noconflict_stall_cpi"
96 },
97 {
98 "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3",
99 "MetricExpr": "PM_CMPLU_STALL_DMISS_L2L3/PM_RUN_INST_CMPL",
100 "MetricGroup": "cpi_breakdown",
101 "MetricName": "dmiss_l2l3_stall_cpi"
102 },
103 {
104 "BriefDescription": "Completion stall due to cache miss resolving missed the L3",
105 "MetricExpr": "PM_CMPLU_STALL_DMISS_L3MISS/PM_RUN_INST_CMPL",
106 "MetricGroup": "cpi_breakdown",
107 "MetricName": "dmiss_l3miss_stall_cpi"
108 },
109 {
110 "BriefDescription": "Completion stall due to cache miss that resolves in local memory",
111 "MetricExpr": "PM_CMPLU_STALL_DMISS_LMEM/PM_RUN_INST_CMPL",
112 "MetricGroup": "cpi_breakdown",
113 "MetricName": "dmiss_lmem_stall_cpi"
114 },
115 {
116 "BriefDescription": "Completion stall by Dcache miss which resolved outside of local memory",
117 "MetricExpr": "(PM_CMPLU_STALL_DMISS_L3MISS - PM_CMPLU_STALL_DMISS_L21_L31 - PM_CMPLU_STALL_DMISS_LMEM)/PM_RUN_INST_CMPL",
118 "MetricGroup": "cpi_breakdown",
119 "MetricName": "dmiss_non_local_stall_cpi"
120 },
121 {
122 "BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or memory)",
123 "MetricExpr": "PM_CMPLU_STALL_DMISS_REMOTE/PM_RUN_INST_CMPL",
124 "MetricGroup": "cpi_breakdown",
125 "MetricName": "dmiss_remote_stall_cpi"
126 },
127 {
128 "BriefDescription": "Stalls due to short latency double precision ops.",
129 "MetricExpr": "(PM_CMPLU_STALL_DP - PM_CMPLU_STALL_DPLONG)/PM_RUN_INST_CMPL",
130 "MetricGroup": "cpi_breakdown",
131 "MetricName": "dp_other_stall_cpi"
132 },
133 {
134 "BriefDescription": "Finish stall because the NTF instruction was a scalar instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format.",
135 "MetricExpr": "PM_CMPLU_STALL_DP/PM_RUN_INST_CMPL",
136 "MetricGroup": "cpi_breakdown",
137 "MetricName": "dp_stall_cpi"
138 },
139 {
140 "BriefDescription": "Finish stall because the NTF instruction was a scalar multi-cycle instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format.",
141 "MetricExpr": "PM_CMPLU_STALL_DPLONG/PM_RUN_INST_CMPL",
142 "MetricGroup": "cpi_breakdown",
143 "MetricName": "dplong_stall_cpi"
144 },
145 {
146 "BriefDescription": "Finish stall because the NTF instruction is an EIEIO waiting for response from L2",
147 "MetricExpr": "PM_CMPLU_STALL_EIEIO/PM_RUN_INST_CMPL",
148 "MetricGroup": "cpi_breakdown",
149 "MetricName": "eieio_stall_cpi"
150 },
151 {
152 "BriefDescription": "Finish stall because the next to finish instruction suffered an ERAT miss and the EMQ was full",
153 "MetricExpr": "PM_CMPLU_STALL_EMQ_FULL/PM_RUN_INST_CMPL",
154 "MetricGroup": "cpi_breakdown",
155 "MetricName": "emq_full_stall_cpi"
156 },
157 {
158 "MetricExpr": "(PM_CMPLU_STALL_ERAT_MISS + PM_CMPLU_STALL_EMQ_FULL)/PM_RUN_INST_CMPL",
159 "MetricGroup": "cpi_breakdown",
160 "MetricName": "emq_stall_cpi"
161 },
162 {
163 "BriefDescription": "Finish stall because the NTF instruction was a load or store that suffered a translation miss",
164 "MetricExpr": "PM_CMPLU_STALL_ERAT_MISS/PM_RUN_INST_CMPL",
165 "MetricGroup": "cpi_breakdown",
166 "MetricName": "erat_miss_stall_cpi"
167 },
168 {
169 "BriefDescription": "Cycles in which the NTC instruction is not allowed to complete because it was interrupted by ANY exception, which has to be serviced before the instruction can complete",
170 "MetricExpr": "PM_CMPLU_STALL_EXCEPTION/PM_RUN_INST_CMPL",
171 "MetricGroup": "cpi_breakdown",
172 "MetricName": "exception_stall_cpi"
173 },
174 {
175 "BriefDescription": "Completion stall due to execution units for other reasons.",
176 "MetricExpr": "(PM_CMPLU_STALL_EXEC_UNIT - PM_CMPLU_STALL_FXU - PM_CMPLU_STALL_DP - PM_CMPLU_STALL_DFU - PM_CMPLU_STALL_PM - PM_CMPLU_STALL_CRYPTO - PM_CMPLU_STALL_VFXU - PM_CMPLU_STALL_VDP)/PM_RUN_INST_CMPL",
177 "MetricGroup": "cpi_breakdown",
178 "MetricName": "exec_unit_other_stall_cpi"
179 },
180 {
181 "BriefDescription": "Completion stall due to execution units (FXU/VSU/CRU)",
182 "MetricExpr": "PM_CMPLU_STALL_EXEC_UNIT/PM_RUN_INST_CMPL",
183 "MetricGroup": "cpi_breakdown",
184 "MetricName": "exec_unit_stall_cpi"
185 },
186 {
187 "BriefDescription": "Cycles in which the NTC instruction is not allowed to complete because any of the 4 threads in the same core suffered a flush, which blocks completion",
188 "MetricExpr": "PM_CMPLU_STALL_FLUSH_ANY_THREAD/PM_RUN_INST_CMPL",
189 "MetricGroup": "cpi_breakdown",
190 "MetricName": "flush_any_thread_stall_cpi"
191 },
192 {
193 "BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (division, square root)",
194 "MetricExpr": "PM_CMPLU_STALL_FXLONG/PM_RUN_INST_CMPL",
195 "MetricGroup": "cpi_breakdown",
196 "MetricName": "fxlong_stall_cpi"
197 },
198 {
199 "BriefDescription": "Stalls due to short latency integer ops",
200 "MetricExpr": "(PM_CMPLU_STALL_FXU - PM_CMPLU_STALL_FXLONG)/PM_RUN_INST_CMPL",
201 "MetricGroup": "cpi_breakdown",
202 "MetricName": "fxu_other_stall_cpi"
203 },
204 {
205 "BriefDescription": "Finish stall due to a scalar fixed point or CR instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes",
206 "MetricExpr": "PM_CMPLU_STALL_FXU/PM_RUN_INST_CMPL",
207 "MetricGroup": "cpi_breakdown",
208 "MetricName": "fxu_stall_cpi"
209 },
210 {
211 "MetricExpr": "(PM_NTC_ISSUE_HELD_DARQ_FULL + PM_NTC_ISSUE_HELD_ARB + PM_NTC_ISSUE_HELD_OTHER)/PM_RUN_INST_CMPL",
212 "MetricGroup": "cpi_breakdown",
213 "MetricName": "issue_hold_cpi"
214 },
215 {
216 "BriefDescription": "Finish stall because the NTF instruction was a larx waiting to be satisfied",
217 "MetricExpr": "PM_CMPLU_STALL_LARX/PM_RUN_INST_CMPL",
218 "MetricGroup": "cpi_breakdown",
219 "MetricName": "larx_stall_cpi"
220 },
221 {
222 "BriefDescription": "Finish stall because the NTF instruction was a load that hit on an older store and it was waiting for store data",
223 "MetricExpr": "PM_CMPLU_STALL_LHS/PM_RUN_INST_CMPL",
224 "MetricGroup": "cpi_breakdown",
225 "MetricName": "lhs_stall_cpi"
226 },
227 {
228 "BriefDescription": "Finish stall because the NTF instruction was a load that missed in the L1 and the LMQ was unable to accept this load miss request because it was full",
229 "MetricExpr": "PM_CMPLU_STALL_LMQ_FULL/PM_RUN_INST_CMPL",
230 "MetricGroup": "cpi_breakdown",
231 "MetricName": "lmq_full_stall_cpi"
232 },
233 {
234 "BriefDescription": "Finish stall because the NTF instruction was a load instruction with all its dependencies satisfied just going through the LSU pipe to finish",
235 "MetricExpr": "PM_CMPLU_STALL_LOAD_FINISH/PM_RUN_INST_CMPL",
236 "MetricGroup": "cpi_breakdown",
237 "MetricName": "load_finish_stall_cpi"
238 },
239 {
240 "BriefDescription": "Finish stall because the NTF instruction was a load that was held in LSAQ because the LRQ was full",
241 "MetricExpr": "PM_CMPLU_STALL_LRQ_FULL/PM_RUN_INST_CMPL",
242 "MetricGroup": "cpi_breakdown",
243 "MetricName": "lrq_full_stall_cpi"
244 },
245 {
246 "BriefDescription": "Finish stall due to LRQ miscellaneous reasons, lost arbitration to LMQ slot, bank collisions, set prediction cleanup, set prediction multihit and others",
247 "MetricExpr": "PM_CMPLU_STALL_LRQ_OTHER/PM_RUN_INST_CMPL",
248 "MetricGroup": "cpi_breakdown",
249 "MetricName": "lrq_other_stall_cpi"
250 },
251 {
252 "MetricExpr": "(PM_CMPLU_STALL_LMQ_FULL + PM_CMPLU_STALL_ST_FWD + PM_CMPLU_STALL_LHS + PM_CMPLU_STALL_LSU_MFSPR + PM_CMPLU_STALL_LARX + PM_CMPLU_STALL_LRQ_OTHER)/PM_RUN_INST_CMPL",
253 "MetricGroup": "cpi_breakdown",
254 "MetricName": "lrq_stall_cpi"
255 },
256 {
257 "BriefDescription": "Finish stall because the NTF instruction was a load or store that was held in LSAQ because an older instruction from SRQ or LRQ won arbitration to the LSU pipe when this instruction tried to launch",
258 "MetricExpr": "PM_CMPLU_STALL_LSAQ_ARB/PM_RUN_INST_CMPL",
259 "MetricGroup": "cpi_breakdown",
260 "MetricName": "lsaq_arb_stall_cpi"
261 },
262 {
263 "MetricExpr": "(PM_CMPLU_STALL_LRQ_FULL + PM_CMPLU_STALL_SRQ_FULL + PM_CMPLU_STALL_LSAQ_ARB)/PM_RUN_INST_CMPL",
264 "MetricGroup": "cpi_breakdown",
265 "MetricName": "lsaq_stall_cpi"
266 },
267 {
268 "BriefDescription": "Finish stall because the NTF instruction was an LSU op (other than a load or a store) with all its dependencies met and just going through the LSU pipe to finish",
269 "MetricExpr": "PM_CMPLU_STALL_LSU_FIN/PM_RUN_INST_CMPL",
270 "MetricGroup": "cpi_breakdown",
271 "MetricName": "lsu_fin_stall_cpi"
272 },
273 {
274 "BriefDescription": "Completion stall of one cycle because the LSU requested to flush the next iop in the sequence. It takes 1 cycle for the ISU to process this request before the LSU instruction is allowed to complete",
275 "MetricExpr": "PM_CMPLU_STALL_LSU_FLUSH_NEXT/PM_RUN_INST_CMPL",
276 "MetricGroup": "cpi_breakdown",
277 "MetricName": "lsu_flush_next_stall_cpi"
278 },
279 {
280 "BriefDescription": "Finish stall because the NTF instruction was a mfspr instruction targeting an LSU SPR and it was waiting for the register data to be returned",
281 "MetricExpr": "PM_CMPLU_STALL_LSU_MFSPR/PM_RUN_INST_CMPL",
282 "MetricGroup": "cpi_breakdown",
283 "MetricName": "lsu_mfspr_stall_cpi"
284 },
285 {
286 "BriefDescription": "Completion LSU stall for other reasons",
287 "MetricExpr": "(PM_CMPLU_STALL_LSU - PM_CMPLU_STALL_LSU_FIN - PM_CMPLU_STALL_STORE_FINISH - PM_CMPLU_STALL_STORE_DATA - PM_CMPLU_STALL_EIEIO - PM_CMPLU_STALL_STCX - PM_CMPLU_STALL_SLB - PM_CMPLU_STALL_TEND - PM_CMPLU_STALL_PASTE - PM_CMPLU_STALL_TLBIE - PM_CMPLU_STALL_STORE_PIPE_ARB - PM_CMPLU_STALL_STORE_FIN_ARB - PM_CMPLU_STALL_LOAD_FINISH + PM_CMPLU_STALL_DCACHE_MISS - PM_CMPLU_STALL_LMQ_FULL - PM_CMPLU_STALL_ST_FWD - PM_CMPLU_STALL_LHS - PM_CMPLU_STALL_LSU_MFSPR - PM_CMPLU_STALL_LARX - PM_CMPLU_STALL_LRQ_OTHER + PM_CMPLU_STALL_ERAT_MISS + PM_CMPLU_STALL_EMQ_FULL - PM_CMPLU_STALL_LRQ_FULL - PM_CMPLU_STALL_SRQ_FULL - PM_CMPLU_STALL_LSAQ_ARB) / PM_RUN_INST_CMPL",
288 "MetricGroup": "cpi_breakdown",
289 "MetricName": "lsu_other_stall_cpi"
290 },
291 {
292 "BriefDescription": "Completion stall by LSU instruction",
293 "MetricExpr": "PM_CMPLU_STALL_LSU/PM_RUN_INST_CMPL",
294 "MetricGroup": "cpi_breakdown",
295 "MetricName": "lsu_stall_cpi"
296 },
297 {
298 "BriefDescription": "Completion stall because the ISU is updating the register and notifying the Effective Address Table (EAT)",
299 "MetricExpr": "PM_CMPLU_STALL_MTFPSCR/PM_RUN_INST_CMPL",
300 "MetricGroup": "cpi_breakdown",
301 "MetricName": "mtfpscr_stall_cpi"
302 },
303 {
304 "BriefDescription": "Completion stall because the ISU is updating the TEXASR to keep track of the nested tbegin. This is a short delay, and it includes ROT",
305 "MetricExpr": "PM_CMPLU_STALL_NESTED_TBEGIN/PM_RUN_INST_CMPL",
306 "MetricGroup": "cpi_breakdown",
307 "MetricName": "nested_tbegin_stall_cpi"
308 },
309 {
310 "BriefDescription": "Completion stall because the ISU is updating the TEXASR to keep track of the nested tend and decrement the TEXASR nested level. This is a short delay",
311 "MetricExpr": "PM_CMPLU_STALL_NESTED_TEND/PM_RUN_INST_CMPL",
312 "MetricGroup": "cpi_breakdown",
313 "MetricName": "nested_tend_stall_cpi"
314 },
315 {
316 "BriefDescription": "Number of cycles the ICT has no itags assigned to this thread",
317 "MetricExpr": "PM_ICT_NOSLOT_CYC/PM_RUN_INST_CMPL",
318 "MetricGroup": "cpi_breakdown",
319 "MetricName": "nothing_dispatched_cpi"
320 },
321 {
322 "BriefDescription": "Finish stall because the NTF instruction was one that must finish at dispatch.",
323 "MetricExpr": "PM_CMPLU_STALL_NTC_DISP_FIN/PM_RUN_INST_CMPL",
324 "MetricGroup": "cpi_breakdown",
325 "MetricName": "ntc_disp_fin_stall_cpi"
326 },
327 {
328 "BriefDescription": "Cycles in which the oldest instruction in the pipeline (NTC) finishes. This event is used to account for cycles in which work is being completed in the CPI stack",
329 "MetricExpr": "PM_NTC_FIN/PM_RUN_INST_CMPL",
330 "MetricGroup": "cpi_breakdown",
331 "MetricName": "ntc_fin_cpi"
332 },
333 {
334 "BriefDescription": "Completion stall due to ntc flush",
335 "MetricExpr": "PM_CMPLU_STALL_NTC_FLUSH/PM_RUN_INST_CMPL",
336 "MetricGroup": "cpi_breakdown",
337 "MetricName": "ntc_flush_stall_cpi"
338 },
339 {
340 "BriefDescription": "The NTC instruction is being held at dispatch because it lost arbitration onto the issue pipe to another instruction (from the same thread or a different thread)",
341 "MetricExpr": "PM_NTC_ISSUE_HELD_ARB/PM_RUN_INST_CMPL",
342 "MetricGroup": "cpi_breakdown",
343 "MetricName": "ntc_issue_held_arb_cpi"
344 },
345 {
346 "BriefDescription": "The NTC instruction is being held at dispatch because there are no slots in the DARQ for it",
347 "MetricExpr": "PM_NTC_ISSUE_HELD_DARQ_FULL/PM_RUN_INST_CMPL",
348 "MetricGroup": "cpi_breakdown",
349 "MetricName": "ntc_issue_held_darq_full_cpi"
350 },
351 {
352 "BriefDescription": "The NTC instruction is being held at dispatch during regular pipeline cycles, or because the VSU is busy with multi-cycle instructions, or because of a write-back collision with VSU",
353 "MetricExpr": "PM_NTC_ISSUE_HELD_OTHER/PM_RUN_INST_CMPL",
354 "MetricGroup": "cpi_breakdown",
355 "MetricName": "ntc_issue_held_other_cpi"
356 },
357 {
358 "BriefDescription": "Cycles unaccounted for.",
359 "MetricExpr": "(PM_RUN_CYC - PM_1PLUS_PPC_CMPL - PM_CMPLU_STALL_THRD - PM_CMPLU_STALL - PM_ICT_NOSLOT_CYC)/PM_RUN_INST_CMPL",
360 "MetricGroup": "cpi_breakdown",
361 "MetricName": "other_cpi"
362 },
363 {
364 "BriefDescription": "Completion stall for other reasons",
365 "MetricExpr": "PM_CMPLU_STALL - PM_CMPLU_STALL_NTC_DISP_FIN - PM_CMPLU_STALL_NTC_FLUSH - PM_CMPLU_STALL_LSU - PM_CMPLU_STALL_EXEC_UNIT - PM_CMPLU_STALL_BRU)/PM_RUN_INST_CMPL",
366 "MetricGroup": "cpi_breakdown",
367 "MetricName": "other_stall_cpi"
368 },
369 {
370 "BriefDescription": "Finish stall because the NTF instruction was a paste waiting for response from L2",
371 "MetricExpr": "PM_CMPLU_STALL_PASTE/PM_RUN_INST_CMPL",
372 "MetricGroup": "cpi_breakdown",
373 "MetricName": "paste_stall_cpi"
374 },
375 {
376 "BriefDescription": "Finish stall because the NTF instruction was issued to the Permute execution pipe and waiting to finish.",
377 "MetricExpr": "PM_CMPLU_STALL_PM/PM_RUN_INST_CMPL",
378 "MetricGroup": "cpi_breakdown",
379 "MetricName": "pm_stall_cpi"
380 },
381 {
382 "BriefDescription": "Run cycles per run instruction",
383 "MetricExpr": "PM_RUN_CYC / PM_RUN_INST_CMPL",
384 "MetricGroup": "cpi_breakdown",
385 "MetricName": "run_cpi"
386 },
387 {
388 "BriefDescription": "Run_cycles",
389 "MetricExpr": "PM_RUN_CYC/PM_RUN_INST_CMPL",
390 "MetricGroup": "cpi_breakdown",
391 "MetricName": "run_cyc_cpi"
392 },
393 {
394 "MetricExpr": "(PM_CMPLU_STALL_FXU + PM_CMPLU_STALL_DP + PM_CMPLU_STALL_DFU + PM_CMPLU_STALL_PM + PM_CMPLU_STALL_CRYPTO)/PM_RUN_INST_CMPL",
395 "MetricGroup": "cpi_breakdown",
396 "MetricName": "scalar_stall_cpi"
397 },
398 {
399 "BriefDescription": "Finish stall because the NTF instruction was awaiting L2 response for an SLB",
400 "MetricExpr": "PM_CMPLU_STALL_SLB/PM_RUN_INST_CMPL",
401 "MetricGroup": "cpi_breakdown",
402 "MetricName": "slb_stall_cpi"
403 },
404 {
405 "BriefDescription": "Finish stall while waiting for the non-speculative finish of either a stcx waiting for its result or a load waiting for non-critical sectors of data and ECC",
406 "MetricExpr": "PM_CMPLU_STALL_SPEC_FINISH/PM_RUN_INST_CMPL",
407 "MetricGroup": "cpi_breakdown",
408 "MetricName": "spec_finish_stall_cpi"
409 },
410 {
411 "BriefDescription": "Finish stall because the NTF instruction was a store that was held in LSAQ because the SRQ was full",
412 "MetricExpr": "PM_CMPLU_STALL_SRQ_FULL/PM_RUN_INST_CMPL",
413 "MetricGroup": "cpi_breakdown",
414 "MetricName": "srq_full_stall_cpi"
415 },
416 {
417 "MetricExpr": "(PM_CMPLU_STALL_STORE_DATA + PM_CMPLU_STALL_EIEIO + PM_CMPLU_STALL_STCX + PM_CMPLU_STALL_SLB + PM_CMPLU_STALL_TEND + PM_CMPLU_STALL_PASTE + PM_CMPLU_STALL_TLBIE + PM_CMPLU_STALL_STORE_PIPE_ARB + PM_CMPLU_STALL_STORE_FIN_ARB)/PM_RUN_INST_CMPL",
418 "MetricGroup": "cpi_breakdown",
419 "MetricName": "srq_stall_cpi"
420 },
421 {
422 "BriefDescription": "Completion stall due to store forward",
423 "MetricExpr": "PM_CMPLU_STALL_ST_FWD/PM_RUN_INST_CMPL",
424 "MetricGroup": "cpi_breakdown",
425 "MetricName": "st_fwd_stall_cpi"
426 },
427 {
428 "BriefDescription": "Nothing completed and ICT not empty",
429 "MetricExpr": "PM_CMPLU_STALL/PM_RUN_INST_CMPL",
430 "MetricGroup": "cpi_breakdown",
431 "MetricName": "stall_cpi"
432 },
433 {
434 "BriefDescription": "Finish stall because the NTF instruction was a stcx waiting for response from L2",
435 "MetricExpr": "PM_CMPLU_STALL_STCX/PM_RUN_INST_CMPL",
436 "MetricGroup": "cpi_breakdown",
437 "MetricName": "stcx_stall_cpi"
438 },
439 {
440 "BriefDescription": "Finish stall because the next to finish instruction was a store waiting on data",
441 "MetricExpr": "PM_CMPLU_STALL_STORE_DATA/PM_RUN_INST_CMPL",
442 "MetricGroup": "cpi_breakdown",
443 "MetricName": "store_data_stall_cpi"
444 },
445 {
446 "BriefDescription": "Finish stall because the NTF instruction was a store waiting for a slot in the store finish pipe. This means the instruction is ready to finish but there are instructions ahead of it, using the finish pipe",
447 "MetricExpr": "PM_CMPLU_STALL_STORE_FIN_ARB/PM_RUN_INST_CMPL",
448 "MetricGroup": "cpi_breakdown",
449 "MetricName": "store_fin_arb_stall_cpi"
450 },
451 {
452 "BriefDescription": "Finish stall because the NTF instruction was a store with all its dependencies met, just waiting to go through the LSU pipe to finish",
453 "MetricExpr": "PM_CMPLU_STALL_STORE_FINISH/PM_RUN_INST_CMPL",
454 "MetricGroup": "cpi_breakdown",
455 "MetricName": "store_finish_stall_cpi"
456 },
457 {
458 "BriefDescription": "Finish stall because the NTF instruction was a store waiting for the next relaunch opportunity after an internal reject. This means the instruction is ready to relaunch and tried once but lost arbitration",
459 "MetricExpr": "PM_CMPLU_STALL_STORE_PIPE_ARB/PM_RUN_INST_CMPL",
460 "MetricGroup": "cpi_breakdown",
461 "MetricName": "store_pipe_arb_stall_cpi"
462 },
463 {
464 "BriefDescription": "Finish stall because the NTF instruction was a tend instruction awaiting response from L2",
465 "MetricExpr": "PM_CMPLU_STALL_TEND/PM_RUN_INST_CMPL",
466 "MetricGroup": "cpi_breakdown",
467 "MetricName": "tend_stall_cpi"
468 },
469 {
470 "BriefDescription": "Completion Stalled because the thread was blocked",
471 "MetricExpr": "PM_CMPLU_STALL_THRD/PM_RUN_INST_CMPL",
472 "MetricGroup": "cpi_breakdown",
473 "MetricName": "thread_block_stall_cpi"
474 },
475 {
476 "BriefDescription": "Finish stall because the NTF instruction was a tlbie waiting for response from L2",
477 "MetricExpr": "PM_CMPLU_STALL_TLBIE/PM_RUN_INST_CMPL",
478 "MetricGroup": "cpi_breakdown",
479 "MetricName": "tlbie_stall_cpi"
480 },
481 {
482 "BriefDescription": "Vector stalls due to small latency double precision ops",
483 "MetricExpr": "(PM_CMPLU_STALL_VDP - PM_CMPLU_STALL_VDPLONG)/PM_RUN_INST_CMPL",
484 "MetricGroup": "cpi_breakdown",
485 "MetricName": "vdp_other_stall_cpi"
486 },
487 {
488 "BriefDescription": "Finish stall because the NTF instruction was a vector instruction issued to the Double Precision execution pipe and waiting to finish.",
489 "MetricExpr": "PM_CMPLU_STALL_VDP/PM_RUN_INST_CMPL",
490 "MetricGroup": "cpi_breakdown",
491 "MetricName": "vdp_stall_cpi"
492 },
493 {
494 "BriefDescription": "Finish stall because the NTF instruction was a scalar multi-cycle instruction issued to the Double Precision execution pipe and waiting to finish. Includes binary floating point instructions in 32 and 64 bit binary floating point format.",
495 "MetricExpr": "PM_CMPLU_STALL_VDPLONG/PM_RUN_INST_CMPL",
496 "MetricGroup": "cpi_breakdown",
497 "MetricName": "vdplong_stall_cpi"
498 },
499 {
500 "MetricExpr": "(PM_CMPLU_STALL_VFXU + PM_CMPLU_STALL_VDP)/PM_RUN_INST_CMPL",
501 "MetricGroup": "cpi_breakdown",
502 "MetricName": "vector_stall_cpi"
503 },
504 {
505 "BriefDescription": "Completion stall due to a long latency vector fixed point instruction (division, square root)",
506 "MetricExpr": "PM_CMPLU_STALL_VFXLONG/PM_RUN_INST_CMPL",
507 "MetricGroup": "cpi_breakdown",
508 "MetricName": "vfxlong_stall_cpi"
509 },
510 {
511 "BriefDescription": "Vector stalls due to small latency integer ops",
512 "MetricExpr": "(PM_CMPLU_STALL_VFXU - PM_CMPLU_STALL_VFXLONG)/PM_RUN_INST_CMPL",
513 "MetricGroup": "cpi_breakdown",
514 "MetricName": "vfxu_other_stall_cpi"
515 },
516 {
517 "BriefDescription": "Finish stall due to a vector fixed point instruction in the execution pipeline. These instructions get routed to the ALU, ALU2, and DIV pipes",
518 "MetricExpr": "PM_CMPLU_STALL_VFXU/PM_RUN_INST_CMPL",
519 "MetricGroup": "cpi_breakdown",
520 "MetricName": "vfxu_stall_cpi"
521 },
522 {
523 "BriefDescription": "% of DL1 Reloads from Distant L2 or L3 (Modified) per Inst",
524 "MetricExpr": "PM_DATA_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
525 "MetricGroup": "dl1_reloads_percent_per_inst",
526 "MetricName": "dl1_reload_from_dl2l3_mod_rate_percent"
527 },
528 {
529 "BriefDescription": "% of DL1 Reloads from Distant L2 or L3 (Shared) per Inst",
530 "MetricExpr": "PM_DATA_FROM_DL2L3_SHR * 100 / PM_RUN_INST_CMPL",
531 "MetricGroup": "dl1_reloads_percent_per_inst",
532 "MetricName": "dl1_reload_from_dl2l3_shr_rate_percent"
533 },
534 {
535 "BriefDescription": "% of DL1 Reloads from Distant Memory per Inst",
536 "MetricExpr": "PM_DATA_FROM_DMEM * 100 / PM_RUN_INST_CMPL",
537 "MetricGroup": "dl1_reloads_percent_per_inst",
538 "MetricName": "dl1_reload_from_dmem_rate_percent"
539 },
540 {
541 "BriefDescription": "% of DL1 reloads from Private L2, other core per Inst",
542 "MetricExpr": "PM_DATA_FROM_L21_MOD * 100 / PM_RUN_INST_CMPL",
543 "MetricGroup": "dl1_reloads_percent_per_inst",
544 "MetricName": "dl1_reload_from_l21_mod_rate_percent"
545 },
546 {
547 "BriefDescription": "% of DL1 reloads from Private L2, other core per Inst",
548 "MetricExpr": "PM_DATA_FROM_L21_SHR * 100 / PM_RUN_INST_CMPL",
549 "MetricGroup": "dl1_reloads_percent_per_inst",
550 "MetricName": "dl1_reload_from_l21_shr_rate_percent"
551 },
552 {
553 "BriefDescription": "% of DL1 reloads from L2 per Inst",
554 "MetricExpr": "PM_DATA_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
555 "MetricGroup": "dl1_reloads_percent_per_inst",
556 "MetricName": "dl1_reload_from_l2_miss_rate_percent"
557 },
558 {
559 "BriefDescription": "% of DL1 reloads from L2 per Inst",
560 "MetricExpr": "PM_DATA_FROM_L2 * 100 / PM_RUN_INST_CMPL",
561 "MetricGroup": "dl1_reloads_percent_per_inst",
562 "MetricName": "dl1_reload_from_l2_rate_percent"
563 },
564 {
565 "BriefDescription": "% of DL1 reloads from Private L3 M state, other core per Inst",
566 "MetricExpr": "PM_DATA_FROM_L31_MOD * 100 / PM_RUN_INST_CMPL",
567 "MetricGroup": "dl1_reloads_percent_per_inst",
568 "MetricName": "dl1_reload_from_l31_mod_rate_percent"
569 },
570 {
571 "BriefDescription": "% of DL1 reloads from Private L3 S tate, other core per Inst",
572 "MetricExpr": "PM_DATA_FROM_L31_SHR * 100 / PM_RUN_INST_CMPL",
573 "MetricGroup": "dl1_reloads_percent_per_inst",
574 "MetricName": "dl1_reload_from_l31_shr_rate_percent"
575 },
576 {
577 "BriefDescription": "% of DL1 Reloads that came from the L3 and were brought into the L3 by a prefetch, per instruction completed",
578 "MetricExpr": "PM_DATA_FROM_L3_MEPF * 100 / PM_RUN_INST_CMPL",
579 "MetricGroup": "dl1_reloads_percent_per_inst",
580 "MetricName": "dl1_reload_from_l3_mepf_rate_percent"
581 },
582 {
583 "BriefDescription": "% of DL1 reloads from L3 per Inst",
584 "MetricExpr": "PM_DATA_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
585 "MetricGroup": "dl1_reloads_percent_per_inst",
586 "MetricName": "dl1_reload_from_l3_miss_rate_percent"
587 },
588 {
589 "BriefDescription": "% of DL1 Reloads from L3 per Inst",
590 "MetricExpr": "PM_DATA_FROM_L3 * 100 / PM_RUN_INST_CMPL",
591 "MetricGroup": "dl1_reloads_percent_per_inst",
592 "MetricName": "dl1_reload_from_l3_rate_percent"
593 },
594 {
595 "BriefDescription": "% of DL1 Reloads from Local Memory per Inst",
596 "MetricExpr": "PM_DATA_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
597 "MetricGroup": "dl1_reloads_percent_per_inst",
598 "MetricName": "dl1_reload_from_lmem_rate_percent"
599 },
600 {
601 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
602 "MetricExpr": "PM_DATA_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
603 "MetricGroup": "dl1_reloads_percent_per_inst",
604 "MetricName": "dl1_reload_from_rl2l3_mod_rate_percent"
605 },
606 {
607 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
608 "MetricExpr": "PM_DATA_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
609 "MetricGroup": "dl1_reloads_percent_per_inst",
610 "MetricName": "dl1_reload_from_rl2l3_shr_rate_percent"
611 },
612 {
613 "BriefDescription": "% of DL1 Reloads from Remote Memory per Inst",
614 "MetricExpr": "PM_DATA_FROM_RMEM * 100 / PM_RUN_INST_CMPL",
615 "MetricGroup": "dl1_reloads_percent_per_inst",
616 "MetricName": "dl1_reload_from_rmem_rate_percent"
617 },
618 {
619 "BriefDescription": "Percentage of L1 demand load misses per run instruction",
620 "MetricExpr": "PM_LD_MISS_L1 * 100 / PM_RUN_INST_CMPL",
621 "MetricGroup": "dl1_reloads_percent_per_inst",
622 "MetricName": "l1_ld_miss_rate_percent"
623 },
624 {
625 "BriefDescription": "% of DL1 misses that result in a cache reload",
626 "MetricExpr": "PM_L1_DCACHE_RELOAD_VALID * 100 / PM_LD_MISS_L1",
627 "MetricGroup": "dl1_reloads_percent_per_ref",
628 "MetricName": "dl1_miss_reloads_percent"
629 },
630 {
631 "BriefDescription": "% of DL1 dL1_Reloads from Distant L2 or L3 (Modified)",
632 "MetricExpr": "PM_DATA_FROM_DL2L3_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
633 "MetricGroup": "dl1_reloads_percent_per_ref",
634 "MetricName": "dl1_reload_from_dl2l3_mod_percent"
635 },
636 {
637 "BriefDescription": "% of DL1 dL1_Reloads from Distant L2 or L3 (Shared)",
638 "MetricExpr": "PM_DATA_FROM_DL2L3_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
639 "MetricGroup": "dl1_reloads_percent_per_ref",
640 "MetricName": "dl1_reload_from_dl2l3_shr_percent"
641 },
642 {
643 "BriefDescription": "% of DL1 dL1_Reloads from Distant Memory",
644 "MetricExpr": "PM_DATA_FROM_DMEM * 100 / PM_L1_DCACHE_RELOAD_VALID",
645 "MetricGroup": "dl1_reloads_percent_per_ref",
646 "MetricName": "dl1_reload_from_dmem_percent"
647 },
648 {
649 "BriefDescription": "% of DL1 reloads from Private L2, other core",
650 "MetricExpr": "PM_DATA_FROM_L21_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
651 "MetricGroup": "dl1_reloads_percent_per_ref",
652 "MetricName": "dl1_reload_from_l21_mod_percent"
653 },
654 {
655 "BriefDescription": "% of DL1 reloads from Private L2, other core",
656 "MetricExpr": "PM_DATA_FROM_L21_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
657 "MetricGroup": "dl1_reloads_percent_per_ref",
658 "MetricName": "dl1_reload_from_l21_shr_percent"
659 },
660 {
661 "BriefDescription": "% of DL1 Reloads from sources beyond the local L2",
662 "MetricExpr": "PM_DATA_FROM_L2MISS * 100 / PM_L1_DCACHE_RELOAD_VALID",
663 "MetricGroup": "dl1_reloads_percent_per_ref",
664 "MetricName": "dl1_reload_from_l2_miss_percent"
665 },
666 {
667 "BriefDescription": "% of DL1 reloads from L2",
668 "MetricExpr": "PM_DATA_FROM_L2 * 100 / PM_L1_DCACHE_RELOAD_VALID",
669 "MetricGroup": "dl1_reloads_percent_per_ref",
670 "MetricName": "dl1_reload_from_l2_percent"
671 },
672 {
673 "BriefDescription": "% of DL1 reloads from Private L3, other core",
674 "MetricExpr": "PM_DATA_FROM_L31_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
675 "MetricGroup": "dl1_reloads_percent_per_ref",
676 "MetricName": "dl1_reload_from_l31_mod_percent"
677 },
678 {
679 "BriefDescription": "% of DL1 reloads from Private L3, other core",
680 "MetricExpr": "PM_DATA_FROM_L31_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
681 "MetricGroup": "dl1_reloads_percent_per_ref",
682 "MetricName": "dl1_reload_from_l31_shr_percent"
683 },
684 {
685 "BriefDescription": "% of DL1 Reloads that came from L3 and were brought into the L3 by a prefetch",
686 "MetricExpr": "PM_DATA_FROM_L3_MEPF * 100 / PM_L1_DCACHE_RELOAD_VALID",
687 "MetricGroup": "dl1_reloads_percent_per_ref",
688 "MetricName": "dl1_reload_from_l3_mepf_percent"
689 },
690 {
691 "BriefDescription": "% of DL1 Reloads from sources beyond the local L3",
692 "MetricExpr": "PM_DATA_FROM_L3MISS * 100 / PM_L1_DCACHE_RELOAD_VALID",
693 "MetricGroup": "dl1_reloads_percent_per_ref",
694 "MetricName": "dl1_reload_from_l3_miss_percent"
695 },
696 {
697 "BriefDescription": "% of DL1 Reloads from L3",
698 "MetricExpr": "PM_DATA_FROM_L3 * 100 / PM_L1_DCACHE_RELOAD_VALID",
699 "MetricGroup": "dl1_reloads_percent_per_ref",
700 "MetricName": "dl1_reload_from_l3_percent"
701 },
702 {
703 "BriefDescription": "% of DL1 dL1_Reloads from Local Memory",
704 "MetricExpr": "PM_DATA_FROM_LMEM * 100 / PM_L1_DCACHE_RELOAD_VALID",
705 "MetricGroup": "dl1_reloads_percent_per_ref",
706 "MetricName": "dl1_reload_from_lmem_percent"
707 },
708 {
709 "BriefDescription": "% of DL1 dL1_Reloads from Remote L2 or L3 (Modified)",
710 "MetricExpr": "PM_DATA_FROM_RL2L3_MOD * 100 / PM_L1_DCACHE_RELOAD_VALID",
711 "MetricGroup": "dl1_reloads_percent_per_ref",
712 "MetricName": "dl1_reload_from_rl2l3_mod_percent"
713 },
714 {
715 "BriefDescription": "% of DL1 dL1_Reloads from Remote L2 or L3 (Shared)",
716 "MetricExpr": "PM_DATA_FROM_RL2L3_SHR * 100 / PM_L1_DCACHE_RELOAD_VALID",
717 "MetricGroup": "dl1_reloads_percent_per_ref",
718 "MetricName": "dl1_reload_from_rl2l3_shr_percent"
719 },
720 {
721 "BriefDescription": "% of DL1 dL1_Reloads from Remote Memory",
722 "MetricExpr": "PM_DATA_FROM_RMEM * 100 / PM_L1_DCACHE_RELOAD_VALID",
723 "MetricGroup": "dl1_reloads_percent_per_ref",
724 "MetricName": "dl1_reload_from_rmem_percent"
725 },
726 {
727 "BriefDescription": "estimate of dl2l3 distant MOD miss rates with measured DL2L3 MOD latency as a %of dcache miss cpi",
728 "MetricExpr": "PM_DATA_FROM_DL2L3_MOD * PM_MRK_DATA_FROM_DL2L3_MOD_CYC / PM_MRK_DATA_FROM_DL2L3_MOD / PM_CMPLU_STALL_DCACHE_MISS *100",
729 "MetricGroup": "estimated_dcache_miss_cpi",
730 "MetricName": "dl2l3_mod_cpi_percent"
731 },
732 {
733 "BriefDescription": "estimate of dl2l3 distant SHR miss rates with measured DL2L3 SHR latency as a %of dcache miss cpi",
734 "MetricExpr": "PM_DATA_FROM_DL2L3_SHR * PM_MRK_DATA_FROM_DL2L3_SHR_CYC / PM_MRK_DATA_FROM_DL2L3_SHR / PM_CMPLU_STALL_DCACHE_MISS *100",
735 "MetricGroup": "estimated_dcache_miss_cpi",
736 "MetricName": "dl2l3_shr_cpi_percent"
737 },
738 {
739 "BriefDescription": "estimate of distant L4 miss rates with measured DL4 latency as a %of dcache miss cpi",
740 "MetricExpr": "PM_DATA_FROM_DL4 * PM_MRK_DATA_FROM_DL4_CYC / PM_MRK_DATA_FROM_DL4 / PM_CMPLU_STALL_DCACHE_MISS *100",
741 "MetricGroup": "estimated_dcache_miss_cpi",
742 "MetricName": "dl4_cpi_percent"
743 },
744 {
745 "BriefDescription": "estimate of distant memory miss rates with measured DMEM latency as a %of dcache miss cpi",
746 "MetricExpr": "PM_DATA_FROM_DMEM * PM_MRK_DATA_FROM_DMEM_CYC / PM_MRK_DATA_FROM_DMEM / PM_CMPLU_STALL_DCACHE_MISS *100",
747 "MetricGroup": "estimated_dcache_miss_cpi",
748 "MetricName": "dmem_cpi_percent"
749 },
750 {
751 "BriefDescription": "estimate of dl21 MOD miss rates with measured L21 MOD latency as a %of dcache miss cpi",
752 "MetricExpr": "PM_DATA_FROM_L21_MOD * PM_MRK_DATA_FROM_L21_MOD_CYC / PM_MRK_DATA_FROM_L21_MOD / PM_CMPLU_STALL_DCACHE_MISS *100",
753 "MetricGroup": "estimated_dcache_miss_cpi",
754 "MetricName": "l21_mod_cpi_percent"
755 },
756 {
757 "BriefDescription": "estimate of dl21 SHR miss rates with measured L21 SHR latency as a %of dcache miss cpi",
758 "MetricExpr": "PM_DATA_FROM_L21_SHR * PM_MRK_DATA_FROM_L21_SHR_CYC / PM_MRK_DATA_FROM_L21_SHR / PM_CMPLU_STALL_DCACHE_MISS *100",
759 "MetricGroup": "estimated_dcache_miss_cpi",
760 "MetricName": "l21_shr_cpi_percent"
761 },
762 {
763 "BriefDescription": "estimate of dl2 miss rates with measured L2 latency as a %of dcache miss cpi",
764 "MetricExpr": "PM_DATA_FROM_L2 * PM_MRK_DATA_FROM_L2_CYC / PM_MRK_DATA_FROM_L2 / PM_CMPLU_STALL_DCACHE_MISS *100",
765 "MetricGroup": "estimated_dcache_miss_cpi",
766 "MetricName": "l2_cpi_percent"
767 },
768 {
769 "BriefDescription": "estimate of dl31 MOD miss rates with measured L31 MOD latency as a %of dcache miss cpi",
770 "MetricExpr": "PM_DATA_FROM_L31_MOD * PM_MRK_DATA_FROM_L31_MOD_CYC / PM_MRK_DATA_FROM_L31_MOD / PM_CMPLU_STALL_DCACHE_MISS *100",
771 "MetricGroup": "estimated_dcache_miss_cpi",
772 "MetricName": "l31_mod_cpi_percent"
773 },
774 {
775 "BriefDescription": "estimate of dl31 SHR miss rates with measured L31 SHR latency as a %of dcache miss cpi",
776 "MetricExpr": "PM_DATA_FROM_L31_SHR * PM_MRK_DATA_FROM_L31_SHR_CYC / PM_MRK_DATA_FROM_L31_SHR / PM_CMPLU_STALL_DCACHE_MISS *100",
777 "MetricGroup": "estimated_dcache_miss_cpi",
778 "MetricName": "l31_shr_cpi_percent"
779 },
780 {
781 "BriefDescription": "estimate of dl3 miss rates with measured L3 latency as a % of dcache miss cpi",
782 "MetricExpr": "PM_DATA_FROM_L3 * PM_MRK_DATA_FROM_L3_CYC / PM_MRK_DATA_FROM_L3 / PM_CMPLU_STALL_DCACHE_MISS * 100",
783 "MetricGroup": "estimated_dcache_miss_cpi",
784 "MetricName": "l3_cpi_percent"
785 },
786 {
787 "BriefDescription": "estimate of Local memory miss rates with measured LMEM latency as a %of dcache miss cpi",
788 "MetricExpr": "PM_DATA_FROM_LMEM * PM_MRK_DATA_FROM_LMEM_CYC / PM_MRK_DATA_FROM_LMEM / PM_CMPLU_STALL_DCACHE_MISS *100",
789 "MetricGroup": "estimated_dcache_miss_cpi",
790 "MetricName": "lmem_cpi_percent"
791 },
792 {
793 "BriefDescription": "estimate of dl2l3 remote MOD miss rates with measured RL2L3 MOD latency as a %of dcache miss cpi",
794 "MetricExpr": "PM_DATA_FROM_RL2L3_MOD * PM_MRK_DATA_FROM_RL2L3_MOD_CYC / PM_MRK_DATA_FROM_RL2L3_MOD / PM_CMPLU_STALL_DCACHE_MISS *100",
795 "MetricGroup": "estimated_dcache_miss_cpi",
796 "MetricName": "rl2l3_mod_cpi_percent"
797 },
798 {
799 "BriefDescription": "estimate of dl2l3 shared miss rates with measured RL2L3 SHR latency as a %of dcache miss cpi",
800 "MetricExpr": "PM_DATA_FROM_RL2L3_SHR * PM_MRK_DATA_FROM_RL2L3_SHR_CYC / PM_MRK_DATA_FROM_RL2L3_SHR / PM_CMPLU_STALL_DCACHE_MISS * 100",
801 "MetricGroup": "estimated_dcache_miss_cpi",
802 "MetricName": "rl2l3_shr_cpi_percent"
803 },
804 {
805 "BriefDescription": "estimate of remote L4 miss rates with measured RL4 latency as a %of dcache miss cpi",
806 "MetricExpr": "PM_DATA_FROM_RL4 * PM_MRK_DATA_FROM_RL4_CYC / PM_MRK_DATA_FROM_RL4 / PM_CMPLU_STALL_DCACHE_MISS *100",
807 "MetricGroup": "estimated_dcache_miss_cpi",
808 "MetricName": "rl4_cpi_percent"
809 },
810 {
811 "BriefDescription": "estimate of remote memory miss rates with measured RMEM latency as a %of dcache miss cpi",
812 "MetricExpr": "PM_DATA_FROM_RMEM * PM_MRK_DATA_FROM_RMEM_CYC / PM_MRK_DATA_FROM_RMEM / PM_CMPLU_STALL_DCACHE_MISS *100",
813 "MetricGroup": "estimated_dcache_miss_cpi",
814 "MetricName": "rmem_cpi_percent"
815 },
816 {
817 "BriefDescription": "Branch Mispredict flushes per instruction",
818 "MetricExpr": "PM_FLUSH_MPRED / PM_RUN_INST_CMPL * 100",
819 "MetricGroup": "general",
820 "MetricName": "br_mpred_flush_rate_percent"
821 },
822 {
823 "BriefDescription": "Cycles per instruction",
824 "MetricExpr": "PM_CYC / PM_INST_CMPL",
825 "MetricGroup": "general",
826 "MetricName": "cpi"
827 },
828 {
829 "BriefDescription": "GCT empty cycles",
830 "MetricExpr": "(PM_FLUSH_DISP / PM_RUN_INST_CMPL) * 100",
831 "MetricGroup": "general",
832 "MetricName": "disp_flush_rate_percent"
833 },
834 {
835 "BriefDescription": "% DTLB miss rate per inst",
836 "MetricExpr": "PM_DTLB_MISS / PM_RUN_INST_CMPL *100",
837 "MetricGroup": "general",
838 "MetricName": "dtlb_miss_rate_percent"
839 },
840 {
841 "BriefDescription": "Flush rate (%)",
842 "MetricExpr": "PM_FLUSH * 100 / PM_RUN_INST_CMPL",
843 "MetricGroup": "general",
844 "MetricName": "flush_rate_percent"
845 },
846 {
847 "BriefDescription": "Instructions per cycles",
848 "MetricExpr": "PM_INST_CMPL / PM_CYC",
849 "MetricGroup": "general",
850 "MetricName": "ipc"
851 },
852 {
853 "BriefDescription": "% ITLB miss rate per inst",
854 "MetricExpr": "PM_ITLB_MISS / PM_RUN_INST_CMPL *100",
855 "MetricGroup": "general",
856 "MetricName": "itlb_miss_rate_percent"
857 },
858 {
859 "BriefDescription": "Percentage of L1 load misses per L1 load ref",
860 "MetricExpr": "PM_LD_MISS_L1 / PM_LD_REF_L1 * 100",
861 "MetricGroup": "general",
862 "MetricName": "l1_ld_miss_ratio_percent"
863 },
864 {
865 "BriefDescription": "Percentage of L1 store misses per run instruction",
866 "MetricExpr": "PM_ST_MISS_L1 * 100 / PM_RUN_INST_CMPL",
867 "MetricGroup": "general",
868 "MetricName": "l1_st_miss_rate_percent"
869 },
870 {
871 "BriefDescription": "Percentage of L1 store misses per L1 store ref",
872 "MetricExpr": "PM_ST_MISS_L1 / PM_ST_FIN * 100",
873 "MetricGroup": "general",
874 "MetricName": "l1_st_miss_ratio_percent"
875 },
876 {
877 "BriefDescription": "L2 Instruction Miss Rate (per instruction)(%)",
878 "MetricExpr": "PM_INST_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
879 "MetricGroup": "general",
880 "MetricName": "l2_inst_miss_rate_percent"
881 },
882 {
883 "BriefDescription": "L2 dmand Load Miss Rate (per run instruction)(%)",
884 "MetricExpr": "PM_DATA_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
885 "MetricGroup": "general",
886 "MetricName": "l2_ld_miss_rate_percent"
887 },
888 {
889 "BriefDescription": "L2 PTEG Miss Rate (per run instruction)(%)",
890 "MetricExpr": "PM_DPTEG_FROM_L2MISS * 100 / PM_RUN_INST_CMPL",
891 "MetricGroup": "general",
892 "MetricName": "l2_pteg_miss_rate_percent"
893 },
894 {
895 "BriefDescription": "L3 Instruction Miss Rate (per instruction)(%)",
896 "MetricExpr": "PM_INST_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
897 "MetricGroup": "general",
898 "MetricName": "l3_inst_miss_rate_percent"
899 },
900 {
901 "BriefDescription": "L3 demand Load Miss Rate (per run instruction)(%)",
902 "MetricExpr": "PM_DATA_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
903 "MetricGroup": "general",
904 "MetricName": "l3_ld_miss_rate_percent"
905 },
906 {
907 "BriefDescription": "L3 PTEG Miss Rate (per run instruction)(%)",
908 "MetricExpr": "PM_DPTEG_FROM_L3MISS * 100 / PM_RUN_INST_CMPL",
909 "MetricGroup": "general",
910 "MetricName": "l3_pteg_miss_rate_percent"
911 },
912 {
913 "BriefDescription": "Run cycles per cycle",
914 "MetricExpr": "PM_RUN_CYC / PM_CYC*100",
915 "MetricGroup": "general",
916 "MetricName": "run_cycles_percent"
917 },
918 {
919 "BriefDescription": "Instruction dispatch-to-completion ratio",
920 "MetricExpr": "PM_INST_DISP / PM_INST_CMPL",
921 "MetricGroup": "general",
922 "MetricName": "speculation"
923 },
924 {
925 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Modified) per Inst",
926 "MetricExpr": "PM_INST_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
927 "MetricGroup": "instruction_misses_percent_per_inst",
928 "MetricName": "inst_from_dl2l3_mod_rate_percent"
929 },
930 {
931 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Shared) per Inst",
932 "MetricExpr": "PM_INST_FROM_DL2L3_SHR * 100 / PM_RUN_INST_CMPL",
933 "MetricGroup": "instruction_misses_percent_per_inst",
934 "MetricName": "inst_from_dl2l3_shr_rate_percent"
935 },
936 {
937 "BriefDescription": "% of ICache reloads from Distant L4 per Inst",
938 "MetricExpr": "PM_INST_FROM_DL4 * 100 / PM_RUN_INST_CMPL",
939 "MetricGroup": "instruction_misses_percent_per_inst",
940 "MetricName": "inst_from_dl4_rate_percent"
941 },
942 {
943 "BriefDescription": "% of ICache reloads from Distant Memory per Inst",
944 "MetricExpr": "PM_INST_FROM_DMEM * 100 / PM_RUN_INST_CMPL",
945 "MetricGroup": "instruction_misses_percent_per_inst",
946 "MetricName": "inst_from_dmem_rate_percent"
947 },
948 {
949 "BriefDescription": "% of ICache reloads from Private L2, other core per Inst",
950 "MetricExpr": "PM_INST_FROM_L21_MOD * 100 / PM_RUN_INST_CMPL",
951 "MetricGroup": "instruction_misses_percent_per_inst",
952 "MetricName": "inst_from_l21_mod_rate_percent"
953 },
954 {
955 "BriefDescription": "% of ICache reloads from Private L2, other core per Inst",
956 "MetricExpr": "PM_INST_FROM_L21_SHR * 100 / PM_RUN_INST_CMPL",
957 "MetricGroup": "instruction_misses_percent_per_inst",
958 "MetricName": "inst_from_l21_shr_rate_percent"
959 },
960 {
961 "BriefDescription": "% of ICache reloads from L2 per Inst",
962 "MetricExpr": "PM_INST_FROM_L2 * 100 / PM_RUN_INST_CMPL",
963 "MetricGroup": "instruction_misses_percent_per_inst",
964 "MetricName": "inst_from_l2_rate_percent"
965 },
966 {
967 "BriefDescription": "% of ICache reloads from Private L3, other core per Inst",
968 "MetricExpr": "PM_INST_FROM_L31_MOD * 100 / PM_RUN_INST_CMPL",
969 "MetricGroup": "instruction_misses_percent_per_inst",
970 "MetricName": "inst_from_l31_mod_rate_percent"
971 },
972 {
973 "BriefDescription": "% of ICache reloads from Private L3 other core per Inst",
974 "MetricExpr": "PM_INST_FROM_L31_SHR * 100 / PM_RUN_INST_CMPL",
975 "MetricGroup": "instruction_misses_percent_per_inst",
976 "MetricName": "inst_from_l31_shr_rate_percent"
977 },
978 {
979 "BriefDescription": "% of ICache reloads from L3 per Inst",
980 "MetricExpr": "PM_INST_FROM_L3 * 100 / PM_RUN_INST_CMPL",
981 "MetricGroup": "instruction_misses_percent_per_inst",
982 "MetricName": "inst_from_l3_rate_percent"
983 },
984 {
985 "BriefDescription": "% of ICache reloads from Local L4 per Inst",
986 "MetricExpr": "PM_INST_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
987 "MetricGroup": "instruction_misses_percent_per_inst",
988 "MetricName": "inst_from_ll4_rate_percent"
989 },
990 {
991 "BriefDescription": "% of ICache reloads from Local Memory per Inst",
992 "MetricExpr": "PM_INST_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
993 "MetricGroup": "instruction_misses_percent_per_inst",
994 "MetricName": "inst_from_lmem_rate_percent"
995 },
996 {
997 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Modified) per Inst",
998 "MetricExpr": "PM_INST_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
999 "MetricGroup": "instruction_misses_percent_per_inst",
1000 "MetricName": "inst_from_rl2l3_mod_rate_percent"
1001 },
1002 {
1003 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Shared) per Inst",
1004 "MetricExpr": "PM_INST_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
1005 "MetricGroup": "instruction_misses_percent_per_inst",
1006 "MetricName": "inst_from_rl2l3_shr_rate_percent"
1007 },
1008 {
1009 "BriefDescription": "% of ICache reloads from Remote L4 per Inst",
1010 "MetricExpr": "PM_INST_FROM_RL4 * 100 / PM_RUN_INST_CMPL",
1011 "MetricGroup": "instruction_misses_percent_per_inst",
1012 "MetricName": "inst_from_rl4_rate_percent"
1013 },
1014 {
1015 "BriefDescription": "% of ICache reloads from Remote Memory per Inst",
1016 "MetricExpr": "PM_INST_FROM_RMEM * 100 / PM_RUN_INST_CMPL",
1017 "MetricGroup": "instruction_misses_percent_per_inst",
1018 "MetricName": "inst_from_rmem_rate_percent"
1019 },
1020 {
1021 "BriefDescription": "Instruction Cache Miss Rate (Per run Instruction)(%)",
1022 "MetricExpr": "PM_L1_ICACHE_MISS * 100 / PM_RUN_INST_CMPL",
1023 "MetricGroup": "instruction_misses_percent_per_inst",
1024 "MetricName": "l1_inst_miss_rate_percent"
1025 },
1026 {
1027 "BriefDescription": "Icache Fetchs per Icache Miss",
1028 "MetricExpr": "(PM_L1_ICACHE_MISS - PM_IC_PREF_WRITE) / PM_L1_ICACHE_MISS",
1029 "MetricGroup": "instruction_stats_percent_per_ref",
1030 "MetricName": "icache_miss_reload"
1031 },
1032 {
1033 "BriefDescription": "% of ICache reloads due to prefetch",
1034 "MetricExpr": "PM_IC_PREF_WRITE * 100 / PM_L1_ICACHE_MISS",
1035 "MetricGroup": "instruction_stats_percent_per_ref",
1036 "MetricName": "icache_pref_percent"
1037 },
1038 {
1039 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Modified)",
1040 "MetricExpr": "PM_INST_FROM_DL2L3_MOD * 100 / PM_L1_ICACHE_MISS",
1041 "MetricGroup": "instruction_stats_percent_per_ref",
1042 "MetricName": "inst_from_dl2l3_mod_percent"
1043 },
1044 {
1045 "BriefDescription": "% of ICache reloads from Distant L2 or L3 (Shared)",
1046 "MetricExpr": "PM_INST_FROM_DL2L3_SHR * 100 / PM_L1_ICACHE_MISS",
1047 "MetricGroup": "instruction_stats_percent_per_ref",
1048 "MetricName": "inst_from_dl2l3_shr_percent"
1049 },
1050 {
1051 "BriefDescription": "% of ICache reloads from Distant L4",
1052 "MetricExpr": "PM_INST_FROM_DL4 * 100 / PM_L1_ICACHE_MISS",
1053 "MetricGroup": "instruction_stats_percent_per_ref",
1054 "MetricName": "inst_from_dl4_percent"
1055 },
1056 {
1057 "BriefDescription": "% of ICache reloads from Distant Memory",
1058 "MetricExpr": "PM_INST_FROM_DMEM * 100 / PM_L1_ICACHE_MISS",
1059 "MetricGroup": "instruction_stats_percent_per_ref",
1060 "MetricName": "inst_from_dmem_percent"
1061 },
1062 {
1063 "BriefDescription": "% of ICache reloads from Private L2, other core",
1064 "MetricExpr": "PM_INST_FROM_L21_MOD * 100 / PM_L1_ICACHE_MISS",
1065 "MetricGroup": "instruction_stats_percent_per_ref",
1066 "MetricName": "inst_from_l21_mod_percent"
1067 },
1068 {
1069 "BriefDescription": "% of ICache reloads from Private L2, other core",
1070 "MetricExpr": "PM_INST_FROM_L21_SHR * 100 / PM_L1_ICACHE_MISS",
1071 "MetricGroup": "instruction_stats_percent_per_ref",
1072 "MetricName": "inst_from_l21_shr_percent"
1073 },
1074 {
1075 "BriefDescription": "% of ICache reloads from L2",
1076 "MetricExpr": "PM_INST_FROM_L2 * 100 / PM_L1_ICACHE_MISS",
1077 "MetricGroup": "instruction_stats_percent_per_ref",
1078 "MetricName": "inst_from_l2_percent"
1079 },
1080 {
1081 "BriefDescription": "% of ICache reloads from Private L3, other core",
1082 "MetricExpr": "PM_INST_FROM_L31_MOD * 100 / PM_L1_ICACHE_MISS",
1083 "MetricGroup": "instruction_stats_percent_per_ref",
1084 "MetricName": "inst_from_l31_mod_percent"
1085 },
1086 {
1087 "BriefDescription": "% of ICache reloads from Private L3, other core",
1088 "MetricExpr": "PM_INST_FROM_L31_SHR * 100 / PM_L1_ICACHE_MISS",
1089 "MetricGroup": "instruction_stats_percent_per_ref",
1090 "MetricName": "inst_from_l31_shr_percent"
1091 },
1092 {
1093 "BriefDescription": "% of ICache reloads from L3",
1094 "MetricExpr": "PM_INST_FROM_L3 * 100 / PM_L1_ICACHE_MISS",
1095 "MetricGroup": "instruction_stats_percent_per_ref",
1096 "MetricName": "inst_from_l3_percent"
1097 },
1098 {
1099 "BriefDescription": "% of ICache reloads from Local L4",
1100 "MetricExpr": "PM_INST_FROM_LL4 * 100 / PM_L1_ICACHE_MISS",
1101 "MetricGroup": "instruction_stats_percent_per_ref",
1102 "MetricName": "inst_from_ll4_percent"
1103 },
1104 {
1105 "BriefDescription": "% of ICache reloads from Local Memory",
1106 "MetricExpr": "PM_INST_FROM_LMEM * 100 / PM_L1_ICACHE_MISS",
1107 "MetricGroup": "instruction_stats_percent_per_ref",
1108 "MetricName": "inst_from_lmem_percent"
1109 },
1110 {
1111 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Modified)",
1112 "MetricExpr": "PM_INST_FROM_RL2L3_MOD * 100 / PM_L1_ICACHE_MISS",
1113 "MetricGroup": "instruction_stats_percent_per_ref",
1114 "MetricName": "inst_from_rl2l3_mod_percent"
1115 },
1116 {
1117 "BriefDescription": "% of ICache reloads from Remote L2 or L3 (Shared)",
1118 "MetricExpr": "PM_INST_FROM_RL2L3_SHR * 100 / PM_L1_ICACHE_MISS",
1119 "MetricGroup": "instruction_stats_percent_per_ref",
1120 "MetricName": "inst_from_rl2l3_shr_percent"
1121 },
1122 {
1123 "BriefDescription": "% of ICache reloads from Remote L4",
1124 "MetricExpr": "PM_INST_FROM_RL4 * 100 / PM_L1_ICACHE_MISS",
1125 "MetricGroup": "instruction_stats_percent_per_ref",
1126 "MetricName": "inst_from_rl4_percent"
1127 },
1128 {
1129 "BriefDescription": "% of ICache reloads from Remote Memory",
1130 "MetricExpr": "PM_INST_FROM_RMEM * 100 / PM_L1_ICACHE_MISS",
1131 "MetricGroup": "instruction_stats_percent_per_ref",
1132 "MetricName": "inst_from_rmem_percent"
1133 },
1134 {
1135 "BriefDescription": "%L2 Modified CO Cache read Utilization (4 pclks per disp attempt)",
1136 "MetricExpr": "((PM_L2_CASTOUT_MOD/2)*4)/ PM_RUN_CYC * 100",
1137 "MetricGroup": "l2_stats",
1138 "MetricName": "l2_co_m_rd_util"
1139 },
1140 {
1141 "BriefDescription": "L2 dcache invalidates per run inst (per core)",
1142 "MetricExpr": "(PM_L2_DC_INV / 2) / PM_RUN_INST_CMPL * 100",
1143 "MetricGroup": "l2_stats",
1144 "MetricName": "l2_dc_inv_rate_percent"
1145 },
1146 {
1147 "BriefDescription": "Demand load misses as a % of L2 LD dispatches (per thread)",
1148 "MetricExpr": "PM_L1_DCACHE_RELOAD_VALID / (PM_L2_LD / 2) * 100",
1149 "MetricGroup": "l2_stats",
1150 "MetricName": "l2_dem_ld_disp_percent"
1151 },
1152 {
1153 "BriefDescription": "L2 Icache invalidates per run inst (per core)",
1154 "MetricExpr": "(PM_L2_IC_INV / 2) / PM_RUN_INST_CMPL * 100",
1155 "MetricGroup": "l2_stats",
1156 "MetricName": "l2_ic_inv_rate_percent"
1157 },
1158 {
1159 "BriefDescription": "L2 Inst misses as a % of total L2 Inst dispatches (per thread)",
1160 "MetricExpr": "PM_L2_INST_MISS / PM_L2_INST * 100",
1161 "MetricGroup": "l2_stats",
1162 "MetricName": "l2_inst_miss_ratio_percent"
1163 },
1164 {
1165 "BriefDescription": "Average number of cycles between L2 Load hits",
1166 "MetricExpr": "(PM_L2_LD_HIT / PM_RUN_CYC) / 2",
1167 "MetricGroup": "l2_stats",
1168 "MetricName": "l2_ld_hit_frequency"
1169 },
1170 {
1171 "BriefDescription": "Average number of cycles between L2 Load misses",
1172 "MetricExpr": "(PM_L2_LD_MISS / PM_RUN_CYC) / 2",
1173 "MetricGroup": "l2_stats",
1174 "MetricName": "l2_ld_miss_frequency"
1175 },
1176 {
1177 "BriefDescription": "L2 Load misses as a % of total L2 Load dispatches (per thread)",
1178 "MetricExpr": "PM_L2_LD_MISS / PM_L2_LD * 100",
1179 "MetricGroup": "l2_stats",
1180 "MetricName": "l2_ld_miss_ratio_percent"
1181 },
1182 {
1183 "BriefDescription": "% L2 load disp attempts Cache read Utilization (4 pclks per disp attempt)",
1184 "MetricExpr": "((PM_L2_RCLD_DISP/2)*4)/ PM_RUN_CYC * 100",
1185 "MetricGroup": "l2_stats",
1186 "MetricName": "l2_ld_rd_util"
1187 },
1188 {
1189 "BriefDescription": "L2 load misses that require a cache write (4 pclks per disp attempt) % of pclks",
1190 "MetricExpr": "((( PM_L2_LD_DISP - PM_L2_LD_HIT)/2)*4)/ PM_RUN_CYC * 100",
1191 "MetricGroup": "l2_stats",
1192 "MetricName": "l2_ldmiss_wr_util"
1193 },
1194 {
1195 "BriefDescription": "L2 local pump prediction success",
1196 "MetricExpr": "PM_L2_LOC_GUESS_CORRECT / (PM_L2_LOC_GUESS_CORRECT + PM_L2_LOC_GUESS_WRONG) * 100",
1197 "MetricGroup": "l2_stats",
1198 "MetricName": "l2_local_pred_correct_percent"
1199 },
1200 {
1201 "BriefDescription": "L2 COs that were in M,Me,Mu state as a % of all L2 COs",
1202 "MetricExpr": "PM_L2_CASTOUT_MOD / (PM_L2_CASTOUT_MOD + PM_L2_CASTOUT_SHR) * 100",
1203 "MetricGroup": "l2_stats",
1204 "MetricName": "l2_mod_co_percent"
1205 },
1206 {
1207 "BriefDescription": "% of L2 Load RC dispatch atampts that failed because of address collisions and cclass conflicts",
1208 "MetricExpr": "(PM_L2_RCLD_DISP_FAIL_ADDR )/ PM_L2_RCLD_DISP * 100",
1209 "MetricGroup": "l2_stats",
1210 "MetricName": "l2_rc_ld_disp_addr_fail_percent"
1211 },
1212 {
1213 "BriefDescription": "% of L2 Load RC dispatch attempts that failed",
1214 "MetricExpr": "(PM_L2_RCLD_DISP_FAIL_ADDR + PM_L2_RCLD_DISP_FAIL_OTHER)/ PM_L2_RCLD_DISP * 100",
1215 "MetricGroup": "l2_stats",
1216 "MetricName": "l2_rc_ld_disp_fail_percent"
1217 },
1218 {
1219 "BriefDescription": "% of L2 Store RC dispatch atampts that failed because of address collisions and cclass conflicts",
1220 "MetricExpr": "PM_L2_RCST_DISP_FAIL_ADDR / PM_L2_RCST_DISP * 100",
1221 "MetricGroup": "l2_stats",
1222 "MetricName": "l2_rc_st_disp_addr_fail_percent"
1223 },
1224 {
1225 "BriefDescription": "% of L2 Store RC dispatch attempts that failed",
1226 "MetricExpr": "(PM_L2_RCST_DISP_FAIL_ADDR + PM_L2_RCST_DISP_FAIL_OTHER)/ PM_L2_RCST_DISP * 100",
1227 "MetricGroup": "l2_stats",
1228 "MetricName": "l2_rc_st_disp_fail_percent"
1229 },
1230 {
1231 "BriefDescription": "L2 Cache Read Utilization (per core)",
1232 "MetricExpr": "(((PM_L2_RCLD_DISP/2)*4)/ PM_RUN_CYC * 100) + (((PM_L2_RCST_DISP/2)*4)/PM_RUN_CYC * 100) + (((PM_L2_CASTOUT_MOD/2)*4)/PM_RUN_CYC * 100)",
1233 "MetricGroup": "l2_stats",
1234 "MetricName": "l2_rd_util_percent"
1235 },
1236 {
1237 "BriefDescription": "L2 COs that were in T,Te,Si,S state as a % of all L2 COs",
1238 "MetricExpr": "PM_L2_CASTOUT_SHR / (PM_L2_CASTOUT_MOD + PM_L2_CASTOUT_SHR) * 100",
1239 "MetricGroup": "l2_stats",
1240 "MetricName": "l2_shr_co_percent"
1241 },
1242 {
1243 "BriefDescription": "L2 Store misses as a % of total L2 Store dispatches (per thread)",
1244 "MetricExpr": "PM_L2_ST_MISS / PM_L2_ST * 100",
1245 "MetricGroup": "l2_stats",
1246 "MetricName": "l2_st_miss_ratio_percent"
1247 },
1248 {
1249 "BriefDescription": "% L2 store disp attempts Cache read Utilization (4 pclks per disp attempt)",
1250 "MetricExpr": "((PM_L2_RCST_DISP/2)*4) / PM_RUN_CYC * 100",
1251 "MetricGroup": "l2_stats",
1252 "MetricName": "l2_st_rd_util"
1253 },
1254 {
1255 "BriefDescription": "L2 stores that require a cache write (4 pclks per disp attempt) % of pclks",
1256 "MetricExpr": "((PM_L2_ST_DISP/2)*4) / PM_RUN_CYC * 100",
1257 "MetricGroup": "l2_stats",
1258 "MetricName": "l2_st_wr_util"
1259 },
1260 {
1261 "BriefDescription": "L2 Cache Write Utilization (per core)",
1262 "MetricExpr": "((((PM_L2_LD_DISP - PM_L2_LD_HIT)/2)*4) / PM_RUN_CYC * 100) + (((PM_L2_ST_DISP/2)*4) / PM_RUN_CYC * 100)",
1263 "MetricGroup": "l2_stats",
1264 "MetricName": "l2_wr_util_percent"
1265 },
1266 {
1267 "BriefDescription": "Average number of cycles between L3 Load hits",
1268 "MetricExpr": "(PM_L3_LD_HIT / PM_RUN_CYC) / 2",
1269 "MetricGroup": "l3_stats",
1270 "MetricName": "l3_ld_hit_frequency"
1271 },
1272 {
1273 "BriefDescription": "Average number of cycles between L3 Load misses",
1274 "MetricExpr": "(PM_L3_LD_MISS / PM_RUN_CYC) / 2",
1275 "MetricGroup": "l3_stats",
1276 "MetricName": "l3_ld_miss_frequency"
1277 },
1278 {
1279 "BriefDescription": "Average number of Write-in machines used. 1 of 8 WI machines is sampled every L3 cycle",
1280 "MetricExpr": "(PM_L3_WI_USAGE / PM_RUN_CYC) * 8",
1281 "MetricGroup": "l3_stats",
1282 "MetricName": "l3_wi_usage"
1283 },
1284 {
1285 "BriefDescription": "Average icache miss latency",
1286 "MetricExpr": "PM_IC_DEMAND_CYC / PM_IC_DEMAND_REQ",
1287 "MetricGroup": "latency",
1288 "MetricName": "average_il1_miss_latency"
1289 },
1290 {
1291 "BriefDescription": "Marked L2L3 remote Load latency",
1292 "MetricExpr": "PM_MRK_DATA_FROM_DL2L3_MOD_CYC/ PM_MRK_DATA_FROM_DL2L3_MOD",
1293 "MetricGroup": "latency",
1294 "MetricName": "dl2l3_mod_latency"
1295 },
1296 {
1297 "BriefDescription": "Marked L2L3 distant Load latency",
1298 "MetricExpr": "PM_MRK_DATA_FROM_DL2L3_SHR_CYC/ PM_MRK_DATA_FROM_DL2L3_SHR",
1299 "MetricGroup": "latency",
1300 "MetricName": "dl2l3_shr_latency"
1301 },
1302 {
1303 "BriefDescription": "Distant L4 average load latency",
1304 "MetricExpr": "PM_MRK_DATA_FROM_DL4_CYC/ PM_MRK_DATA_FROM_DL4",
1305 "MetricGroup": "latency",
1306 "MetricName": "dl4_latency"
1307 },
1308 {
1309 "BriefDescription": "Marked Dmem Load latency",
1310 "MetricExpr": "PM_MRK_DATA_FROM_DMEM_CYC/ PM_MRK_DATA_FROM_DMEM",
1311 "MetricGroup": "latency",
1312 "MetricName": "dmem_latency"
1313 },
1314 {
1315 "BriefDescription": "average L1 miss latency using marked events",
1316 "MetricExpr": "PM_MRK_LD_MISS_L1_CYC / PM_MRK_LD_MISS_L1",
1317 "MetricGroup": "latency",
1318 "MetricName": "estimated_dl1miss_latency"
1319 },
1320 {
1321 "BriefDescription": "Marked L21 Load latency",
1322 "MetricExpr": "PM_MRK_DATA_FROM_L21_MOD_CYC/ PM_MRK_DATA_FROM_L21_MOD",
1323 "MetricGroup": "latency",
1324 "MetricName": "l21_mod_latency"
1325 },
1326 {
1327 "BriefDescription": "Marked L21 Load latency",
1328 "MetricExpr": "PM_MRK_DATA_FROM_L21_SHR_CYC/ PM_MRK_DATA_FROM_L21_SHR",
1329 "MetricGroup": "latency",
1330 "MetricName": "l21_shr_latency"
1331 },
1332 {
1333 "BriefDescription": "Marked L2 Load latency",
1334 "MetricExpr": "PM_MRK_DATA_FROM_L2_CYC/ PM_MRK_DATA_FROM_L2",
1335 "MetricGroup": "latency",
1336 "MetricName": "l2_latency"
1337 },
1338 {
1339 "BriefDescription": "Marked L31 Load latency",
1340 "MetricExpr": "PM_MRK_DATA_FROM_L31_MOD_CYC/ PM_MRK_DATA_FROM_L31_MOD",
1341 "MetricGroup": "latency",
1342 "MetricName": "l31_mod_latency"
1343 },
1344 {
1345 "BriefDescription": "Marked L31 Load latency",
1346 "MetricExpr": "PM_MRK_DATA_FROM_L31_SHR_CYC/ PM_MRK_DATA_FROM_L31_SHR",
1347 "MetricGroup": "latency",
1348 "MetricName": "l31_shr_latency"
1349 },
1350 {
1351 "BriefDescription": "Marked L3 Load latency",
1352 "MetricExpr": "PM_MRK_DATA_FROM_L3_CYC/ PM_MRK_DATA_FROM_L3",
1353 "MetricGroup": "latency",
1354 "MetricName": "l3_latency"
1355 },
1356 {
1357 "BriefDescription": "Local L4 average load latency",
1358 "MetricExpr": "PM_MRK_DATA_FROM_LL4_CYC/ PM_MRK_DATA_FROM_LL4",
1359 "MetricGroup": "latency",
1360 "MetricName": "ll4_latency"
1361 },
1362 {
1363 "BriefDescription": "Marked Lmem Load latency",
1364 "MetricExpr": "PM_MRK_DATA_FROM_LMEM_CYC/ PM_MRK_DATA_FROM_LMEM",
1365 "MetricGroup": "latency",
1366 "MetricName": "lmem_latency"
1367 },
1368 {
1369 "BriefDescription": "Marked L2L3 remote Load latency",
1370 "MetricExpr": "PM_MRK_DATA_FROM_RL2L3_MOD_CYC/ PM_MRK_DATA_FROM_RL2L3_MOD",
1371 "MetricGroup": "latency",
1372 "MetricName": "rl2l3_mod_latency"
1373 },
1374 {
1375 "BriefDescription": "Marked L2L3 remote Load latency",
1376 "MetricExpr": "PM_MRK_DATA_FROM_RL2L3_SHR_CYC/ PM_MRK_DATA_FROM_RL2L3_SHR",
1377 "MetricGroup": "latency",
1378 "MetricName": "rl2l3_shr_latency"
1379 },
1380 {
1381 "BriefDescription": "Remote L4 average load latency",
1382 "MetricExpr": "PM_MRK_DATA_FROM_RL4_CYC/ PM_MRK_DATA_FROM_RL4",
1383 "MetricGroup": "latency",
1384 "MetricName": "rl4_latency"
1385 },
1386 {
1387 "BriefDescription": "Marked Rmem Load latency",
1388 "MetricExpr": "PM_MRK_DATA_FROM_RMEM_CYC/ PM_MRK_DATA_FROM_RMEM",
1389 "MetricGroup": "latency",
1390 "MetricName": "rmem_latency"
1391 },
1392 {
1393 "BriefDescription": "ERAT miss reject ratio",
1394 "MetricExpr": "PM_LSU_REJECT_ERAT_MISS * 100 / PM_RUN_INST_CMPL",
1395 "MetricGroup": "lsu_rejects",
1396 "MetricName": "erat_reject_rate_percent"
1397 },
1398 {
1399 "BriefDescription": "LHS reject ratio",
1400 "MetricExpr": "PM_LSU_REJECT_LHS *100/ PM_RUN_INST_CMPL",
1401 "MetricGroup": "lsu_rejects",
1402 "MetricName": "lhs_reject_rate_percent"
1403 },
1404 {
1405 "BriefDescription": "ERAT miss reject ratio",
1406 "MetricExpr": "PM_LSU_REJECT_LMQ_FULL * 100 / PM_RUN_INST_CMPL",
1407 "MetricGroup": "lsu_rejects",
1408 "MetricName": "lmq_full_reject_rate_percent"
1409 },
1410 {
1411 "BriefDescription": "ERAT miss reject ratio",
1412 "MetricExpr": "PM_LSU_REJECT_LMQ_FULL * 100 / PM_LD_REF_L1",
1413 "MetricGroup": "lsu_rejects",
1414 "MetricName": "lmq_full_reject_ratio_percent"
1415 },
1416 {
1417 "BriefDescription": "L4 locality(%)",
1418 "MetricExpr": "PM_DATA_FROM_LL4 * 100 / (PM_DATA_FROM_LL4 + PM_DATA_FROM_RL4 + PM_DATA_FROM_DL4)",
1419 "MetricGroup": "memory",
1420 "MetricName": "l4_locality"
1421 },
1422 {
1423 "BriefDescription": "Ratio of reloads from local L4 to distant L4",
1424 "MetricExpr": "PM_DATA_FROM_LL4 / PM_DATA_FROM_DL4",
1425 "MetricGroup": "memory",
1426 "MetricName": "ld_ll4_per_ld_dmem"
1427 },
1428 {
1429 "BriefDescription": "Ratio of reloads from local L4 to remote+distant L4",
1430 "MetricExpr": "PM_DATA_FROM_LL4 / (PM_DATA_FROM_DL4 + PM_DATA_FROM_RL4)",
1431 "MetricGroup": "memory",
1432 "MetricName": "ld_ll4_per_ld_mem"
1433 },
1434 {
1435 "BriefDescription": "Ratio of reloads from local L4 to remote L4",
1436 "MetricExpr": "PM_DATA_FROM_LL4 / PM_DATA_FROM_RL4",
1437 "MetricGroup": "memory",
1438 "MetricName": "ld_ll4_per_ld_rl4"
1439 },
1440 {
1441 "BriefDescription": "Number of loads from local memory per loads from distant memory",
1442 "MetricExpr": "PM_DATA_FROM_LMEM / PM_DATA_FROM_DMEM",
1443 "MetricGroup": "memory",
1444 "MetricName": "ld_lmem_per_ld_dmem"
1445 },
1446 {
1447 "BriefDescription": "Number of loads from local memory per loads from remote and distant memory",
1448 "MetricExpr": "PM_DATA_FROM_LMEM / (PM_DATA_FROM_DMEM + PM_DATA_FROM_RMEM)",
1449 "MetricGroup": "memory",
1450 "MetricName": "ld_lmem_per_ld_mem"
1451 },
1452 {
1453 "BriefDescription": "Number of loads from local memory per loads from remote memory",
1454 "MetricExpr": "PM_DATA_FROM_LMEM / PM_DATA_FROM_RMEM",
1455 "MetricGroup": "memory",
1456 "MetricName": "ld_lmem_per_ld_rmem"
1457 },
1458 {
1459 "BriefDescription": "Number of loads from remote memory per loads from distant memory",
1460 "MetricExpr": "PM_DATA_FROM_RMEM / PM_DATA_FROM_DMEM",
1461 "MetricGroup": "memory",
1462 "MetricName": "ld_rmem_per_ld_dmem"
1463 },
1464 {
1465 "BriefDescription": "Memory locality",
1466 "MetricExpr": "PM_DATA_FROM_LMEM * 100/ (PM_DATA_FROM_LMEM + PM_DATA_FROM_RMEM + PM_DATA_FROM_DMEM)",
1467 "MetricGroup": "memory",
1468 "MetricName": "mem_locality_percent"
1469 },
1470 {
1471 "BriefDescription": "L1 Prefetches issued by the prefetch machine per instruction (per thread)",
1472 "MetricExpr": "PM_L1_PREF / PM_RUN_INST_CMPL * 100",
1473 "MetricGroup": "prefetch",
1474 "MetricName": "l1_prefetch_rate_percent"
1475 },
1476 {
1477 "BriefDescription": "DERAT Miss Rate (per run instruction)(%)",
1478 "MetricExpr": "PM_LSU_DERAT_MISS * 100 / PM_RUN_INST_CMPL",
1479 "MetricGroup": "pteg_reloads_percent_per_inst",
1480 "MetricName": "derat_miss_rate_percent"
1481 },
1482 {
1483 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Modified) per inst",
1484 "MetricExpr": "PM_DPTEG_FROM_DL2L3_MOD * 100 / PM_RUN_INST_CMPL",
1485 "MetricGroup": "pteg_reloads_percent_per_inst",
1486 "MetricName": "pteg_from_dl2l3_mod_rate_percent"
1487 },
1488 {
1489 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Shared) per inst",
1490 "MetricExpr": "PM_DPTEG_FROM_DL2L3_SHR * 100 / PM_RUN_INST_CMPL",
1491 "MetricGroup": "pteg_reloads_percent_per_inst",
1492 "MetricName": "pteg_from_dl2l3_shr_rate_percent"
1493 },
1494 {
1495 "BriefDescription": "% of DERAT reloads from Distant L4 per inst",
1496 "MetricExpr": "PM_DPTEG_FROM_DL4 * 100 / PM_RUN_INST_CMPL",
1497 "MetricGroup": "pteg_reloads_percent_per_inst",
1498 "MetricName": "pteg_from_dl4_rate_percent"
1499 },
1500 {
1501 "BriefDescription": "% of DERAT reloads from Distant Memory per inst",
1502 "MetricExpr": "PM_DPTEG_FROM_DMEM * 100 / PM_RUN_INST_CMPL",
1503 "MetricGroup": "pteg_reloads_percent_per_inst",
1504 "MetricName": "pteg_from_dmem_rate_percent"
1505 },
1506 {
1507 "BriefDescription": "% of DERAT reloads from Private L2, other core per inst",
1508 "MetricExpr": "PM_DPTEG_FROM_L21_MOD * 100 / PM_RUN_INST_CMPL",
1509 "MetricGroup": "pteg_reloads_percent_per_inst",
1510 "MetricName": "pteg_from_l21_mod_rate_percent"
1511 },
1512 {
1513 "BriefDescription": "% of DERAT reloads from Private L2, other core per inst",
1514 "MetricExpr": "PM_DPTEG_FROM_L21_SHR * 100 / PM_RUN_INST_CMPL",
1515 "MetricGroup": "pteg_reloads_percent_per_inst",
1516 "MetricName": "pteg_from_l21_shr_rate_percent"
1517 },
1518 {
1519 "BriefDescription": "% of DERAT reloads from L2 per inst",
1520 "MetricExpr": "PM_DPTEG_FROM_L2 * 100 / PM_RUN_INST_CMPL",
1521 "MetricGroup": "pteg_reloads_percent_per_inst",
1522 "MetricName": "pteg_from_l2_rate_percent"
1523 },
1524 {
1525 "BriefDescription": "% of DERAT reloads from Private L3, other core per inst",
1526 "MetricExpr": "PM_DPTEG_FROM_L31_MOD * 100 / PM_RUN_INST_CMPL",
1527 "MetricGroup": "pteg_reloads_percent_per_inst",
1528 "MetricName": "pteg_from_l31_mod_rate_percent"
1529 },
1530 {
1531 "BriefDescription": "% of DERAT reloads from Private L3, other core per inst",
1532 "MetricExpr": "PM_DPTEG_FROM_L31_SHR * 100 / PM_RUN_INST_CMPL",
1533 "MetricGroup": "pteg_reloads_percent_per_inst",
1534 "MetricName": "pteg_from_l31_shr_rate_percent"
1535 },
1536 {
1537 "BriefDescription": "% of DERAT reloads from L3 per inst",
1538 "MetricExpr": "PM_DPTEG_FROM_L3 * 100 / PM_RUN_INST_CMPL",
1539 "MetricGroup": "pteg_reloads_percent_per_inst",
1540 "MetricName": "pteg_from_l3_rate_percent"
1541 },
1542 {
1543 "BriefDescription": "% of DERAT reloads from Local L4 per inst",
1544 "MetricExpr": "PM_DPTEG_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
1545 "MetricGroup": "pteg_reloads_percent_per_inst",
1546 "MetricName": "pteg_from_ll4_rate_percent"
1547 },
1548 {
1549 "BriefDescription": "% of DERAT reloads from Local Memory per inst",
1550 "MetricExpr": "PM_DPTEG_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
1551 "MetricGroup": "pteg_reloads_percent_per_inst",
1552 "MetricName": "pteg_from_lmem_rate_percent"
1553 },
1554 {
1555 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Modified) per inst",
1556 "MetricExpr": "PM_DPTEG_FROM_RL2L3_MOD * 100 / PM_RUN_INST_CMPL",
1557 "MetricGroup": "pteg_reloads_percent_per_inst",
1558 "MetricName": "pteg_from_rl2l3_mod_rate_percent"
1559 },
1560 {
1561 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Shared) per inst",
1562 "MetricExpr": "PM_DPTEG_FROM_RL2L3_SHR * 100 / PM_RUN_INST_CMPL",
1563 "MetricGroup": "pteg_reloads_percent_per_inst",
1564 "MetricName": "pteg_from_rl2l3_shr_rate_percent"
1565 },
1566 {
1567 "BriefDescription": "% of DERAT reloads from Remote L4 per inst",
1568 "MetricExpr": "PM_DPTEG_FROM_RL4 * 100 / PM_RUN_INST_CMPL",
1569 "MetricGroup": "pteg_reloads_percent_per_inst",
1570 "MetricName": "pteg_from_rl4_rate_percent"
1571 },
1572 {
1573 "BriefDescription": "% of DERAT reloads from Remote Memory per inst",
1574 "MetricExpr": "PM_DPTEG_FROM_RMEM * 100 / PM_RUN_INST_CMPL",
1575 "MetricGroup": "pteg_reloads_percent_per_inst",
1576 "MetricName": "pteg_from_rmem_rate_percent"
1577 },
1578 {
1579 "BriefDescription": "% of DERAT misses that result in an ERAT reload",
1580 "MetricExpr": "PM_DTLB_MISS * 100 / PM_LSU_DERAT_MISS",
1581 "MetricGroup": "pteg_reloads_percent_per_ref",
1582 "MetricName": "derat_miss_reload_percent"
1583 },
1584 {
1585 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Modified)",
1586 "MetricExpr": "PM_DPTEG_FROM_DL2L3_MOD * 100 / PM_DTLB_MISS",
1587 "MetricGroup": "pteg_reloads_percent_per_ref",
1588 "MetricName": "pteg_from_dl2l3_mod_percent"
1589 },
1590 {
1591 "BriefDescription": "% of DERAT reloads from Distant L2 or L3 (Shared)",
1592 "MetricExpr": "PM_DPTEG_FROM_DL2L3_SHR * 100 / PM_DTLB_MISS",
1593 "MetricGroup": "pteg_reloads_percent_per_ref",
1594 "MetricName": "pteg_from_dl2l3_shr_percent"
1595 },
1596 {
1597 "BriefDescription": "% of DERAT reloads from Distant L4",
1598 "MetricExpr": "PM_DPTEG_FROM_DL4 * 100 / PM_DTLB_MISS",
1599 "MetricGroup": "pteg_reloads_percent_per_ref",
1600 "MetricName": "pteg_from_dl4_percent"
1601 },
1602 {
1603 "BriefDescription": "% of DERAT reloads from Distant Memory",
1604 "MetricExpr": "PM_DPTEG_FROM_DMEM * 100 / PM_DTLB_MISS",
1605 "MetricGroup": "pteg_reloads_percent_per_ref",
1606 "MetricName": "pteg_from_dmem_percent"
1607 },
1608 {
1609 "BriefDescription": "% of DERAT reloads from Private L2, other core",
1610 "MetricExpr": "PM_DPTEG_FROM_L21_MOD * 100 / PM_DTLB_MISS",
1611 "MetricGroup": "pteg_reloads_percent_per_ref",
1612 "MetricName": "pteg_from_l21_mod_percent"
1613 },
1614 {
1615 "BriefDescription": "% of DERAT reloads from Private L2, other core",
1616 "MetricExpr": "PM_DPTEG_FROM_L21_SHR * 100 / PM_DTLB_MISS",
1617 "MetricGroup": "pteg_reloads_percent_per_ref",
1618 "MetricName": "pteg_from_l21_shr_percent"
1619 },
1620 {
1621 "BriefDescription": "% of DERAT reloads from L2",
1622 "MetricExpr": "PM_DPTEG_FROM_L2 * 100 / PM_DTLB_MISS",
1623 "MetricGroup": "pteg_reloads_percent_per_ref",
1624 "MetricName": "pteg_from_l2_percent"
1625 },
1626 {
1627 "BriefDescription": "% of DERAT reloads from Private L3, other core",
1628 "MetricExpr": "PM_DPTEG_FROM_L31_MOD * 100 / PM_DTLB_MISS",
1629 "MetricGroup": "pteg_reloads_percent_per_ref",
1630 "MetricName": "pteg_from_l31_mod_percent"
1631 },
1632 {
1633 "BriefDescription": "% of DERAT reloads from Private L3, other core",
1634 "MetricExpr": "PM_DPTEG_FROM_L31_SHR * 100 / PM_DTLB_MISS",
1635 "MetricGroup": "pteg_reloads_percent_per_ref",
1636 "MetricName": "pteg_from_l31_shr_percent"
1637 },
1638 {
1639 "BriefDescription": "% of DERAT reloads from L3",
1640 "MetricExpr": "PM_DPTEG_FROM_L3 * 100 / PM_DTLB_MISS",
1641 "MetricGroup": "pteg_reloads_percent_per_ref",
1642 "MetricName": "pteg_from_l3_percent"
1643 },
1644 {
1645 "BriefDescription": "% of DERAT reloads from Local L4",
1646 "MetricExpr": "PM_DPTEG_FROM_LL4 * 100 / PM_DTLB_MISS",
1647 "MetricGroup": "pteg_reloads_percent_per_ref",
1648 "MetricName": "pteg_from_ll4_percent"
1649 },
1650 {
1651 "BriefDescription": "% of DERAT reloads from Local Memory",
1652 "MetricExpr": "PM_DPTEG_FROM_LMEM * 100 / PM_DTLB_MISS",
1653 "MetricGroup": "pteg_reloads_percent_per_ref",
1654 "MetricName": "pteg_from_lmem_percent"
1655 },
1656 {
1657 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Modified)",
1658 "MetricExpr": "PM_DPTEG_FROM_RL2L3_MOD * 100 / PM_DTLB_MISS",
1659 "MetricGroup": "pteg_reloads_percent_per_ref",
1660 "MetricName": "pteg_from_rl2l3_mod_percent"
1661 },
1662 {
1663 "BriefDescription": "% of DERAT reloads from Remote L2 or L3 (Shared)",
1664 "MetricExpr": "PM_DPTEG_FROM_RL2L3_SHR * 100 / PM_DTLB_MISS",
1665 "MetricGroup": "pteg_reloads_percent_per_ref",
1666 "MetricName": "pteg_from_rl2l3_shr_percent"
1667 },
1668 {
1669 "BriefDescription": "% of DERAT reloads from Remote L4",
1670 "MetricExpr": "PM_DPTEG_FROM_RL4 * 100 / PM_DTLB_MISS",
1671 "MetricGroup": "pteg_reloads_percent_per_ref",
1672 "MetricName": "pteg_from_rl4_percent"
1673 },
1674 {
1675 "BriefDescription": "% of DERAT reloads from Remote Memory",
1676 "MetricExpr": "PM_DPTEG_FROM_RMEM * 100 / PM_DTLB_MISS",
1677 "MetricGroup": "pteg_reloads_percent_per_ref",
1678 "MetricName": "pteg_from_rmem_percent"
1679 },
1680 {
1681 "BriefDescription": "% DERAT miss rate for 4K page per inst",
1682 "MetricExpr": "PM_DERAT_MISS_4K * 100 / PM_RUN_INST_CMPL",
1683 "MetricGroup": "translation",
1684 "MetricName": "derat_4k_miss_rate_percent"
1685 },
1686 {
1687 "BriefDescription": "DERAT miss ratio for 4K page",
1688 "MetricExpr": "PM_DERAT_MISS_4K / PM_LSU_DERAT_MISS",
1689 "MetricGroup": "translation",
1690 "MetricName": "derat_4k_miss_ratio"
1691 },
1692 {
1693 "BriefDescription": "% DERAT miss ratio for 64K page per inst",
1694 "MetricExpr": "PM_DERAT_MISS_64K * 100 / PM_RUN_INST_CMPL",
1695 "MetricGroup": "translation",
1696 "MetricName": "derat_64k_miss_rate_percent"
1697 },
1698 {
1699 "BriefDescription": "DERAT miss ratio for 64K page",
1700 "MetricExpr": "PM_DERAT_MISS_64K / PM_LSU_DERAT_MISS",
1701 "MetricGroup": "translation",
1702 "MetricName": "derat_64k_miss_ratio"
1703 },
1704 {
1705 "BriefDescription": "DERAT miss ratio",
1706 "MetricExpr": "PM_LSU_DERAT_MISS / PM_LSU_DERAT_MISS",
1707 "MetricGroup": "translation",
1708 "MetricName": "derat_miss_ratio"
1709 },
1710 {
1711 "BriefDescription": "% DSLB_Miss_Rate per inst",
1712 "MetricExpr": "PM_DSLB_MISS * 100 / PM_RUN_INST_CMPL",
1713 "MetricGroup": "translation",
1714 "MetricName": "dslb_miss_rate_percent"
1715 },
1716 {
1717 "BriefDescription": "% ISLB miss rate per inst",
1718 "MetricExpr": "PM_ISLB_MISS * 100 / PM_RUN_INST_CMPL",
1719 "MetricGroup": "translation",
1720 "MetricName": "islb_miss_rate_percent"
1721 },
1722 {
1723 "BriefDescription": "ANY_SYNC_STALL_CPI",
1724 "MetricExpr": "PM_CMPLU_STALL_ANY_SYNC / PM_RUN_INST_CMPL",
1725 "MetricName": "any_sync_stall_cpi"
1726 },
1727 {
1728 "BriefDescription": "Avg. more than 1 instructions completed",
1729 "MetricExpr": "PM_INST_CMPL / PM_1PLUS_PPC_CMPL",
1730 "MetricName": "average_completed_instruction_set_size"
1731 },
1732 {
1733 "BriefDescription": "% Branches per instruction",
1734 "MetricExpr": "PM_BRU_FIN / PM_RUN_INST_CMPL",
1735 "MetricName": "branches_per_inst"
1736 },
1737 {
1738 "BriefDescription": "Cycles in which at least one instruction completes in this thread",
1739 "MetricExpr": "PM_1PLUS_PPC_CMPL/PM_RUN_INST_CMPL",
1740 "MetricName": "completion_cpi"
1741 },
1742 {
1743 "BriefDescription": "cycles",
1744 "MetricExpr": "PM_RUN_CYC",
1745 "MetricName": "custom_secs"
1746 },
1747 {
1748 "BriefDescription": "Percentage Cycles atleast one instruction dispatched",
1749 "MetricExpr": "PM_1PLUS_PPC_DISP / PM_CYC * 100",
1750 "MetricName": "cycles_atleast_one_inst_dispatched_percent"
1751 },
1752 {
1753 "BriefDescription": "Cycles per instruction group",
1754 "MetricExpr": "PM_CYC / PM_1PLUS_PPC_CMPL",
1755 "MetricName": "cycles_per_completed_instructions_set"
1756 },
1757 {
1758 "BriefDescription": "% of DL1 dL1_Reloads from Distant L4",
1759 "MetricExpr": "PM_DATA_FROM_DL4 * 100 / PM_L1_DCACHE_RELOAD_VALID",
1760 "MetricName": "dl1_reload_from_dl4_percent"
1761 },
1762 {
1763 "BriefDescription": "% of DL1 Reloads from Distant L4 per Inst",
1764 "MetricExpr": "PM_DATA_FROM_DL4 * 100 / PM_RUN_INST_CMPL",
1765 "MetricName": "dl1_reload_from_dl4_rate_percent"
1766 },
1767 {
1768 "BriefDescription": "% of DL1 reloads from Private L3, other core per Inst",
1769 "MetricExpr": "(PM_DATA_FROM_L31_MOD + PM_DATA_FROM_L31_SHR) * 100 / PM_RUN_INST_CMPL",
1770 "MetricName": "dl1_reload_from_l31_rate_percent"
1771 },
1772 {
1773 "BriefDescription": "% of DL1 dL1_Reloads from Local L4",
1774 "MetricExpr": "PM_DATA_FROM_LL4 * 100 / PM_L1_DCACHE_RELOAD_VALID",
1775 "MetricName": "dl1_reload_from_ll4_percent"
1776 },
1777 {
1778 "BriefDescription": "% of DL1 Reloads from Local L4 per Inst",
1779 "MetricExpr": "PM_DATA_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
1780 "MetricName": "dl1_reload_from_ll4_rate_percent"
1781 },
1782 {
1783 "BriefDescription": "% of DL1 dL1_Reloads from Remote L4",
1784 "MetricExpr": "PM_DATA_FROM_RL4 * 100 / PM_L1_DCACHE_RELOAD_VALID",
1785 "MetricName": "dl1_reload_from_rl4_percent"
1786 },
1787 {
1788 "BriefDescription": "% of DL1 Reloads from Remote Memory per Inst",
1789 "MetricExpr": "PM_DATA_FROM_RL4 * 100 / PM_RUN_INST_CMPL",
1790 "MetricName": "dl1_reload_from_rl4_rate_percent"
1791 },
1792 {
1793 "BriefDescription": "Rate of DERAT reloads from L2",
1794 "MetricExpr": "PM_DPTEG_FROM_L2 * 100 / PM_RUN_INST_CMPL",
1795 "MetricName": "dpteg_from_l2_rate_percent"
1796 },
1797 {
1798 "BriefDescription": "Rate of DERAT reloads from L3",
1799 "MetricExpr": "PM_DPTEG_FROM_L3 * 100 / PM_RUN_INST_CMPL",
1800 "MetricName": "dpteg_from_l3_rate_percent"
1801 },
1802 {
1803 "BriefDescription": "Cycles in which the oldest instruction is finished and ready to complete for waiting to get through the completion pipe",
1804 "MetricExpr": "PM_NTC_ALL_FIN / PM_RUN_INST_CMPL",
1805 "MetricName": "finish_to_cmpl_cpi"
1806 },
1807 {
1808 "BriefDescription": "Total Fixed point operations",
1809 "MetricExpr": "PM_FXU_FIN/PM_RUN_INST_CMPL",
1810 "MetricName": "fixed_per_inst"
1811 },
1812 {
1813 "BriefDescription": "All FXU Busy",
1814 "MetricExpr": "PM_FXU_BUSY / PM_CYC",
1815 "MetricName": "fxu_all_busy"
1816 },
1817 {
1818 "BriefDescription": "All FXU Idle",
1819 "MetricExpr": "PM_FXU_IDLE / PM_CYC",
1820 "MetricName": "fxu_all_idle"
1821 },
1822 {
1823 "BriefDescription": "Ict empty for this thread due to branch mispred",
1824 "MetricExpr": "PM_ICT_NOSLOT_BR_MPRED/PM_RUN_INST_CMPL",
1825 "MetricName": "ict_noslot_br_mpred_cpi"
1826 },
1827 {
1828 "BriefDescription": "Ict empty for this thread due to Icache Miss and branch mispred",
1829 "MetricExpr": "PM_ICT_NOSLOT_BR_MPRED_ICMISS/PM_RUN_INST_CMPL",
1830 "MetricName": "ict_noslot_br_mpred_icmiss_cpi"
1831 },
1832 {
1833 "BriefDescription": "ICT other stalls",
1834 "MetricExpr": "(PM_ICT_NOSLOT_CYC - PM_ICT_NOSLOT_IC_MISS - PM_ICT_NOSLOT_BR_MPRED_ICMISS - PM_ICT_NOSLOT_BR_MPRED - PM_ICT_NOSLOT_DISP_HELD)/PM_RUN_INST_CMPL",
1835 "MetricName": "ict_noslot_cyc_other_cpi"
1836 },
1837 {
1838 "BriefDescription": "Cycles in which the NTC instruciton is held at dispatch for any reason",
1839 "MetricExpr": "PM_ICT_NOSLOT_DISP_HELD/PM_RUN_INST_CMPL",
1840 "MetricName": "ict_noslot_disp_held_cpi"
1841 },
1842 {
1843 "BriefDescription": "Ict empty for this thread due to dispatch holds because the History Buffer was full. Could be GPR/VSR/VMR/FPR/CR/XVF",
1844 "MetricExpr": "PM_ICT_NOSLOT_DISP_HELD_HB_FULL/PM_RUN_INST_CMPL",
1845 "MetricName": "ict_noslot_disp_held_hb_full_cpi"
1846 },
1847 {
1848 "BriefDescription": "Ict empty for this thread due to dispatch hold on this thread due to Issue q full, BRQ full, XVCF Full, Count cache, Link, Tar full",
1849 "MetricExpr": "PM_ICT_NOSLOT_DISP_HELD_ISSQ/PM_RUN_INST_CMPL",
1850 "MetricName": "ict_noslot_disp_held_issq_cpi"
1851 },
1852 {
1853 "BriefDescription": "ICT_NOSLOT_DISP_HELD_OTHER_CPI",
1854 "MetricExpr": "(PM_ICT_NOSLOT_DISP_HELD - PM_ICT_NOSLOT_DISP_HELD_HB_FULL - PM_ICT_NOSLOT_DISP_HELD_SYNC - PM_ICT_NOSLOT_DISP_HELD_TBEGIN - PM_ICT_NOSLOT_DISP_HELD_ISSQ)/PM_RUN_INST_CMPL",
1855 "MetricName": "ict_noslot_disp_held_other_cpi"
1856 },
1857 {
1858 "BriefDescription": "Dispatch held due to a synchronizing instruction at dispatch",
1859 "MetricExpr": "PM_ICT_NOSLOT_DISP_HELD_SYNC/PM_RUN_INST_CMPL",
1860 "MetricName": "ict_noslot_disp_held_sync_cpi"
1861 },
1862 {
1863 "BriefDescription": "the NTC instruction is being held at dispatch because it is a tbegin instruction and there is an older tbegin in the pipeline that must complete before the younger tbegin can dispatch",
1864 "MetricExpr": "PM_ICT_NOSLOT_DISP_HELD_TBEGIN/PM_RUN_INST_CMPL",
1865 "MetricName": "ict_noslot_disp_held_tbegin_cpi"
1866 },
1867 {
1868 "BriefDescription": "ICT_NOSLOT_IC_L2_CPI",
1869 "MetricExpr": "(PM_ICT_NOSLOT_IC_MISS - PM_ICT_NOSLOT_IC_L3 - PM_ICT_NOSLOT_IC_L3MISS)/PM_RUN_INST_CMPL",
1870 "MetricName": "ict_noslot_ic_l2_cpi"
1871 },
1872 {
1873 "BriefDescription": "Ict empty for this thread due to icache misses that were sourced from the local L3",
1874 "MetricExpr": "PM_ICT_NOSLOT_IC_L3/PM_RUN_INST_CMPL",
1875 "MetricName": "ict_noslot_ic_l3_cpi"
1876 },
1877 {
1878 "BriefDescription": "Ict empty for this thread due to icache misses that were sourced from beyond the local L3. The source could be local/remote/distant memory or another core's cache",
1879 "MetricExpr": "PM_ICT_NOSLOT_IC_L3MISS/PM_RUN_INST_CMPL",
1880 "MetricName": "ict_noslot_ic_l3miss_cpi"
1881 },
1882 {
1883 "BriefDescription": "Ict empty for this thread due to Icache Miss",
1884 "MetricExpr": "PM_ICT_NOSLOT_IC_MISS/PM_RUN_INST_CMPL",
1885 "MetricName": "ict_noslot_ic_miss_cpi"
1886 },
1887 {
1888 "BriefDescription": "Rate of IERAT reloads from L2",
1889 "MetricExpr": "PM_IPTEG_FROM_L2 * 100 / PM_RUN_INST_CMPL",
1890 "MetricName": "ipteg_from_l2_rate_percent"
1891 },
1892 {
1893 "BriefDescription": "Rate of IERAT reloads from L3",
1894 "MetricExpr": "PM_IPTEG_FROM_L3 * 100 / PM_RUN_INST_CMPL",
1895 "MetricName": "ipteg_from_l3_rate_percent"
1896 },
1897 {
1898 "BriefDescription": "Rate of IERAT reloads from local memory",
1899 "MetricExpr": "PM_IPTEG_FROM_LL4 * 100 / PM_RUN_INST_CMPL",
1900 "MetricName": "ipteg_from_ll4_rate_percent"
1901 },
1902 {
1903 "BriefDescription": "Rate of IERAT reloads from local memory",
1904 "MetricExpr": "PM_IPTEG_FROM_LMEM * 100 / PM_RUN_INST_CMPL",
1905 "MetricName": "ipteg_from_lmem_rate_percent"
1906 },
1907 {
1908 "BriefDescription": "Average number of Castout machines used. 1 of 16 CO machines is sampled every L2 cycle",
1909 "MetricExpr": "PM_CO_USAGE / PM_RUN_CYC * 16",
1910 "MetricName": "l2_co_usage"
1911 },
1912 {
1913 "BriefDescription": "Percent of instruction reads out of all L2 commands",
1914 "MetricExpr": "PM_ISIDE_DISP * 100 / (PM_L2_ST + PM_L2_LD + PM_ISIDE_DISP)",
1915 "MetricName": "l2_instr_commands_percent"
1916 },
1917 {
1918 "BriefDescription": "Percent of loads out of all L2 commands",
1919 "MetricExpr": "PM_L2_LD * 100 / (PM_L2_ST + PM_L2_LD + PM_ISIDE_DISP)",
1920 "MetricName": "l2_ld_commands_percent"
1921 },
1922 {
1923 "BriefDescription": "Rate of L2 store dispatches that failed per core",
1924 "MetricExpr": "100 * (PM_L2_RCST_DISP_FAIL_ADDR + PM_L2_RCST_DISP_FAIL_OTHER)/2 / PM_RUN_INST_CMPL",
1925 "MetricName": "l2_rc_st_disp_fail_rate_percent"
1926 },
1927 {
1928 "BriefDescription": "Average number of Read/Claim machines used. 1 of 16 RC machines is sampled every L2 cycle",
1929 "MetricExpr": "PM_RC_USAGE / PM_RUN_CYC * 16",
1930 "MetricName": "l2_rc_usage"
1931 },
1932 {
1933 "BriefDescription": "Average number of Snoop machines used. 1 of 8 SN machines is sampled every L2 cycle",
1934 "MetricExpr": "PM_SN_USAGE / PM_RUN_CYC * 8",
1935 "MetricName": "l2_sn_usage"
1936 },
1937 {
1938 "BriefDescription": "Percent of stores out of all L2 commands",
1939 "MetricExpr": "PM_L2_ST * 100 / (PM_L2_ST + PM_L2_LD + PM_ISIDE_DISP)",
1940 "MetricName": "l2_st_commands_percent"
1941 },
1942 {
1943 "BriefDescription": "Rate of L2 store dispatches that failed per core",
1944 "MetricExpr": "100 * (PM_L2_RCST_DISP_FAIL_ADDR + PM_L2_RCST_DISP_FAIL_OTHER)/2 / PM_RUN_INST_CMPL",
1945 "MetricName": "l2_st_disp_fail_rate_percent"
1946 },
1947 {
1948 "BriefDescription": "Rate of L2 dispatches per core",
1949 "MetricExpr": "100 * PM_L2_RCST_DISP/2 / PM_RUN_INST_CMPL",
1950 "MetricName": "l2_st_disp_rate_percent"
1951 },
1952 {
1953 "BriefDescription": "Marked L31 Load latency",
1954 "MetricExpr": "(PM_MRK_DATA_FROM_L31_SHR_CYC + PM_MRK_DATA_FROM_L31_MOD_CYC) / (PM_MRK_DATA_FROM_L31_SHR + PM_MRK_DATA_FROM_L31_MOD)",
1955 "MetricName": "l31_latency"
1956 },
1957 {
1958 "BriefDescription": "PCT instruction loads",
1959 "MetricExpr": "PM_LD_REF_L1 / PM_RUN_INST_CMPL",
1960 "MetricName": "loads_per_inst"
1961 },
1962 {
1963 "BriefDescription": "Cycles stalled by D-Cache Misses",
1964 "MetricExpr": "PM_CMPLU_STALL_DCACHE_MISS / PM_RUN_INST_CMPL",
1965 "MetricName": "lsu_stall_dcache_miss_cpi"
1966 },
1967 {
1968 "BriefDescription": "Completion stall because a different thread was using the completion pipe",
1969 "MetricExpr": "(PM_CMPLU_STALL_THRD - PM_CMPLU_STALL_EXCEPTION - PM_CMPLU_STALL_ANY_SYNC - PM_CMPLU_STALL_SYNC_PMU_INT - PM_CMPLU_STALL_SPEC_FINISH - PM_CMPLU_STALL_FLUSH_ANY_THREAD - PM_CMPLU_STALL_LSU_FLUSH_NEXT - PM_CMPLU_STALL_NESTED_TBEGIN - PM_CMPLU_STALL_NESTED_TEND - PM_CMPLU_STALL_MTFPSCR)/PM_RUN_INST_CMPL",
1970 "MetricName": "other_thread_cmpl_stall"
1971 },
1972 {
1973 "BriefDescription": "PCT instruction stores",
1974 "MetricExpr": "PM_ST_FIN / PM_RUN_INST_CMPL",
1975 "MetricName": "stores_per_inst"
1976 },
1977 {
1978 "BriefDescription": "ANY_SYNC_STALL_CPI",
1979 "MetricExpr": "PM_CMPLU_STALL_SYNC_PMU_INT / PM_RUN_INST_CMPL",
1980 "MetricName": "sync_pmu_int_stall_cpi"
1981 }
1982]
diff --git a/tools/perf/scripts/Build b/tools/perf/scripts/Build
index 41efd7e368b3..68d4b54574ad 100644
--- a/tools/perf/scripts/Build
+++ b/tools/perf/scripts/Build
@@ -1,2 +1,2 @@
1libperf-$(CONFIG_LIBPERL) += perl/Perf-Trace-Util/ 1perf-$(CONFIG_LIBPERL) += perl/Perf-Trace-Util/
2libperf-$(CONFIG_LIBPYTHON) += python/Perf-Trace-Util/ 2perf-$(CONFIG_LIBPYTHON) += python/Perf-Trace-Util/
diff --git a/tools/perf/scripts/perl/Perf-Trace-Util/Build b/tools/perf/scripts/perl/Perf-Trace-Util/Build
index 34faecf774ae..db0036129307 100644
--- a/tools/perf/scripts/perl/Perf-Trace-Util/Build
+++ b/tools/perf/scripts/perl/Perf-Trace-Util/Build
@@ -1,4 +1,4 @@
1libperf-y += Context.o 1perf-y += Context.o
2 2
3CFLAGS_Context.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes 3CFLAGS_Context.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes
4CFLAGS_Context.o += -Wno-unused-parameter -Wno-nested-externs -Wno-undef 4CFLAGS_Context.o += -Wno-unused-parameter -Wno-nested-externs -Wno-undef
diff --git a/tools/perf/scripts/python/Perf-Trace-Util/Build b/tools/perf/scripts/python/Perf-Trace-Util/Build
index aefc15c9444a..7d0e33ce6aba 100644
--- a/tools/perf/scripts/python/Perf-Trace-Util/Build
+++ b/tools/perf/scripts/python/Perf-Trace-Util/Build
@@ -1,3 +1,3 @@
1libperf-y += Context.o 1perf-y += Context.o
2 2
3CFLAGS_Context.o += $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs 3CFLAGS_Context.o += $(PYTHON_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-nested-externs
diff --git a/tools/perf/tests/parse-events.c b/tools/perf/tests/parse-events.c
index 3b97ac018d5a..4a69c07f4101 100644
--- a/tools/perf/tests/parse-events.c
+++ b/tools/perf/tests/parse-events.c
@@ -1330,6 +1330,26 @@ static int test__checkevent_complex_name(struct perf_evlist *evlist)
1330 return 0; 1330 return 0;
1331} 1331}
1332 1332
1333static int test__sym_event_slash(struct perf_evlist *evlist)
1334{
1335 struct perf_evsel *evsel = perf_evlist__first(evlist);
1336
1337 TEST_ASSERT_VAL("wrong type", evsel->attr.type == PERF_TYPE_HARDWARE);
1338 TEST_ASSERT_VAL("wrong config", evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES);
1339 TEST_ASSERT_VAL("wrong exclude_kernel", evsel->attr.exclude_kernel);
1340 return 0;
1341}
1342
1343static int test__sym_event_dc(struct perf_evlist *evlist)
1344{
1345 struct perf_evsel *evsel = perf_evlist__first(evlist);
1346
1347 TEST_ASSERT_VAL("wrong type", evsel->attr.type == PERF_TYPE_HARDWARE);
1348 TEST_ASSERT_VAL("wrong config", evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES);
1349 TEST_ASSERT_VAL("wrong exclude_user", evsel->attr.exclude_user);
1350 return 0;
1351}
1352
1333static int count_tracepoints(void) 1353static int count_tracepoints(void)
1334{ 1354{
1335 struct dirent *events_ent; 1355 struct dirent *events_ent;
@@ -1670,6 +1690,16 @@ static struct evlist_test test__events[] = {
1670 .name = "cycles/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks'/Duk", 1690 .name = "cycles/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks'/Duk",
1671 .check = test__checkevent_complex_name, 1691 .check = test__checkevent_complex_name,
1672 .id = 53 1692 .id = 53
1693 },
1694 {
1695 .name = "cycles//u",
1696 .check = test__sym_event_slash,
1697 .id = 54,
1698 },
1699 {
1700 .name = "cycles:k",
1701 .check = test__sym_event_dc,
1702 .id = 55,
1673 } 1703 }
1674}; 1704};
1675 1705
diff --git a/tools/perf/trace/beauty/Build b/tools/perf/trace/beauty/Build
index 637365099b7d..85f328ddf897 100644
--- a/tools/perf/trace/beauty/Build
+++ b/tools/perf/trace/beauty/Build
@@ -1,15 +1,15 @@
1libperf-y += clone.o 1perf-y += clone.o
2libperf-y += fcntl.o 2perf-y += fcntl.o
3libperf-y += flock.o 3perf-y += flock.o
4ifeq ($(SRCARCH),$(filter $(SRCARCH),x86)) 4ifeq ($(SRCARCH),$(filter $(SRCARCH),x86))
5libperf-y += ioctl.o 5perf-y += ioctl.o
6endif 6endif
7libperf-y += kcmp.o 7perf-y += kcmp.o
8libperf-y += mount_flags.o 8perf-y += mount_flags.o
9libperf-y += pkey_alloc.o 9perf-y += pkey_alloc.o
10libperf-y += arch_prctl.o 10perf-y += arch_prctl.o
11libperf-y += prctl.o 11perf-y += prctl.o
12libperf-y += renameat.o 12perf-y += renameat.o
13libperf-y += sockaddr.o 13perf-y += sockaddr.o
14libperf-y += socket.o 14perf-y += socket.o
15libperf-y += statx.o 15perf-y += statx.o
diff --git a/tools/perf/trace/beauty/ioctl.c b/tools/perf/trace/beauty/ioctl.c
index 620350d41209..52242fa4072b 100644
--- a/tools/perf/trace/beauty/ioctl.c
+++ b/tools/perf/trace/beauty/ioctl.c
@@ -175,7 +175,7 @@ static size_t ioctl__scnprintf_cmd(unsigned long cmd, char *bf, size_t size, boo
175size_t syscall_arg__scnprintf_ioctl_cmd(char *bf, size_t size, struct syscall_arg *arg) 175size_t syscall_arg__scnprintf_ioctl_cmd(char *bf, size_t size, struct syscall_arg *arg)
176{ 176{
177 unsigned long cmd = arg->val; 177 unsigned long cmd = arg->val;
178 unsigned int fd = syscall_arg__val(arg, 0); 178 int fd = syscall_arg__val(arg, 0);
179 struct file *file = thread__files_entry(arg->thread, fd); 179 struct file *file = thread__files_entry(arg->thread, fd);
180 180
181 if (file != NULL) { 181 if (file != NULL) {
diff --git a/tools/perf/trace/beauty/waitid_options.c b/tools/perf/trace/beauty/waitid_options.c
index 6897fab40dcc..d4d10b33ba0e 100644
--- a/tools/perf/trace/beauty/waitid_options.c
+++ b/tools/perf/trace/beauty/waitid_options.c
@@ -11,7 +11,7 @@ static size_t syscall_arg__scnprintf_waitid_options(char *bf, size_t size,
11 11
12#define P_OPTION(n) \ 12#define P_OPTION(n) \
13 if (options & W##n) { \ 13 if (options & W##n) { \
14 printed += scnprintf(bf + printed, size - printed, "%s%s%s", printed ? "|" : "", show_prefix ? prefix : #n); \ 14 printed += scnprintf(bf + printed, size - printed, "%s%s%s", printed ? "|" : "", show_prefix ? prefix : "", #n); \
15 options &= ~W##n; \ 15 options &= ~W##n; \
16 } 16 }
17 17
diff --git a/tools/perf/ui/Build b/tools/perf/ui/Build
index 0a73538c0441..3aff83c3275f 100644
--- a/tools/perf/ui/Build
+++ b/tools/perf/ui/Build
@@ -1,14 +1,14 @@
1libperf-y += setup.o 1perf-y += setup.o
2libperf-y += helpline.o 2perf-y += helpline.o
3libperf-y += progress.o 3perf-y += progress.o
4libperf-y += util.o 4perf-y += util.o
5libperf-y += hist.o 5perf-y += hist.o
6libperf-y += stdio/hist.o 6perf-y += stdio/hist.o
7 7
8CFLAGS_setup.o += -DLIBDIR="BUILD_STR($(LIBDIR))" 8CFLAGS_setup.o += -DLIBDIR="BUILD_STR($(LIBDIR))"
9 9
10libperf-$(CONFIG_SLANG) += browser.o 10perf-$(CONFIG_SLANG) += browser.o
11libperf-$(CONFIG_SLANG) += browsers/ 11perf-$(CONFIG_SLANG) += browsers/
12libperf-$(CONFIG_SLANG) += tui/ 12perf-$(CONFIG_SLANG) += tui/
13 13
14CFLAGS_browser.o += -DENABLE_SLFUTURE_CONST 14CFLAGS_browser.o += -DENABLE_SLFUTURE_CONST
diff --git a/tools/perf/ui/browsers/Build b/tools/perf/ui/browsers/Build
index de223f5bed58..8fee56b46502 100644
--- a/tools/perf/ui/browsers/Build
+++ b/tools/perf/ui/browsers/Build
@@ -1,8 +1,8 @@
1libperf-y += annotate.o 1perf-y += annotate.o
2libperf-y += hists.o 2perf-y += hists.o
3libperf-y += map.o 3perf-y += map.o
4libperf-y += scripts.o 4perf-y += scripts.o
5libperf-y += header.o 5perf-y += header.o
6 6
7CFLAGS_annotate.o += -DENABLE_SLFUTURE_CONST 7CFLAGS_annotate.o += -DENABLE_SLFUTURE_CONST
8CFLAGS_hists.o += -DENABLE_SLFUTURE_CONST 8CFLAGS_hists.o += -DENABLE_SLFUTURE_CONST
diff --git a/tools/perf/ui/tui/Build b/tools/perf/ui/tui/Build
index 9e4c6ca41a9f..f916df33a1a7 100644
--- a/tools/perf/ui/tui/Build
+++ b/tools/perf/ui/tui/Build
@@ -1,4 +1,4 @@
1libperf-y += setup.o 1perf-y += setup.o
2libperf-y += util.o 2perf-y += util.o
3libperf-y += helpline.o 3perf-y += helpline.o
4libperf-y += progress.o 4perf-y += progress.o
diff --git a/tools/perf/util/Build b/tools/perf/util/Build
index a36e6e5a6f4f..ca0741c91903 100644
--- a/tools/perf/util/Build
+++ b/tools/perf/util/Build
@@ -1,162 +1,162 @@
1libperf-y += annotate.o 1perf-y += annotate.o
2libperf-y += block-range.o 2perf-y += block-range.o
3libperf-y += build-id.o 3perf-y += build-id.o
4libperf-y += config.o 4perf-y += config.o
5libperf-y += ctype.o 5perf-y += ctype.o
6libperf-y += db-export.o 6perf-y += db-export.o
7libperf-y += env.o 7perf-y += env.o
8libperf-y += event.o 8perf-y += event.o
9libperf-y += evlist.o 9perf-y += evlist.o
10libperf-y += evsel.o 10perf-y += evsel.o
11libperf-y += evsel_fprintf.o 11perf-y += evsel_fprintf.o
12libperf-y += find_bit.o 12perf-y += find_bit.o
13libperf-y += get_current_dir_name.o 13perf-y += get_current_dir_name.o
14libperf-y += kallsyms.o 14perf-y += kallsyms.o
15libperf-y += levenshtein.o 15perf-y += levenshtein.o
16libperf-y += llvm-utils.o 16perf-y += llvm-utils.o
17libperf-y += mmap.o 17perf-y += mmap.o
18libperf-y += memswap.o 18perf-y += memswap.o
19libperf-y += parse-events.o 19perf-y += parse-events.o
20libperf-y += perf_regs.o 20perf-y += perf_regs.o
21libperf-y += path.o 21perf-y += path.o
22libperf-y += print_binary.o 22perf-y += print_binary.o
23libperf-y += rbtree.o 23perf-y += rbtree.o
24libperf-y += libstring.o 24perf-y += libstring.o
25libperf-y += bitmap.o 25perf-y += bitmap.o
26libperf-y += hweight.o 26perf-y += hweight.o
27libperf-y += smt.o 27perf-y += smt.o
28libperf-y += strbuf.o 28perf-y += strbuf.o
29libperf-y += string.o 29perf-y += string.o
30libperf-y += strlist.o 30perf-y += strlist.o
31libperf-y += strfilter.o 31perf-y += strfilter.o
32libperf-y += top.o 32perf-y += top.o
33libperf-y += usage.o 33perf-y += usage.o
34libperf-y += dso.o 34perf-y += dso.o
35libperf-y += symbol.o 35perf-y += symbol.o
36libperf-y += symbol_fprintf.o 36perf-y += symbol_fprintf.o
37libperf-y += color.o 37perf-y += color.o
38libperf-y += color_config.o 38perf-y += color_config.o
39libperf-y += metricgroup.o 39perf-y += metricgroup.o
40libperf-y += header.o 40perf-y += header.o
41libperf-y += callchain.o 41perf-y += callchain.o
42libperf-y += values.o 42perf-y += values.o
43libperf-y += debug.o 43perf-y += debug.o
44libperf-y += machine.o 44perf-y += machine.o
45libperf-y += map.o 45perf-y += map.o
46libperf-y += pstack.o 46perf-y += pstack.o
47libperf-y += session.o 47perf-y += session.o
48libperf-y += sample-raw.o 48perf-y += sample-raw.o
49libperf-y += s390-sample-raw.o 49perf-y += s390-sample-raw.o
50libperf-$(CONFIG_TRACE) += syscalltbl.o 50perf-$(CONFIG_TRACE) += syscalltbl.o
51libperf-y += ordered-events.o 51perf-y += ordered-events.o
52libperf-y += namespaces.o 52perf-y += namespaces.o
53libperf-y += comm.o 53perf-y += comm.o
54libperf-y += thread.o 54perf-y += thread.o
55libperf-y += thread_map.o 55perf-y += thread_map.o
56libperf-y += trace-event-parse.o 56perf-y += trace-event-parse.o
57libperf-y += parse-events-flex.o 57perf-y += parse-events-flex.o
58libperf-y += parse-events-bison.o 58perf-y += parse-events-bison.o
59libperf-y += pmu.o 59perf-y += pmu.o
60libperf-y += pmu-flex.o 60perf-y += pmu-flex.o
61libperf-y += pmu-bison.o 61perf-y += pmu-bison.o
62libperf-y += trace-event-read.o 62perf-y += trace-event-read.o
63libperf-y += trace-event-info.o 63perf-y += trace-event-info.o
64libperf-y += trace-event-scripting.o 64perf-y += trace-event-scripting.o
65libperf-y += trace-event.o 65perf-y += trace-event.o
66libperf-y += svghelper.o 66perf-y += svghelper.o
67libperf-y += sort.o 67perf-y += sort.o
68libperf-y += hist.o 68perf-y += hist.o
69libperf-y += util.o 69perf-y += util.o
70libperf-y += xyarray.o 70perf-y += xyarray.o
71libperf-y += cpumap.o 71perf-y += cpumap.o
72libperf-y += cgroup.o 72perf-y += cgroup.o
73libperf-y += target.o 73perf-y += target.o
74libperf-y += rblist.o 74perf-y += rblist.o
75libperf-y += intlist.o 75perf-y += intlist.o
76libperf-y += vdso.o 76perf-y += vdso.o
77libperf-y += counts.o 77perf-y += counts.o
78libperf-y += stat.o 78perf-y += stat.o
79libperf-y += stat-shadow.o 79perf-y += stat-shadow.o
80libperf-y += stat-display.o 80perf-y += stat-display.o
81libperf-y += record.o 81perf-y += record.o
82libperf-y += srcline.o 82perf-y += srcline.o
83libperf-y += srccode.o 83perf-y += srccode.o
84libperf-y += data.o 84perf-y += data.o
85libperf-y += tsc.o 85perf-y += tsc.o
86libperf-y += cloexec.o 86perf-y += cloexec.o
87libperf-y += call-path.o 87perf-y += call-path.o
88libperf-y += rwsem.o 88perf-y += rwsem.o
89libperf-y += thread-stack.o 89perf-y += thread-stack.o
90libperf-$(CONFIG_AUXTRACE) += auxtrace.o 90perf-$(CONFIG_AUXTRACE) += auxtrace.o
91libperf-$(CONFIG_AUXTRACE) += intel-pt-decoder/ 91perf-$(CONFIG_AUXTRACE) += intel-pt-decoder/
92libperf-$(CONFIG_AUXTRACE) += intel-pt.o 92perf-$(CONFIG_AUXTRACE) += intel-pt.o
93libperf-$(CONFIG_AUXTRACE) += intel-bts.o 93perf-$(CONFIG_AUXTRACE) += intel-bts.o
94libperf-$(CONFIG_AUXTRACE) += arm-spe.o 94perf-$(CONFIG_AUXTRACE) += arm-spe.o
95libperf-$(CONFIG_AUXTRACE) += arm-spe-pkt-decoder.o 95perf-$(CONFIG_AUXTRACE) += arm-spe-pkt-decoder.o
96libperf-$(CONFIG_AUXTRACE) += s390-cpumsf.o 96perf-$(CONFIG_AUXTRACE) += s390-cpumsf.o
97 97
98ifdef CONFIG_LIBOPENCSD 98ifdef CONFIG_LIBOPENCSD
99libperf-$(CONFIG_AUXTRACE) += cs-etm.o 99perf-$(CONFIG_AUXTRACE) += cs-etm.o
100libperf-$(CONFIG_AUXTRACE) += cs-etm-decoder/ 100perf-$(CONFIG_AUXTRACE) += cs-etm-decoder/
101endif 101endif
102 102
103libperf-y += parse-branch-options.o 103perf-y += parse-branch-options.o
104libperf-y += dump-insn.o 104perf-y += dump-insn.o
105libperf-y += parse-regs-options.o 105perf-y += parse-regs-options.o
106libperf-y += term.o 106perf-y += term.o
107libperf-y += help-unknown-cmd.o 107perf-y += help-unknown-cmd.o
108libperf-y += mem-events.o 108perf-y += mem-events.o
109libperf-y += vsprintf.o 109perf-y += vsprintf.o
110libperf-y += units.o 110perf-y += units.o
111libperf-y += time-utils.o 111perf-y += time-utils.o
112libperf-y += expr-bison.o 112perf-y += expr-bison.o
113libperf-y += branch.o 113perf-y += branch.o
114libperf-y += mem2node.o 114perf-y += mem2node.o
115 115
116libperf-$(CONFIG_LIBBPF) += bpf-loader.o 116perf-$(CONFIG_LIBBPF) += bpf-loader.o
117libperf-$(CONFIG_BPF_PROLOGUE) += bpf-prologue.o 117perf-$(CONFIG_BPF_PROLOGUE) += bpf-prologue.o
118libperf-$(CONFIG_LIBELF) += symbol-elf.o 118perf-$(CONFIG_LIBELF) += symbol-elf.o
119libperf-$(CONFIG_LIBELF) += probe-file.o 119perf-$(CONFIG_LIBELF) += probe-file.o
120libperf-$(CONFIG_LIBELF) += probe-event.o 120perf-$(CONFIG_LIBELF) += probe-event.o
121 121
122ifndef CONFIG_LIBELF 122ifndef CONFIG_LIBELF
123libperf-y += symbol-minimal.o 123perf-y += symbol-minimal.o
124endif 124endif
125 125
126ifndef CONFIG_SETNS 126ifndef CONFIG_SETNS
127libperf-y += setns.o 127perf-y += setns.o
128endif 128endif
129 129
130libperf-$(CONFIG_DWARF) += probe-finder.o 130perf-$(CONFIG_DWARF) += probe-finder.o
131libperf-$(CONFIG_DWARF) += dwarf-aux.o 131perf-$(CONFIG_DWARF) += dwarf-aux.o
132libperf-$(CONFIG_DWARF) += dwarf-regs.o 132perf-$(CONFIG_DWARF) += dwarf-regs.o
133 133
134libperf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o 134perf-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o
135libperf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind-local.o 135perf-$(CONFIG_LOCAL_LIBUNWIND) += unwind-libunwind-local.o
136libperf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o 136perf-$(CONFIG_LIBUNWIND) += unwind-libunwind.o
137libperf-$(CONFIG_LIBUNWIND_X86) += libunwind/x86_32.o 137perf-$(CONFIG_LIBUNWIND_X86) += libunwind/x86_32.o
138libperf-$(CONFIG_LIBUNWIND_AARCH64) += libunwind/arm64.o 138perf-$(CONFIG_LIBUNWIND_AARCH64) += libunwind/arm64.o
139 139
140libperf-$(CONFIG_LIBBABELTRACE) += data-convert-bt.o 140perf-$(CONFIG_LIBBABELTRACE) += data-convert-bt.o
141 141
142libperf-y += scripting-engines/ 142perf-y += scripting-engines/
143 143
144libperf-$(CONFIG_ZLIB) += zlib.o 144perf-$(CONFIG_ZLIB) += zlib.o
145libperf-$(CONFIG_LZMA) += lzma.o 145perf-$(CONFIG_LZMA) += lzma.o
146libperf-y += demangle-java.o 146perf-y += demangle-java.o
147libperf-y += demangle-rust.o 147perf-y += demangle-rust.o
148 148
149ifdef CONFIG_JITDUMP 149ifdef CONFIG_JITDUMP
150libperf-$(CONFIG_LIBELF) += jitdump.o 150perf-$(CONFIG_LIBELF) += jitdump.o
151libperf-$(CONFIG_LIBELF) += genelf.o 151perf-$(CONFIG_LIBELF) += genelf.o
152libperf-$(CONFIG_DWARF) += genelf_debug.o 152perf-$(CONFIG_DWARF) += genelf_debug.o
153endif 153endif
154 154
155libperf-y += perf-hooks.o 155perf-y += perf-hooks.o
156 156
157libperf-$(CONFIG_LIBBPF) += bpf-event.o 157perf-$(CONFIG_LIBBPF) += bpf-event.o
158 158
159libperf-$(CONFIG_CXX) += c++/ 159perf-$(CONFIG_CXX) += c++/
160 160
161CFLAGS_config.o += -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))" 161CFLAGS_config.o += -DETC_PERFCONFIG="BUILD_STR($(ETC_PERFCONFIG_SQ))"
162CFLAGS_llvm-utils.o += -DPERF_INCLUDE_DIR="BUILD_STR($(perf_include_dir_SQ))" 162CFLAGS_llvm-utils.o += -DPERF_INCLUDE_DIR="BUILD_STR($(perf_include_dir_SQ))"
diff --git a/tools/perf/util/bpf-event.c b/tools/perf/util/bpf-event.c
index 796ef793f4ce..62dda96b0096 100644
--- a/tools/perf/util/bpf-event.c
+++ b/tools/perf/util/bpf-event.c
@@ -236,8 +236,8 @@ int perf_event__synthesize_bpf_events(struct perf_tool *tool,
236 pr_debug("%s: can't get next program: %s%s", 236 pr_debug("%s: can't get next program: %s%s",
237 __func__, strerror(errno), 237 __func__, strerror(errno),
238 errno == EINVAL ? " -- kernel too old?" : ""); 238 errno == EINVAL ? " -- kernel too old?" : "");
239 /* don't report error on old kernel */ 239 /* don't report error on old kernel or EPERM */
240 err = (errno == EINVAL) ? 0 : -1; 240 err = (errno == EINVAL || errno == EPERM) ? 0 : -1;
241 break; 241 break;
242 } 242 }
243 fd = bpf_prog_get_fd_by_id(id); 243 fd = bpf_prog_get_fd_by_id(id);
diff --git a/tools/perf/util/c++/Build b/tools/perf/util/c++/Build
index 988fef1b11d7..613ecfd76527 100644
--- a/tools/perf/util/c++/Build
+++ b/tools/perf/util/c++/Build
@@ -1,2 +1,2 @@
1libperf-$(CONFIG_CLANGLLVM) += clang.o 1perf-$(CONFIG_CLANGLLVM) += clang.o
2libperf-$(CONFIG_CLANGLLVM) += clang-test.o 2perf-$(CONFIG_CLANGLLVM) += clang-test.o
diff --git a/tools/perf/util/cs-etm-decoder/Build b/tools/perf/util/cs-etm-decoder/Build
index bc22c39c727f..216cb17a3322 100644
--- a/tools/perf/util/cs-etm-decoder/Build
+++ b/tools/perf/util/cs-etm-decoder/Build
@@ -1 +1 @@
libperf-$(CONFIG_AUXTRACE) += cs-etm-decoder.o perf-$(CONFIG_AUXTRACE) += cs-etm-decoder.o
diff --git a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h
index 7e6a8850be4a..3ab11dfa92ae 100644
--- a/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h
+++ b/tools/perf/util/cs-etm-decoder/cs-etm-decoder.h
@@ -15,13 +15,6 @@
15 15
16struct cs_etm_decoder; 16struct cs_etm_decoder;
17 17
18struct cs_etm_buffer {
19 const unsigned char *buf;
20 size_t len;
21 u64 offset;
22 u64 ref_timestamp;
23};
24
25enum cs_etm_sample_type { 18enum cs_etm_sample_type {
26 CS_ETM_EMPTY, 19 CS_ETM_EMPTY,
27 CS_ETM_RANGE, 20 CS_ETM_RANGE,
@@ -105,9 +98,10 @@ enum {
105 CS_ETM_PROTO_PTM, 98 CS_ETM_PROTO_PTM,
106}; 99};
107 100
108enum { 101enum cs_etm_decoder_operation {
109 CS_ETM_OPERATION_PRINT = 1, 102 CS_ETM_OPERATION_PRINT = 1,
110 CS_ETM_OPERATION_DECODE, 103 CS_ETM_OPERATION_DECODE,
104 CS_ETM_OPERATION_MAX,
111}; 105};
112 106
113int cs_etm_decoder__process_data_block(struct cs_etm_decoder *decoder, 107int cs_etm_decoder__process_data_block(struct cs_etm_decoder *decoder,
diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c
index 8b3f882d6e2f..110804936fc3 100644
--- a/tools/perf/util/cs-etm.c
+++ b/tools/perf/util/cs-etm.c
@@ -25,6 +25,7 @@
25#include "machine.h" 25#include "machine.h"
26#include "map.h" 26#include "map.h"
27#include "perf.h" 27#include "perf.h"
28#include "symbol.h"
28#include "thread.h" 29#include "thread.h"
29#include "thread_map.h" 30#include "thread_map.h"
30#include "thread-stack.h" 31#include "thread-stack.h"
@@ -64,13 +65,10 @@ struct cs_etm_queue {
64 struct thread *thread; 65 struct thread *thread;
65 struct cs_etm_decoder *decoder; 66 struct cs_etm_decoder *decoder;
66 struct auxtrace_buffer *buffer; 67 struct auxtrace_buffer *buffer;
67 const struct cs_etm_state *state;
68 union perf_event *event_buf; 68 union perf_event *event_buf;
69 unsigned int queue_nr; 69 unsigned int queue_nr;
70 pid_t pid, tid; 70 pid_t pid, tid;
71 int cpu; 71 int cpu;
72 u64 time;
73 u64 timestamp;
74 u64 offset; 72 u64 offset;
75 u64 period_instructions; 73 u64 period_instructions;
76 struct branch_stack *last_branch; 74 struct branch_stack *last_branch;
@@ -78,11 +76,13 @@ struct cs_etm_queue {
78 size_t last_branch_pos; 76 size_t last_branch_pos;
79 struct cs_etm_packet *prev_packet; 77 struct cs_etm_packet *prev_packet;
80 struct cs_etm_packet *packet; 78 struct cs_etm_packet *packet;
79 const unsigned char *buf;
80 size_t buf_len, buf_used;
81}; 81};
82 82
83static int cs_etm__update_queues(struct cs_etm_auxtrace *etm); 83static int cs_etm__update_queues(struct cs_etm_auxtrace *etm);
84static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm, 84static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm,
85 pid_t tid, u64 time_); 85 pid_t tid);
86 86
87/* PTMs ETMIDR [11:8] set to b0011 */ 87/* PTMs ETMIDR [11:8] set to b0011 */
88#define ETMIDR_PTM_VERSION 0x00000300 88#define ETMIDR_PTM_VERSION 0x00000300
@@ -138,10 +138,83 @@ static void cs_etm__packet_dump(const char *pkt_string)
138 fflush(stdout); 138 fflush(stdout);
139} 139}
140 140
141static void cs_etm__set_trace_param_etmv3(struct cs_etm_trace_params *t_params,
142 struct cs_etm_auxtrace *etm, int idx,
143 u32 etmidr)
144{
145 u64 **metadata = etm->metadata;
146
147 t_params[idx].protocol = cs_etm__get_v7_protocol_version(etmidr);
148 t_params[idx].etmv3.reg_ctrl = metadata[idx][CS_ETM_ETMCR];
149 t_params[idx].etmv3.reg_trc_id = metadata[idx][CS_ETM_ETMTRACEIDR];
150}
151
152static void cs_etm__set_trace_param_etmv4(struct cs_etm_trace_params *t_params,
153 struct cs_etm_auxtrace *etm, int idx)
154{
155 u64 **metadata = etm->metadata;
156
157 t_params[idx].protocol = CS_ETM_PROTO_ETMV4i;
158 t_params[idx].etmv4.reg_idr0 = metadata[idx][CS_ETMV4_TRCIDR0];
159 t_params[idx].etmv4.reg_idr1 = metadata[idx][CS_ETMV4_TRCIDR1];
160 t_params[idx].etmv4.reg_idr2 = metadata[idx][CS_ETMV4_TRCIDR2];
161 t_params[idx].etmv4.reg_idr8 = metadata[idx][CS_ETMV4_TRCIDR8];
162 t_params[idx].etmv4.reg_configr = metadata[idx][CS_ETMV4_TRCCONFIGR];
163 t_params[idx].etmv4.reg_traceidr = metadata[idx][CS_ETMV4_TRCTRACEIDR];
164}
165
166static int cs_etm__init_trace_params(struct cs_etm_trace_params *t_params,
167 struct cs_etm_auxtrace *etm)
168{
169 int i;
170 u32 etmidr;
171 u64 architecture;
172
173 for (i = 0; i < etm->num_cpu; i++) {
174 architecture = etm->metadata[i][CS_ETM_MAGIC];
175
176 switch (architecture) {
177 case __perf_cs_etmv3_magic:
178 etmidr = etm->metadata[i][CS_ETM_ETMIDR];
179 cs_etm__set_trace_param_etmv3(t_params, etm, i, etmidr);
180 break;
181 case __perf_cs_etmv4_magic:
182 cs_etm__set_trace_param_etmv4(t_params, etm, i);
183 break;
184 default:
185 return -EINVAL;
186 }
187 }
188
189 return 0;
190}
191
192static int cs_etm__init_decoder_params(struct cs_etm_decoder_params *d_params,
193 struct cs_etm_queue *etmq,
194 enum cs_etm_decoder_operation mode)
195{
196 int ret = -EINVAL;
197
198 if (!(mode < CS_ETM_OPERATION_MAX))
199 goto out;
200
201 d_params->packet_printer = cs_etm__packet_dump;
202 d_params->operation = mode;
203 d_params->data = etmq;
204 d_params->formatted = true;
205 d_params->fsyncs = false;
206 d_params->hsyncs = false;
207 d_params->frame_aligned = true;
208
209 ret = 0;
210out:
211 return ret;
212}
213
141static void cs_etm__dump_event(struct cs_etm_auxtrace *etm, 214static void cs_etm__dump_event(struct cs_etm_auxtrace *etm,
142 struct auxtrace_buffer *buffer) 215 struct auxtrace_buffer *buffer)
143{ 216{
144 int i, ret; 217 int ret;
145 const char *color = PERF_COLOR_BLUE; 218 const char *color = PERF_COLOR_BLUE;
146 struct cs_etm_decoder_params d_params; 219 struct cs_etm_decoder_params d_params;
147 struct cs_etm_trace_params *t_params; 220 struct cs_etm_trace_params *t_params;
@@ -155,48 +228,22 @@ static void cs_etm__dump_event(struct cs_etm_auxtrace *etm,
155 228
156 /* Use metadata to fill in trace parameters for trace decoder */ 229 /* Use metadata to fill in trace parameters for trace decoder */
157 t_params = zalloc(sizeof(*t_params) * etm->num_cpu); 230 t_params = zalloc(sizeof(*t_params) * etm->num_cpu);
158 for (i = 0; i < etm->num_cpu; i++) { 231
159 if (etm->metadata[i][CS_ETM_MAGIC] == __perf_cs_etmv3_magic) { 232 if (!t_params)
160 u32 etmidr = etm->metadata[i][CS_ETM_ETMIDR]; 233 return;
161 234
162 t_params[i].protocol = 235 if (cs_etm__init_trace_params(t_params, etm))
163 cs_etm__get_v7_protocol_version(etmidr); 236 goto out_free;
164 t_params[i].etmv3.reg_ctrl =
165 etm->metadata[i][CS_ETM_ETMCR];
166 t_params[i].etmv3.reg_trc_id =
167 etm->metadata[i][CS_ETM_ETMTRACEIDR];
168 } else if (etm->metadata[i][CS_ETM_MAGIC] ==
169 __perf_cs_etmv4_magic) {
170 t_params[i].protocol = CS_ETM_PROTO_ETMV4i;
171 t_params[i].etmv4.reg_idr0 =
172 etm->metadata[i][CS_ETMV4_TRCIDR0];
173 t_params[i].etmv4.reg_idr1 =
174 etm->metadata[i][CS_ETMV4_TRCIDR1];
175 t_params[i].etmv4.reg_idr2 =
176 etm->metadata[i][CS_ETMV4_TRCIDR2];
177 t_params[i].etmv4.reg_idr8 =
178 etm->metadata[i][CS_ETMV4_TRCIDR8];
179 t_params[i].etmv4.reg_configr =
180 etm->metadata[i][CS_ETMV4_TRCCONFIGR];
181 t_params[i].etmv4.reg_traceidr =
182 etm->metadata[i][CS_ETMV4_TRCTRACEIDR];
183 }
184 }
185 237
186 /* Set decoder parameters to simply print the trace packets */ 238 /* Set decoder parameters to simply print the trace packets */
187 d_params.packet_printer = cs_etm__packet_dump; 239 if (cs_etm__init_decoder_params(&d_params, NULL,
188 d_params.operation = CS_ETM_OPERATION_PRINT; 240 CS_ETM_OPERATION_PRINT))
189 d_params.formatted = true; 241 goto out_free;
190 d_params.fsyncs = false;
191 d_params.hsyncs = false;
192 d_params.frame_aligned = true;
193 242
194 decoder = cs_etm_decoder__new(etm->num_cpu, &d_params, t_params); 243 decoder = cs_etm_decoder__new(etm->num_cpu, &d_params, t_params);
195 244
196 zfree(&t_params);
197
198 if (!decoder) 245 if (!decoder)
199 return; 246 goto out_free;
200 do { 247 do {
201 size_t consumed; 248 size_t consumed;
202 249
@@ -211,6 +258,9 @@ static void cs_etm__dump_event(struct cs_etm_auxtrace *etm,
211 } while (buffer_used < buffer->size); 258 } while (buffer_used < buffer->size);
212 259
213 cs_etm_decoder__free(decoder); 260 cs_etm_decoder__free(decoder);
261
262out_free:
263 zfree(&t_params);
214} 264}
215 265
216static int cs_etm__flush_events(struct perf_session *session, 266static int cs_etm__flush_events(struct perf_session *session,
@@ -234,7 +284,7 @@ static int cs_etm__flush_events(struct perf_session *session,
234 if (ret < 0) 284 if (ret < 0)
235 return ret; 285 return ret;
236 286
237 return cs_etm__process_timeless_queues(etm, -1, MAX_TIMESTAMP - 1); 287 return cs_etm__process_timeless_queues(etm, -1);
238} 288}
239 289
240static void cs_etm__free_queue(void *priv) 290static void cs_etm__free_queue(void *priv)
@@ -326,7 +376,7 @@ static u32 cs_etm__mem_access(struct cs_etm_queue *etmq, u64 address,
326 struct addr_location al; 376 struct addr_location al;
327 377
328 if (!etmq) 378 if (!etmq)
329 return -1; 379 return 0;
330 380
331 machine = etmq->etm->machine; 381 machine = etmq->etm->machine;
332 cpumode = cs_etm__cpu_mode(etmq, address); 382 cpumode = cs_etm__cpu_mode(etmq, address);
@@ -334,7 +384,7 @@ static u32 cs_etm__mem_access(struct cs_etm_queue *etmq, u64 address,
334 thread = etmq->thread; 384 thread = etmq->thread;
335 if (!thread) { 385 if (!thread) {
336 if (cpumode != PERF_RECORD_MISC_KERNEL) 386 if (cpumode != PERF_RECORD_MISC_KERNEL)
337 return -EINVAL; 387 return 0;
338 thread = etmq->etm->unknown_thread; 388 thread = etmq->etm->unknown_thread;
339 } 389 }
340 390
@@ -357,12 +407,10 @@ static u32 cs_etm__mem_access(struct cs_etm_queue *etmq, u64 address,
357 return len; 407 return len;
358} 408}
359 409
360static struct cs_etm_queue *cs_etm__alloc_queue(struct cs_etm_auxtrace *etm, 410static struct cs_etm_queue *cs_etm__alloc_queue(struct cs_etm_auxtrace *etm)
361 unsigned int queue_nr)
362{ 411{
363 int i;
364 struct cs_etm_decoder_params d_params; 412 struct cs_etm_decoder_params d_params;
365 struct cs_etm_trace_params *t_params; 413 struct cs_etm_trace_params *t_params = NULL;
366 struct cs_etm_queue *etmq; 414 struct cs_etm_queue *etmq;
367 size_t szp = sizeof(struct cs_etm_packet); 415 size_t szp = sizeof(struct cs_etm_packet);
368 416
@@ -397,59 +445,22 @@ static struct cs_etm_queue *cs_etm__alloc_queue(struct cs_etm_auxtrace *etm,
397 if (!etmq->event_buf) 445 if (!etmq->event_buf)
398 goto out_free; 446 goto out_free;
399 447
400 etmq->etm = etm;
401 etmq->queue_nr = queue_nr;
402 etmq->pid = -1;
403 etmq->tid = -1;
404 etmq->cpu = -1;
405
406 /* Use metadata to fill in trace parameters for trace decoder */ 448 /* Use metadata to fill in trace parameters for trace decoder */
407 t_params = zalloc(sizeof(*t_params) * etm->num_cpu); 449 t_params = zalloc(sizeof(*t_params) * etm->num_cpu);
408 450
409 if (!t_params) 451 if (!t_params)
410 goto out_free; 452 goto out_free;
411 453
412 for (i = 0; i < etm->num_cpu; i++) { 454 if (cs_etm__init_trace_params(t_params, etm))
413 if (etm->metadata[i][CS_ETM_MAGIC] == __perf_cs_etmv3_magic) { 455 goto out_free;
414 u32 etmidr = etm->metadata[i][CS_ETM_ETMIDR];
415
416 t_params[i].protocol =
417 cs_etm__get_v7_protocol_version(etmidr);
418 t_params[i].etmv3.reg_ctrl =
419 etm->metadata[i][CS_ETM_ETMCR];
420 t_params[i].etmv3.reg_trc_id =
421 etm->metadata[i][CS_ETM_ETMTRACEIDR];
422 } else if (etm->metadata[i][CS_ETM_MAGIC] ==
423 __perf_cs_etmv4_magic) {
424 t_params[i].protocol = CS_ETM_PROTO_ETMV4i;
425 t_params[i].etmv4.reg_idr0 =
426 etm->metadata[i][CS_ETMV4_TRCIDR0];
427 t_params[i].etmv4.reg_idr1 =
428 etm->metadata[i][CS_ETMV4_TRCIDR1];
429 t_params[i].etmv4.reg_idr2 =
430 etm->metadata[i][CS_ETMV4_TRCIDR2];
431 t_params[i].etmv4.reg_idr8 =
432 etm->metadata[i][CS_ETMV4_TRCIDR8];
433 t_params[i].etmv4.reg_configr =
434 etm->metadata[i][CS_ETMV4_TRCCONFIGR];
435 t_params[i].etmv4.reg_traceidr =
436 etm->metadata[i][CS_ETMV4_TRCTRACEIDR];
437 }
438 }
439 456
440 /* Set decoder parameters to simply print the trace packets */ 457 /* Set decoder parameters to decode trace packets */
441 d_params.packet_printer = cs_etm__packet_dump; 458 if (cs_etm__init_decoder_params(&d_params, etmq,
442 d_params.operation = CS_ETM_OPERATION_DECODE; 459 CS_ETM_OPERATION_DECODE))
443 d_params.formatted = true; 460 goto out_free;
444 d_params.fsyncs = false;
445 d_params.hsyncs = false;
446 d_params.frame_aligned = true;
447 d_params.data = etmq;
448 461
449 etmq->decoder = cs_etm_decoder__new(etm->num_cpu, &d_params, t_params); 462 etmq->decoder = cs_etm_decoder__new(etm->num_cpu, &d_params, t_params);
450 463
451 zfree(&t_params);
452
453 if (!etmq->decoder) 464 if (!etmq->decoder)
454 goto out_free; 465 goto out_free;
455 466
@@ -462,14 +473,13 @@ static struct cs_etm_queue *cs_etm__alloc_queue(struct cs_etm_auxtrace *etm,
462 cs_etm__mem_access)) 473 cs_etm__mem_access))
463 goto out_free_decoder; 474 goto out_free_decoder;
464 475
465 etmq->offset = 0; 476 zfree(&t_params);
466 etmq->period_instructions = 0;
467
468 return etmq; 477 return etmq;
469 478
470out_free_decoder: 479out_free_decoder:
471 cs_etm_decoder__free(etmq->decoder); 480 cs_etm_decoder__free(etmq->decoder);
472out_free: 481out_free:
482 zfree(&t_params);
473 zfree(&etmq->event_buf); 483 zfree(&etmq->event_buf);
474 zfree(&etmq->last_branch); 484 zfree(&etmq->last_branch);
475 zfree(&etmq->last_branch_rb); 485 zfree(&etmq->last_branch_rb);
@@ -484,24 +494,30 @@ static int cs_etm__setup_queue(struct cs_etm_auxtrace *etm,
484 struct auxtrace_queue *queue, 494 struct auxtrace_queue *queue,
485 unsigned int queue_nr) 495 unsigned int queue_nr)
486{ 496{
497 int ret = 0;
487 struct cs_etm_queue *etmq = queue->priv; 498 struct cs_etm_queue *etmq = queue->priv;
488 499
489 if (list_empty(&queue->head) || etmq) 500 if (list_empty(&queue->head) || etmq)
490 return 0; 501 goto out;
491 502
492 etmq = cs_etm__alloc_queue(etm, queue_nr); 503 etmq = cs_etm__alloc_queue(etm);
493 504
494 if (!etmq) 505 if (!etmq) {
495 return -ENOMEM; 506 ret = -ENOMEM;
507 goto out;
508 }
496 509
497 queue->priv = etmq; 510 queue->priv = etmq;
498 511 etmq->etm = etm;
499 if (queue->cpu != -1) 512 etmq->queue_nr = queue_nr;
500 etmq->cpu = queue->cpu; 513 etmq->cpu = queue->cpu;
501
502 etmq->tid = queue->tid; 514 etmq->tid = queue->tid;
515 etmq->pid = -1;
516 etmq->offset = 0;
517 etmq->period_instructions = 0;
503 518
504 return 0; 519out:
520 return ret;
505} 521}
506 522
507static int cs_etm__setup_queues(struct cs_etm_auxtrace *etm) 523static int cs_etm__setup_queues(struct cs_etm_auxtrace *etm)
@@ -509,6 +525,9 @@ static int cs_etm__setup_queues(struct cs_etm_auxtrace *etm)
509 unsigned int i; 525 unsigned int i;
510 int ret; 526 int ret;
511 527
528 if (!etm->kernel_start)
529 etm->kernel_start = machine__kernel_start(etm->machine);
530
512 for (i = 0; i < etm->queues.nr_queues; i++) { 531 for (i = 0; i < etm->queues.nr_queues; i++) {
513 ret = cs_etm__setup_queue(etm, &etm->queues.queue_array[i], i); 532 ret = cs_etm__setup_queue(etm, &etm->queues.queue_array[i], i);
514 if (ret) 533 if (ret)
@@ -666,7 +685,7 @@ static int cs_etm__inject_event(union perf_event *event,
666 685
667 686
668static int 687static int
669cs_etm__get_trace(struct cs_etm_buffer *buff, struct cs_etm_queue *etmq) 688cs_etm__get_trace(struct cs_etm_queue *etmq)
670{ 689{
671 struct auxtrace_buffer *aux_buffer = etmq->buffer; 690 struct auxtrace_buffer *aux_buffer = etmq->buffer;
672 struct auxtrace_buffer *old_buffer = aux_buffer; 691 struct auxtrace_buffer *old_buffer = aux_buffer;
@@ -680,7 +699,7 @@ cs_etm__get_trace(struct cs_etm_buffer *buff, struct cs_etm_queue *etmq)
680 if (!aux_buffer) { 699 if (!aux_buffer) {
681 if (old_buffer) 700 if (old_buffer)
682 auxtrace_buffer__drop_data(old_buffer); 701 auxtrace_buffer__drop_data(old_buffer);
683 buff->len = 0; 702 etmq->buf_len = 0;
684 return 0; 703 return 0;
685 } 704 }
686 705
@@ -700,13 +719,11 @@ cs_etm__get_trace(struct cs_etm_buffer *buff, struct cs_etm_queue *etmq)
700 if (old_buffer) 719 if (old_buffer)
701 auxtrace_buffer__drop_data(old_buffer); 720 auxtrace_buffer__drop_data(old_buffer);
702 721
703 buff->offset = aux_buffer->offset; 722 etmq->buf_used = 0;
704 buff->len = aux_buffer->size; 723 etmq->buf_len = aux_buffer->size;
705 buff->buf = aux_buffer->data; 724 etmq->buf = aux_buffer->data;
706 725
707 buff->ref_timestamp = aux_buffer->reference; 726 return etmq->buf_len;
708
709 return buff->len;
710} 727}
711 728
712static void cs_etm__set_pid_tid_cpu(struct cs_etm_auxtrace *etm, 729static void cs_etm__set_pid_tid_cpu(struct cs_etm_auxtrace *etm,
@@ -1135,6 +1152,32 @@ static int cs_etm__end_block(struct cs_etm_queue *etmq)
1135 1152
1136 return 0; 1153 return 0;
1137} 1154}
1155/*
1156 * cs_etm__get_data_block: Fetch a block from the auxtrace_buffer queue
1157 * if need be.
1158 * Returns: < 0 if error
1159 * = 0 if no more auxtrace_buffer to read
1160 * > 0 if the current buffer isn't empty yet
1161 */
1162static int cs_etm__get_data_block(struct cs_etm_queue *etmq)
1163{
1164 int ret;
1165
1166 if (!etmq->buf_len) {
1167 ret = cs_etm__get_trace(etmq);
1168 if (ret <= 0)
1169 return ret;
1170 /*
1171 * We cannot assume consecutive blocks in the data file
1172 * are contiguous, reset the decoder to force re-sync.
1173 */
1174 ret = cs_etm_decoder__reset(etmq->decoder);
1175 if (ret)
1176 return ret;
1177 }
1178
1179 return etmq->buf_len;
1180}
1138 1181
1139static bool cs_etm__is_svc_instr(struct cs_etm_queue *etmq, 1182static bool cs_etm__is_svc_instr(struct cs_etm_queue *etmq,
1140 struct cs_etm_packet *packet, 1183 struct cs_etm_packet *packet,
@@ -1474,105 +1517,124 @@ static int cs_etm__set_sample_flags(struct cs_etm_queue *etmq)
1474 return 0; 1517 return 0;
1475} 1518}
1476 1519
1520static int cs_etm__decode_data_block(struct cs_etm_queue *etmq)
1521{
1522 int ret = 0;
1523 size_t processed = 0;
1524
1525 /*
1526 * Packets are decoded and added to the decoder's packet queue
1527 * until the decoder packet processing callback has requested that
1528 * processing stops or there is nothing left in the buffer. Normal
1529 * operations that stop processing are a timestamp packet or a full
1530 * decoder buffer queue.
1531 */
1532 ret = cs_etm_decoder__process_data_block(etmq->decoder,
1533 etmq->offset,
1534 &etmq->buf[etmq->buf_used],
1535 etmq->buf_len,
1536 &processed);
1537 if (ret)
1538 goto out;
1539
1540 etmq->offset += processed;
1541 etmq->buf_used += processed;
1542 etmq->buf_len -= processed;
1543
1544out:
1545 return ret;
1546}
1547
1548static int cs_etm__process_decoder_queue(struct cs_etm_queue *etmq)
1549{
1550 int ret;
1551
1552 /* Process each packet in this chunk */
1553 while (1) {
1554 ret = cs_etm_decoder__get_packet(etmq->decoder,
1555 etmq->packet);
1556 if (ret <= 0)
1557 /*
1558 * Stop processing this chunk on
1559 * end of data or error
1560 */
1561 break;
1562
1563 /*
1564 * Since packet addresses are swapped in packet
1565 * handling within below switch() statements,
1566 * thus setting sample flags must be called
1567 * prior to switch() statement to use address
1568 * information before packets swapping.
1569 */
1570 ret = cs_etm__set_sample_flags(etmq);
1571 if (ret < 0)
1572 break;
1573
1574 switch (etmq->packet->sample_type) {
1575 case CS_ETM_RANGE:
1576 /*
1577 * If the packet contains an instruction
1578 * range, generate instruction sequence
1579 * events.
1580 */
1581 cs_etm__sample(etmq);
1582 break;
1583 case CS_ETM_EXCEPTION:
1584 case CS_ETM_EXCEPTION_RET:
1585 /*
1586 * If the exception packet is coming,
1587 * make sure the previous instruction
1588 * range packet to be handled properly.
1589 */
1590 cs_etm__exception(etmq);
1591 break;
1592 case CS_ETM_DISCONTINUITY:
1593 /*
1594 * Discontinuity in trace, flush
1595 * previous branch stack
1596 */
1597 cs_etm__flush(etmq);
1598 break;
1599 case CS_ETM_EMPTY:
1600 /*
1601 * Should not receive empty packet,
1602 * report error.
1603 */
1604 pr_err("CS ETM Trace: empty packet\n");
1605 return -EINVAL;
1606 default:
1607 break;
1608 }
1609 }
1610
1611 return ret;
1612}
1613
1477static int cs_etm__run_decoder(struct cs_etm_queue *etmq) 1614static int cs_etm__run_decoder(struct cs_etm_queue *etmq)
1478{ 1615{
1479 struct cs_etm_auxtrace *etm = etmq->etm;
1480 struct cs_etm_buffer buffer;
1481 size_t buffer_used, processed;
1482 int err = 0; 1616 int err = 0;
1483 1617
1484 if (!etm->kernel_start)
1485 etm->kernel_start = machine__kernel_start(etm->machine);
1486
1487 /* Go through each buffer in the queue and decode them one by one */ 1618 /* Go through each buffer in the queue and decode them one by one */
1488 while (1) { 1619 while (1) {
1489 buffer_used = 0; 1620 err = cs_etm__get_data_block(etmq);
1490 memset(&buffer, 0, sizeof(buffer));
1491 err = cs_etm__get_trace(&buffer, etmq);
1492 if (err <= 0) 1621 if (err <= 0)
1493 return err; 1622 return err;
1494 /*
1495 * We cannot assume consecutive blocks in the data file are
1496 * contiguous, reset the decoder to force re-sync.
1497 */
1498 err = cs_etm_decoder__reset(etmq->decoder);
1499 if (err != 0)
1500 return err;
1501 1623
1502 /* Run trace decoder until buffer consumed or end of trace */ 1624 /* Run trace decoder until buffer consumed or end of trace */
1503 do { 1625 do {
1504 processed = 0; 1626 err = cs_etm__decode_data_block(etmq);
1505 err = cs_etm_decoder__process_data_block(
1506 etmq->decoder,
1507 etmq->offset,
1508 &buffer.buf[buffer_used],
1509 buffer.len - buffer_used,
1510 &processed);
1511 if (err) 1627 if (err)
1512 return err; 1628 return err;
1513 1629
1514 etmq->offset += processed; 1630 /*
1515 buffer_used += processed; 1631 * Process each packet in this chunk, nothing to do if
1632 * an error occurs other than hoping the next one will
1633 * be better.
1634 */
1635 err = cs_etm__process_decoder_queue(etmq);
1516 1636
1517 /* Process each packet in this chunk */ 1637 } while (etmq->buf_len);
1518 while (1) {
1519 err = cs_etm_decoder__get_packet(etmq->decoder,
1520 etmq->packet);
1521 if (err <= 0)
1522 /*
1523 * Stop processing this chunk on
1524 * end of data or error
1525 */
1526 break;
1527
1528 /*
1529 * Since packet addresses are swapped in packet
1530 * handling within below switch() statements,
1531 * thus setting sample flags must be called
1532 * prior to switch() statement to use address
1533 * information before packets swapping.
1534 */
1535 err = cs_etm__set_sample_flags(etmq);
1536 if (err < 0)
1537 break;
1538
1539 switch (etmq->packet->sample_type) {
1540 case CS_ETM_RANGE:
1541 /*
1542 * If the packet contains an instruction
1543 * range, generate instruction sequence
1544 * events.
1545 */
1546 cs_etm__sample(etmq);
1547 break;
1548 case CS_ETM_EXCEPTION:
1549 case CS_ETM_EXCEPTION_RET:
1550 /*
1551 * If the exception packet is coming,
1552 * make sure the previous instruction
1553 * range packet to be handled properly.
1554 */
1555 cs_etm__exception(etmq);
1556 break;
1557 case CS_ETM_DISCONTINUITY:
1558 /*
1559 * Discontinuity in trace, flush
1560 * previous branch stack
1561 */
1562 cs_etm__flush(etmq);
1563 break;
1564 case CS_ETM_EMPTY:
1565 /*
1566 * Should not receive empty packet,
1567 * report error.
1568 */
1569 pr_err("CS ETM Trace: empty packet\n");
1570 return -EINVAL;
1571 default:
1572 break;
1573 }
1574 }
1575 } while (buffer.len > buffer_used);
1576 1638
1577 if (err == 0) 1639 if (err == 0)
1578 /* Flush any remaining branch stack entries */ 1640 /* Flush any remaining branch stack entries */
@@ -1583,7 +1645,7 @@ static int cs_etm__run_decoder(struct cs_etm_queue *etmq)
1583} 1645}
1584 1646
1585static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm, 1647static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm,
1586 pid_t tid, u64 time_) 1648 pid_t tid)
1587{ 1649{
1588 unsigned int i; 1650 unsigned int i;
1589 struct auxtrace_queues *queues = &etm->queues; 1651 struct auxtrace_queues *queues = &etm->queues;
@@ -1593,7 +1655,6 @@ static int cs_etm__process_timeless_queues(struct cs_etm_auxtrace *etm,
1593 struct cs_etm_queue *etmq = queue->priv; 1655 struct cs_etm_queue *etmq = queue->priv;
1594 1656
1595 if (etmq && ((tid == -1) || (etmq->tid == tid))) { 1657 if (etmq && ((tid == -1) || (etmq->tid == tid))) {
1596 etmq->time = time_;
1597 cs_etm__set_pid_tid_cpu(etm, queue); 1658 cs_etm__set_pid_tid_cpu(etm, queue);
1598 cs_etm__run_decoder(etmq); 1659 cs_etm__run_decoder(etmq);
1599 } 1660 }
@@ -1637,8 +1698,7 @@ static int cs_etm__process_event(struct perf_session *session,
1637 1698
1638 if (event->header.type == PERF_RECORD_EXIT) 1699 if (event->header.type == PERF_RECORD_EXIT)
1639 return cs_etm__process_timeless_queues(etm, 1700 return cs_etm__process_timeless_queues(etm,
1640 event->fork.tid, 1701 event->fork.tid);
1641 sample->time);
1642 1702
1643 return 0; 1703 return 0;
1644} 1704}
diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h
index d76126e0e3d0..0e97c196147a 100644
--- a/tools/perf/util/cs-etm.h
+++ b/tools/perf/util/cs-etm.h
@@ -105,8 +105,8 @@ struct intlist *traceid_list;
105 105
106#define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_0_MAX * sizeof(u64)) 106#define CS_ETM_HEADER_SIZE (CS_HEADER_VERSION_0_MAX * sizeof(u64))
107 107
108static const u64 __perf_cs_etmv3_magic = 0x3030303030303030ULL; 108#define __perf_cs_etmv3_magic 0x3030303030303030ULL
109static const u64 __perf_cs_etmv4_magic = 0x4040404040404040ULL; 109#define __perf_cs_etmv4_magic 0x4040404040404040ULL
110#define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64)) 110#define CS_ETMV3_PRIV_SIZE (CS_ETM_PRIV_MAX * sizeof(u64))
111#define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64)) 111#define CS_ETMV4_PRIV_SIZE (CS_ETMV4_PRIV_MAX * sizeof(u64))
112 112
diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
index dec6d218c31c..61ce197c5362 100644
--- a/tools/perf/util/header.c
+++ b/tools/perf/util/header.c
@@ -563,7 +563,6 @@ static int write_cmdline(struct feat_fd *ff,
563 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list" 563 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list"
564 564
565struct cpu_topo { 565struct cpu_topo {
566 u32 cpu_nr;
567 u32 core_sib; 566 u32 core_sib;
568 u32 thread_sib; 567 u32 thread_sib;
569 char **core_siblings; 568 char **core_siblings;
@@ -679,7 +678,6 @@ static struct cpu_topo *build_cpu_topology(void)
679 goto out_free; 678 goto out_free;
680 679
681 tp = addr; 680 tp = addr;
682 tp->cpu_nr = nr;
683 addr += sizeof(*tp); 681 addr += sizeof(*tp);
684 tp->core_siblings = addr; 682 tp->core_siblings = addr;
685 addr += sz; 683 addr += sz;
@@ -1042,11 +1040,9 @@ static int write_cpuid(struct feat_fd *ff,
1042 int ret; 1040 int ret;
1043 1041
1044 ret = get_cpuid(buffer, sizeof(buffer)); 1042 ret = get_cpuid(buffer, sizeof(buffer));
1045 if (!ret) 1043 if (ret)
1046 goto write_it; 1044 return -1;
1047 1045
1048 return -1;
1049write_it:
1050 return do_write_string(ff, buffer); 1046 return do_write_string(ff, buffer);
1051} 1047}
1052 1048
diff --git a/tools/perf/util/intel-pt-decoder/Build b/tools/perf/util/intel-pt-decoder/Build
index 1b704fbea9de..23bf788f84b9 100644
--- a/tools/perf/util/intel-pt-decoder/Build
+++ b/tools/perf/util/intel-pt-decoder/Build
@@ -1,4 +1,4 @@
1libperf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o intel-pt-log.o intel-pt-decoder.o 1perf-$(CONFIG_AUXTRACE) += intel-pt-pkt-decoder.o intel-pt-insn-decoder.o intel-pt-log.o intel-pt-decoder.o
2 2
3inat_tables_script = util/intel-pt-decoder/gen-insn-attr-x86.awk 3inat_tables_script = util/intel-pt-decoder/gen-insn-attr-x86.awk
4inat_tables_maps = util/intel-pt-decoder/x86-opcode-map.txt 4inat_tables_maps = util/intel-pt-decoder/x86-opcode-map.txt
diff --git a/tools/perf/util/metricgroup.c b/tools/perf/util/metricgroup.c
index 8529cbd3955b..b8d864ed4afe 100644
--- a/tools/perf/util/metricgroup.c
+++ b/tools/perf/util/metricgroup.c
@@ -270,7 +270,7 @@ static void metricgroup__print_strlist(struct strlist *metrics, bool raw)
270} 270}
271 271
272void metricgroup__print(bool metrics, bool metricgroups, char *filter, 272void metricgroup__print(bool metrics, bool metricgroups, char *filter,
273 bool raw) 273 bool raw, bool details)
274{ 274{
275 struct pmu_events_map *map = perf_pmu__find_map(NULL); 275 struct pmu_events_map *map = perf_pmu__find_map(NULL);
276 struct pmu_event *pe; 276 struct pmu_event *pe;
@@ -329,6 +329,12 @@ void metricgroup__print(bool metrics, bool metricgroups, char *filter,
329 if (asprintf(&s, "%s\n%*s%s]", 329 if (asprintf(&s, "%s\n%*s%s]",
330 pe->metric_name, 8, "[", pe->desc) < 0) 330 pe->metric_name, 8, "[", pe->desc) < 0)
331 return; 331 return;
332
333 if (details) {
334 if (asprintf(&s, "%s\n%*s%s]",
335 s, 8, "[", pe->metric_expr) < 0)
336 return;
337 }
332 } 338 }
333 339
334 if (!s) 340 if (!s)
diff --git a/tools/perf/util/metricgroup.h b/tools/perf/util/metricgroup.h
index 8a155dba0581..5c52097a5c63 100644
--- a/tools/perf/util/metricgroup.h
+++ b/tools/perf/util/metricgroup.h
@@ -27,6 +27,7 @@ int metricgroup__parse_groups(const struct option *opt,
27 const char *str, 27 const char *str,
28 struct rblist *metric_events); 28 struct rblist *metric_events);
29 29
30void metricgroup__print(bool metrics, bool groups, char *filter, bool raw); 30void metricgroup__print(bool metrics, bool groups, char *filter,
31 bool raw, bool details);
31bool metricgroup__has_metric(const char *metric); 32bool metricgroup__has_metric(const char *metric);
32#endif 33#endif
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 920e1e6551dd..4dcc01b2532c 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -2540,7 +2540,7 @@ void print_events(const char *event_glob, bool name_only, bool quiet_flag,
2540 2540
2541 print_sdt_events(NULL, NULL, name_only); 2541 print_sdt_events(NULL, NULL, name_only);
2542 2542
2543 metricgroup__print(true, true, NULL, name_only); 2543 metricgroup__print(true, true, NULL, name_only, details_flag);
2544} 2544}
2545 2545
2546int parse_events__is_hardcoded_term(struct parse_events_term *term) 2546int parse_events__is_hardcoded_term(struct parse_events_term *term)
diff --git a/tools/perf/util/parse-events.y b/tools/perf/util/parse-events.y
index da8fe57691b8..44819bdb037d 100644
--- a/tools/perf/util/parse-events.y
+++ b/tools/perf/util/parse-events.y
@@ -311,7 +311,7 @@ value_sym '/' event_config '/'
311 $$ = list; 311 $$ = list;
312} 312}
313| 313|
314value_sym sep_slash_dc 314value_sym sep_slash_slash_dc
315{ 315{
316 struct list_head *list; 316 struct list_head *list;
317 int type = $1 >> 16; 317 int type = $1 >> 16;
@@ -702,7 +702,7 @@ PE_VALUE PE_ARRAY_RANGE PE_VALUE
702 702
703sep_dc: ':' | 703sep_dc: ':' |
704 704
705sep_slash_dc: '/' | ':' | 705sep_slash_slash_dc: '/' '/' | ':' |
706 706
707%% 707%%
708 708
diff --git a/tools/perf/util/s390-cpumsf.c b/tools/perf/util/s390-cpumsf.c
index d9525d220db1..c215704931dc 100644
--- a/tools/perf/util/s390-cpumsf.c
+++ b/tools/perf/util/s390-cpumsf.c
@@ -352,6 +352,11 @@ static bool s390_cpumsf_validate(int machine_type,
352 *dsdes = 85; 352 *dsdes = 85;
353 *bsdes = 32; 353 *bsdes = 32;
354 break; 354 break;
355 case 2964:
356 case 2965:
357 *dsdes = 112;
358 *bsdes = 32;
359 break;
355 default: 360 default:
356 /* Illegal trailer entry */ 361 /* Illegal trailer entry */
357 return false; 362 return false;
diff --git a/tools/perf/util/scripting-engines/Build b/tools/perf/util/scripting-engines/Build
index 82d28c67e0f3..7b342ce38d99 100644
--- a/tools/perf/util/scripting-engines/Build
+++ b/tools/perf/util/scripting-engines/Build
@@ -1,5 +1,5 @@
1libperf-$(CONFIG_LIBPERL) += trace-event-perl.o 1perf-$(CONFIG_LIBPERL) += trace-event-perl.o
2libperf-$(CONFIG_LIBPYTHON) += trace-event-python.o 2perf-$(CONFIG_LIBPYTHON) += trace-event-python.o
3 3
4CFLAGS_trace-event-perl.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow -Wno-nested-externs -Wno-undef -Wno-switch-default 4CFLAGS_trace-event-perl.o += $(PERL_EMBED_CCOPTS) -Wno-redundant-decls -Wno-strict-prototypes -Wno-unused-parameter -Wno-shadow -Wno-nested-externs -Wno-undef -Wno-switch-default
5 5
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-06 04:40:50 -0500