diff options
Diffstat (limited to 'tools/perf/Documentation/perf-list.txt')
| -rw-r--r-- | tools/perf/Documentation/perf-list.txt | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/tools/perf/Documentation/perf-list.txt b/tools/perf/Documentation/perf-list.txt index 79483f40e991..ec723d0a5bb3 100644 --- a/tools/perf/Documentation/perf-list.txt +++ b/tools/perf/Documentation/perf-list.txt | |||
| @@ -40,10 +40,12 @@ address should be. The 'p' modifier can be specified multiple times: | |||
| 40 | 0 - SAMPLE_IP can have arbitrary skid | 40 | 0 - SAMPLE_IP can have arbitrary skid |
| 41 | 1 - SAMPLE_IP must have constant skid | 41 | 1 - SAMPLE_IP must have constant skid |
| 42 | 2 - SAMPLE_IP requested to have 0 skid | 42 | 2 - SAMPLE_IP requested to have 0 skid |
| 43 | 3 - SAMPLE_IP must have 0 skid | 43 | 3 - SAMPLE_IP must have 0 skid, or uses randomization to avoid |
| 44 | sample shadowing effects. | ||
| 44 | 45 | ||
| 45 | For Intel systems precise event sampling is implemented with PEBS | 46 | For Intel systems precise event sampling is implemented with PEBS |
| 46 | which supports up to precise-level 2. | 47 | which supports up to precise-level 2, and precise level 3 for |
| 48 | some special cases | ||
| 47 | 49 | ||
| 48 | On AMD systems it is implemented using IBS (up to precise-level 2). | 50 | On AMD systems it is implemented using IBS (up to precise-level 2). |
| 49 | The precise modifier works with event types 0x76 (cpu-cycles, CPU | 51 | The precise modifier works with event types 0x76 (cpu-cycles, CPU |