aboutsummaryrefslogtreecommitdiffstats
path: root/sound/soc/fsl/fsl_sai.h
diff options
context:
space:
mode:
Diffstat (limited to 'sound/soc/fsl/fsl_sai.h')
-rw-r--r--sound/soc/fsl/fsl_sai.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index a264185c7138..0e6c9f595d75 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -35,6 +35,16 @@
35#define FSL_SAI_RFR 0xc0 /* SAI Receive FIFO */ 35#define FSL_SAI_RFR 0xc0 /* SAI Receive FIFO */
36#define FSL_SAI_RMR 0xe0 /* SAI Receive Mask */ 36#define FSL_SAI_RMR 0xe0 /* SAI Receive Mask */
37 37
38#define FSL_SAI_xCSR(tx) (tx ? FSL_SAI_TCSR : FSL_SAI_RCSR)
39#define FSL_SAI_xCR1(tx) (tx ? FSL_SAI_TCR1 : FSL_SAI_RCR1)
40#define FSL_SAI_xCR2(tx) (tx ? FSL_SAI_TCR2 : FSL_SAI_RCR2)
41#define FSL_SAI_xCR3(tx) (tx ? FSL_SAI_TCR3 : FSL_SAI_RCR3)
42#define FSL_SAI_xCR4(tx) (tx ? FSL_SAI_TCR4 : FSL_SAI_RCR4)
43#define FSL_SAI_xCR5(tx) (tx ? FSL_SAI_TCR5 : FSL_SAI_RCR5)
44#define FSL_SAI_xDR(tx) (tx ? FSL_SAI_TDR : FSL_SAI_RDR)
45#define FSL_SAI_xFR(tx) (tx ? FSL_SAI_TFR : FSL_SAI_RFR)
46#define FSL_SAI_xMR(tx) (tx ? FSL_SAI_TMR : FSL_SAI_RMR)
47
38/* SAI Transmit/Recieve Control Register */ 48/* SAI Transmit/Recieve Control Register */
39#define FSL_SAI_CSR_TERE BIT(31) 49#define FSL_SAI_CSR_TERE BIT(31)
40#define FSL_SAI_CSR_FR BIT(25) 50#define FSL_SAI_CSR_FR BIT(25)
@@ -48,6 +58,7 @@
48#define FSL_SAI_CSR_FWF BIT(17) 58#define FSL_SAI_CSR_FWF BIT(17)
49#define FSL_SAI_CSR_FRF BIT(16) 59#define FSL_SAI_CSR_FRF BIT(16)
50#define FSL_SAI_CSR_xIE_SHIFT 8 60#define FSL_SAI_CSR_xIE_SHIFT 8
61#define FSL_SAI_CSR_xIE_MASK (0x1f << FSL_SAI_CSR_xIE_SHIFT)
51#define FSL_SAI_CSR_WSIE BIT(12) 62#define FSL_SAI_CSR_WSIE BIT(12)
52#define FSL_SAI_CSR_SEIE BIT(11) 63#define FSL_SAI_CSR_SEIE BIT(11)
53#define FSL_SAI_CSR_FEIE BIT(10) 64#define FSL_SAI_CSR_FEIE BIT(10)
@@ -108,6 +119,8 @@
108#define FSL_SAI_CLK_MAST2 2 119#define FSL_SAI_CLK_MAST2 2
109#define FSL_SAI_CLK_MAST3 3 120#define FSL_SAI_CLK_MAST3 3
110 121
122#define FSL_SAI_MCLK_MAX 3
123
111/* SAI data transfer numbers per DMA request */ 124/* SAI data transfer numbers per DMA request */
112#define FSL_SAI_MAXBURST_TX 6 125#define FSL_SAI_MAXBURST_TX 6
113#define FSL_SAI_MAXBURST_RX 6 126#define FSL_SAI_MAXBURST_RX 6
@@ -115,10 +128,13 @@
115struct fsl_sai { 128struct fsl_sai {
116 struct platform_device *pdev; 129 struct platform_device *pdev;
117 struct regmap *regmap; 130 struct regmap *regmap;
131 struct clk *bus_clk;
132 struct clk *mclk_clk[FSL_SAI_MCLK_MAX];
118 133
119 bool big_endian_regs; 134 bool big_endian_regs;
120 bool big_endian_data; 135 bool big_endian_data;
121 bool is_dsp_mode; 136 bool is_dsp_mode;
137 bool sai_on_imx;
122 138
123 struct snd_dmaengine_dai_dma_data dma_params_rx; 139 struct snd_dmaengine_dai_dma_data dma_params_rx;
124 struct snd_dmaengine_dai_dma_data dma_params_tx; 140 struct snd_dmaengine_dai_dma_data dma_params_tx;