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-rw-r--r--sound/soc/davinci/davinci-mcasp.c236
1 files changed, 216 insertions, 20 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 0c882995a357..bb4b78eada58 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -27,6 +27,7 @@
27#include <linux/of_platform.h> 27#include <linux/of_platform.h>
28#include <linux/of_device.h> 28#include <linux/of_device.h>
29#include <linux/platform_data/davinci_asp.h> 29#include <linux/platform_data/davinci_asp.h>
30#include <linux/math64.h>
30 31
31#include <sound/asoundef.h> 32#include <sound/asoundef.h>
32#include <sound/core.h> 33#include <sound/core.h>
@@ -62,6 +63,12 @@ struct davinci_mcasp_context {
62 u32 config_regs[ARRAY_SIZE(context_regs)]; 63 u32 config_regs[ARRAY_SIZE(context_regs)];
63 u32 afifo_regs[2]; /* for read/write fifo control registers */ 64 u32 afifo_regs[2]; /* for read/write fifo control registers */
64 u32 *xrsr_regs; /* for serializer configuration */ 65 u32 *xrsr_regs; /* for serializer configuration */
66 bool pm_state;
67};
68
69struct davinci_mcasp_ruledata {
70 struct davinci_mcasp *mcasp;
71 int serializers;
65}; 72};
66 73
67struct davinci_mcasp { 74struct davinci_mcasp {
@@ -98,6 +105,8 @@ struct davinci_mcasp {
98#ifdef CONFIG_PM_SLEEP 105#ifdef CONFIG_PM_SLEEP
99 struct davinci_mcasp_context context; 106 struct davinci_mcasp_context context;
100#endif 107#endif
108
109 struct davinci_mcasp_ruledata ruledata[2];
101}; 110};
102 111
103static inline void mcasp_set_bits(struct davinci_mcasp *mcasp, u32 offset, 112static inline void mcasp_set_bits(struct davinci_mcasp *mcasp, u32 offset,
@@ -519,7 +528,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
519 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); 528 mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
520 } 529 }
521out: 530out:
522 pm_runtime_put_sync(mcasp->dev); 531 pm_runtime_put(mcasp->dev);
523 return ret; 532 return ret;
524} 533}
525 534
@@ -528,6 +537,7 @@ static int __davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id,
528{ 537{
529 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); 538 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
530 539
540 pm_runtime_get_sync(mcasp->dev);
531 switch (div_id) { 541 switch (div_id) {
532 case 0: /* MCLK divider */ 542 case 0: /* MCLK divider */
533 mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, 543 mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,
@@ -553,6 +563,7 @@ static int __davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id,
553 return -EINVAL; 563 return -EINVAL;
554 } 564 }
555 565
566 pm_runtime_put(mcasp->dev);
556 return 0; 567 return 0;
557} 568}
558 569
@@ -567,6 +578,7 @@ static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id,
567{ 578{
568 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai); 579 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
569 580
581 pm_runtime_get_sync(mcasp->dev);
570 if (dir == SND_SOC_CLOCK_OUT) { 582 if (dir == SND_SOC_CLOCK_OUT) {
571 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE); 583 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG, AHCLKXE);
572 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE); 584 mcasp_set_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG, AHCLKRE);
@@ -579,6 +591,7 @@ static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id,
579 591
580 mcasp->sysclk_freq = freq; 592 mcasp->sysclk_freq = freq;
581 593
594 pm_runtime_put(mcasp->dev);
582 return 0; 595 return 0;
583} 596}
584 597
@@ -863,6 +876,30 @@ static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp,
863 return 0; 876 return 0;
864} 877}
865 878
879static int davinci_mcasp_calc_clk_div(struct davinci_mcasp *mcasp,
880 unsigned int bclk_freq,
881 int *error_ppm)
882{
883 int div = mcasp->sysclk_freq / bclk_freq;
884 int rem = mcasp->sysclk_freq % bclk_freq;
885
886 if (rem != 0) {
887 if (div == 0 ||
888 ((mcasp->sysclk_freq / div) - bclk_freq) >
889 (bclk_freq - (mcasp->sysclk_freq / (div+1)))) {
890 div++;
891 rem = rem - bclk_freq;
892 }
893 }
894 if (error_ppm)
895 *error_ppm =
896 (div*1000000 + (int)div64_long(1000000LL*rem,
897 (int)bclk_freq))
898 /div - 1000000;
899
900 return div;
901}
902
866static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, 903static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
867 struct snd_pcm_hw_params *params, 904 struct snd_pcm_hw_params *params,
868 struct snd_soc_dai *cpu_dai) 905 struct snd_soc_dai *cpu_dai)
@@ -878,16 +915,20 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
878 * the machine driver, we need to calculate the ratio. 915 * the machine driver, we need to calculate the ratio.
879 */ 916 */
880 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) { 917 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) {
881 unsigned int bclk_freq = snd_soc_params_to_bclk(params); 918 int channels = params_channels(params);
882 unsigned int div = mcasp->sysclk_freq / bclk_freq; 919 int rate = params_rate(params);
883 if (mcasp->sysclk_freq % bclk_freq != 0) { 920 int sbits = params_width(params);
884 if (((mcasp->sysclk_freq / div) - bclk_freq) > 921 int ppm, div;
885 (bclk_freq - (mcasp->sysclk_freq / (div+1)))) 922
886 div++; 923 if (channels > mcasp->tdm_slots)
887 dev_warn(mcasp->dev, 924 channels = mcasp->tdm_slots;
888 "Inaccurate BCLK: %u Hz / %u != %u Hz\n", 925
889 mcasp->sysclk_freq, div, bclk_freq); 926 div = davinci_mcasp_calc_clk_div(mcasp, rate*sbits*channels,
890 } 927 &ppm);
928 if (ppm)
929 dev_info(mcasp->dev, "Sample-rate is off by %d PPM\n",
930 ppm);
931
891 __davinci_mcasp_set_clkdiv(cpu_dai, 1, div, 0); 932 __davinci_mcasp_set_clkdiv(cpu_dai, 1, div, 0);
892 } 933 }
893 934
@@ -969,10 +1010,126 @@ static int davinci_mcasp_trigger(struct snd_pcm_substream *substream,
969 return ret; 1010 return ret;
970} 1011}
971 1012
1013static const unsigned int davinci_mcasp_dai_rates[] = {
1014 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000,
1015 88200, 96000, 176400, 192000,
1016};
1017
1018#define DAVINCI_MAX_RATE_ERROR_PPM 1000
1019
1020static int davinci_mcasp_hw_rule_rate(struct snd_pcm_hw_params *params,
1021 struct snd_pcm_hw_rule *rule)
1022{
1023 struct davinci_mcasp_ruledata *rd = rule->private;
1024 struct snd_interval *ri =
1025 hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
1026 int sbits = params_width(params);
1027 int channels = params_channels(params);
1028 unsigned int list[ARRAY_SIZE(davinci_mcasp_dai_rates)];
1029 int i, count = 0;
1030
1031 if (channels > rd->mcasp->tdm_slots)
1032 channels = rd->mcasp->tdm_slots;
1033
1034 for (i = 0; i < ARRAY_SIZE(davinci_mcasp_dai_rates); i++) {
1035 if (ri->min <= davinci_mcasp_dai_rates[i] &&
1036 ri->max >= davinci_mcasp_dai_rates[i]) {
1037 uint bclk_freq = sbits*channels*
1038 davinci_mcasp_dai_rates[i];
1039 int ppm;
1040
1041 davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm);
1042 if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM)
1043 list[count++] = davinci_mcasp_dai_rates[i];
1044 }
1045 }
1046 dev_dbg(rd->mcasp->dev,
1047 "%d frequencies (%d-%d) for %d sbits and %d channels\n",
1048 count, ri->min, ri->max, sbits, channels);
1049
1050 return snd_interval_list(hw_param_interval(params, rule->var),
1051 count, list, 0);
1052}
1053
1054static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params,
1055 struct snd_pcm_hw_rule *rule)
1056{
1057 struct davinci_mcasp_ruledata *rd = rule->private;
1058 struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
1059 struct snd_mask nfmt;
1060 int rate = params_rate(params);
1061 int channels = params_channels(params);
1062 int i, count = 0;
1063
1064 snd_mask_none(&nfmt);
1065
1066 if (channels > rd->mcasp->tdm_slots)
1067 channels = rd->mcasp->tdm_slots;
1068
1069 for (i = 0; i < SNDRV_PCM_FORMAT_LAST; i++) {
1070 if (snd_mask_test(fmt, i)) {
1071 uint bclk_freq = snd_pcm_format_width(i)*channels*rate;
1072 int ppm;
1073
1074 davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm);
1075 if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
1076 snd_mask_set(&nfmt, i);
1077 count++;
1078 }
1079 }
1080 }
1081 dev_dbg(rd->mcasp->dev,
1082 "%d possible sample format for %d Hz and %d channels\n",
1083 count, rate, channels);
1084
1085 return snd_mask_refine(fmt, &nfmt);
1086}
1087
1088static int davinci_mcasp_hw_rule_channels(struct snd_pcm_hw_params *params,
1089 struct snd_pcm_hw_rule *rule)
1090{
1091 struct davinci_mcasp_ruledata *rd = rule->private;
1092 struct snd_interval *ci =
1093 hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
1094 int sbits = params_width(params);
1095 int rate = params_rate(params);
1096 int max_chan_per_wire = rd->mcasp->tdm_slots < ci->max ?
1097 rd->mcasp->tdm_slots : ci->max;
1098 unsigned int list[ci->max - ci->min + 1];
1099 int c1, c, count = 0;
1100
1101 for (c1 = ci->min; c1 <= max_chan_per_wire; c1++) {
1102 uint bclk_freq = c1*sbits*rate;
1103 int ppm;
1104
1105 davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm);
1106 if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
1107 /* If we can use all tdm_slots, we can put any
1108 amount of channels to remaining wires as
1109 long as they fit in. */
1110 if (c1 == rd->mcasp->tdm_slots) {
1111 for (c = c1; c <= rd->serializers*c1 &&
1112 c <= ci->max; c++)
1113 list[count++] = c;
1114 } else {
1115 list[count++] = c1;
1116 }
1117 }
1118 }
1119 dev_dbg(rd->mcasp->dev,
1120 "%d possible channel counts (%d-%d) for %d Hz and %d sbits\n",
1121 count, ci->min, ci->max, rate, sbits);
1122
1123 return snd_interval_list(hw_param_interval(params, rule->var),
1124 count, list, 0);
1125}
1126
972static int davinci_mcasp_startup(struct snd_pcm_substream *substream, 1127static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
973 struct snd_soc_dai *cpu_dai) 1128 struct snd_soc_dai *cpu_dai)
974{ 1129{
975 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai); 1130 struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(cpu_dai);
1131 struct davinci_mcasp_ruledata *ruledata =
1132 &mcasp->ruledata[substream->stream];
976 u32 max_channels = 0; 1133 u32 max_channels = 0;
977 int i, dir; 1134 int i, dir;
978 1135
@@ -994,6 +1151,7 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
994 if (mcasp->serial_dir[i] == dir) 1151 if (mcasp->serial_dir[i] == dir)
995 max_channels++; 1152 max_channels++;
996 } 1153 }
1154 ruledata->serializers = max_channels;
997 max_channels *= mcasp->tdm_slots; 1155 max_channels *= mcasp->tdm_slots;
998 /* 1156 /*
999 * If the already active stream has less channels than the calculated 1157 * If the already active stream has less channels than the calculated
@@ -1008,6 +1166,42 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
1008 snd_pcm_hw_constraint_minmax(substream->runtime, 1166 snd_pcm_hw_constraint_minmax(substream->runtime,
1009 SNDRV_PCM_HW_PARAM_CHANNELS, 1167 SNDRV_PCM_HW_PARAM_CHANNELS,
1010 2, max_channels); 1168 2, max_channels);
1169
1170 /*
1171 * If we rely on implicit BCLK divider setting we should
1172 * set constraints based on what we can provide.
1173 */
1174 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) {
1175 int ret;
1176
1177 ruledata->mcasp = mcasp;
1178
1179 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
1180 SNDRV_PCM_HW_PARAM_RATE,
1181 davinci_mcasp_hw_rule_rate,
1182 ruledata,
1183 SNDRV_PCM_HW_PARAM_FORMAT,
1184 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
1185 if (ret)
1186 return ret;
1187 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
1188 SNDRV_PCM_HW_PARAM_FORMAT,
1189 davinci_mcasp_hw_rule_format,
1190 ruledata,
1191 SNDRV_PCM_HW_PARAM_RATE,
1192 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
1193 if (ret)
1194 return ret;
1195 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
1196 SNDRV_PCM_HW_PARAM_CHANNELS,
1197 davinci_mcasp_hw_rule_channels,
1198 ruledata,
1199 SNDRV_PCM_HW_PARAM_RATE,
1200 SNDRV_PCM_HW_PARAM_FORMAT, -1);
1201 if (ret)
1202 return ret;
1203 }
1204
1011 return 0; 1205 return 0;
1012} 1206}
1013 1207
@@ -1053,6 +1247,10 @@ static int davinci_mcasp_suspend(struct snd_soc_dai *dai)
1053 u32 reg; 1247 u32 reg;
1054 int i; 1248 int i;
1055 1249
1250 context->pm_state = pm_runtime_enabled(mcasp->dev);
1251 if (!context->pm_state)
1252 pm_runtime_get_sync(mcasp->dev);
1253
1056 for (i = 0; i < ARRAY_SIZE(context_regs); i++) 1254 for (i = 0; i < ARRAY_SIZE(context_regs); i++)
1057 context->config_regs[i] = mcasp_get_reg(mcasp, context_regs[i]); 1255 context->config_regs[i] = mcasp_get_reg(mcasp, context_regs[i]);
1058 1256
@@ -1069,6 +1267,8 @@ static int davinci_mcasp_suspend(struct snd_soc_dai *dai)
1069 context->xrsr_regs[i] = mcasp_get_reg(mcasp, 1267 context->xrsr_regs[i] = mcasp_get_reg(mcasp,
1070 DAVINCI_MCASP_XRSRCTL_REG(i)); 1268 DAVINCI_MCASP_XRSRCTL_REG(i));
1071 1269
1270 pm_runtime_put_sync(mcasp->dev);
1271
1072 return 0; 1272 return 0;
1073} 1273}
1074 1274
@@ -1079,6 +1279,8 @@ static int davinci_mcasp_resume(struct snd_soc_dai *dai)
1079 u32 reg; 1279 u32 reg;
1080 int i; 1280 int i;
1081 1281
1282 pm_runtime_get_sync(mcasp->dev);
1283
1082 for (i = 0; i < ARRAY_SIZE(context_regs); i++) 1284 for (i = 0; i < ARRAY_SIZE(context_regs); i++)
1083 mcasp_set_reg(mcasp, context_regs[i], context->config_regs[i]); 1285 mcasp_set_reg(mcasp, context_regs[i], context->config_regs[i]);
1084 1286
@@ -1095,6 +1297,9 @@ static int davinci_mcasp_resume(struct snd_soc_dai *dai)
1095 mcasp_set_reg(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), 1297 mcasp_set_reg(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i),
1096 context->xrsr_regs[i]); 1298 context->xrsr_regs[i]);
1097 1299
1300 if (!context->pm_state)
1301 pm_runtime_put_sync(mcasp->dev);
1302
1098 return 0; 1303 return 0;
1099} 1304}
1100#else 1305#else
@@ -1398,13 +1603,6 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1398 1603
1399 pm_runtime_enable(&pdev->dev); 1604 pm_runtime_enable(&pdev->dev);
1400 1605
1401 ret = pm_runtime_get_sync(&pdev->dev);
1402 if (IS_ERR_VALUE(ret)) {
1403 dev_err(&pdev->dev, "pm_runtime_get_sync() failed\n");
1404 pm_runtime_disable(&pdev->dev);
1405 return ret;
1406 }
1407
1408 mcasp->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); 1606 mcasp->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem));
1409 if (!mcasp->base) { 1607 if (!mcasp->base) {
1410 dev_err(&pdev->dev, "ioremap failed\n"); 1608 dev_err(&pdev->dev, "ioremap failed\n");
@@ -1584,14 +1782,12 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1584 return 0; 1782 return 0;
1585 1783
1586err: 1784err:
1587 pm_runtime_put_sync(&pdev->dev);
1588 pm_runtime_disable(&pdev->dev); 1785 pm_runtime_disable(&pdev->dev);
1589 return ret; 1786 return ret;
1590} 1787}
1591 1788
1592static int davinci_mcasp_remove(struct platform_device *pdev) 1789static int davinci_mcasp_remove(struct platform_device *pdev)
1593{ 1790{
1594 pm_runtime_put_sync(&pdev->dev);
1595 pm_runtime_disable(&pdev->dev); 1791 pm_runtime_disable(&pdev->dev);
1596 1792
1597 return 0; 1793 return 0;