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-rw-r--r--sound/soc/codecs/rt5616.c1381
1 files changed, 1381 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5616.c b/sound/soc/codecs/rt5616.c
new file mode 100644
index 000000000000..1c10d8ed39d2
--- /dev/null
+++ b/sound/soc/codecs/rt5616.c
@@ -0,0 +1,1381 @@
1/*
2 * rt5616.c -- RT5616 ALSA SoC audio codec driver
3 *
4 * Copyright 2015 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/spi/spi.h>
20#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
24#include <sound/soc-dapm.h>
25#include <sound/initval.h>
26#include <sound/tlv.h>
27
28#include "rl6231.h"
29#include "rt5616.h"
30
31#define RT5616_PR_RANGE_BASE (0xff + 1)
32#define RT5616_PR_SPACING 0x100
33
34#define RT5616_PR_BASE (RT5616_PR_RANGE_BASE + (0 * RT5616_PR_SPACING))
35
36static const struct regmap_range_cfg rt5616_ranges[] = {
37 {
38 .name = "PR",
39 .range_min = RT5616_PR_BASE,
40 .range_max = RT5616_PR_BASE + 0xf8,
41 .selector_reg = RT5616_PRIV_INDEX,
42 .selector_mask = 0xff,
43 .selector_shift = 0x0,
44 .window_start = RT5616_PRIV_DATA,
45 .window_len = 0x1,
46 },
47};
48
49static const struct reg_sequence init_list[] = {
50 {RT5616_PR_BASE + 0x3d, 0x3e00},
51 {RT5616_PR_BASE + 0x25, 0x6110},
52 {RT5616_PR_BASE + 0x20, 0x611f},
53 {RT5616_PR_BASE + 0x21, 0x4040},
54 {RT5616_PR_BASE + 0x23, 0x0004},
55};
56#define RT5616_INIT_REG_LEN ARRAY_SIZE(init_list)
57
58static const struct reg_default rt5616_reg[] = {
59 { 0x00, 0x0021 },
60 { 0x02, 0xc8c8 },
61 { 0x03, 0xc8c8 },
62 { 0x05, 0x0000 },
63 { 0x0d, 0x0000 },
64 { 0x0f, 0x0808 },
65 { 0x19, 0xafaf },
66 { 0x1c, 0x2f2f },
67 { 0x1e, 0x0000 },
68 { 0x27, 0x7860 },
69 { 0x29, 0x8080 },
70 { 0x2a, 0x5252 },
71 { 0x3b, 0x0000 },
72 { 0x3c, 0x006f },
73 { 0x3d, 0x0000 },
74 { 0x3e, 0x006f },
75 { 0x45, 0x6000 },
76 { 0x4d, 0x0000 },
77 { 0x4e, 0x0000 },
78 { 0x4f, 0x0279 },
79 { 0x50, 0x0000 },
80 { 0x51, 0x0000 },
81 { 0x52, 0x0279 },
82 { 0x53, 0xf000 },
83 { 0x61, 0x0000 },
84 { 0x62, 0x0000 },
85 { 0x63, 0x00c0 },
86 { 0x64, 0x0000 },
87 { 0x65, 0x0000 },
88 { 0x66, 0x0000 },
89 { 0x70, 0x8000 },
90 { 0x73, 0x1104 },
91 { 0x74, 0x0c00 },
92 { 0x80, 0x0000 },
93 { 0x81, 0x0000 },
94 { 0x82, 0x0000 },
95 { 0x8b, 0x0600 },
96 { 0x8e, 0x0004 },
97 { 0x8f, 0x1100 },
98 { 0x90, 0x0000 },
99 { 0x91, 0x0000 },
100 { 0x92, 0x0000 },
101 { 0x93, 0x2000 },
102 { 0x94, 0x0200 },
103 { 0x95, 0x0000 },
104 { 0xb0, 0x2080 },
105 { 0xb1, 0x0000 },
106 { 0xb2, 0x0000 },
107 { 0xb4, 0x2206 },
108 { 0xb5, 0x1f00 },
109 { 0xb6, 0x0000 },
110 { 0xb7, 0x0000 },
111 { 0xbb, 0x0000 },
112 { 0xbc, 0x0000 },
113 { 0xbd, 0x0000 },
114 { 0xbe, 0x0000 },
115 { 0xbf, 0x0000 },
116 { 0xc0, 0x0100 },
117 { 0xc1, 0x0000 },
118 { 0xc2, 0x0000 },
119 { 0xc8, 0x0000 },
120 { 0xc9, 0x0000 },
121 { 0xca, 0x0000 },
122 { 0xcb, 0x0000 },
123 { 0xcc, 0x0000 },
124 { 0xcd, 0x0000 },
125 { 0xce, 0x0000 },
126 { 0xcf, 0x0013 },
127 { 0xd0, 0x0680 },
128 { 0xd1, 0x1c17 },
129 { 0xd3, 0xb320 },
130 { 0xd4, 0x0000 },
131 { 0xd6, 0x0000 },
132 { 0xd7, 0x0000 },
133 { 0xd9, 0x0809 },
134 { 0xda, 0x0000 },
135 { 0xfa, 0x0010 },
136 { 0xfb, 0x0000 },
137 { 0xfc, 0x0000 },
138 { 0xfe, 0x10ec },
139 { 0xff, 0x6281 },
140};
141
142struct rt5616_priv {
143 struct snd_soc_codec *codec;
144 struct delayed_work patch_work;
145 struct regmap *regmap;
146
147 int sysclk;
148 int sysclk_src;
149 int lrck[RT5616_AIFS];
150 int bclk[RT5616_AIFS];
151 int master[RT5616_AIFS];
152
153 int pll_src;
154 int pll_in;
155 int pll_out;
156
157};
158
159static bool rt5616_volatile_register(struct device *dev, unsigned int reg)
160{
161 int i;
162
163 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
164 if (reg >= rt5616_ranges[i].range_min &&
165 reg <= rt5616_ranges[i].range_max) {
166 return true;
167 }
168 }
169
170 switch (reg) {
171 case RT5616_RESET:
172 case RT5616_PRIV_DATA:
173 case RT5616_EQ_CTRL1:
174 case RT5616_DRC_AGC_1:
175 case RT5616_IRQ_CTRL2:
176 case RT5616_INT_IRQ_ST:
177 case RT5616_PGM_REG_ARR1:
178 case RT5616_PGM_REG_ARR3:
179 case RT5616_VENDOR_ID:
180 case RT5616_DEVICE_ID:
181 return true;
182 default:
183 return false;
184 }
185}
186
187static bool rt5616_readable_register(struct device *dev, unsigned int reg)
188{
189 int i;
190
191 for (i = 0; i < ARRAY_SIZE(rt5616_ranges); i++) {
192 if (reg >= rt5616_ranges[i].range_min &&
193 reg <= rt5616_ranges[i].range_max) {
194 return true;
195 }
196 }
197
198 switch (reg) {
199 case RT5616_RESET:
200 case RT5616_VERSION_ID:
201 case RT5616_VENDOR_ID:
202 case RT5616_DEVICE_ID:
203 case RT5616_HP_VOL:
204 case RT5616_LOUT_CTRL1:
205 case RT5616_LOUT_CTRL2:
206 case RT5616_IN1_IN2:
207 case RT5616_INL1_INR1_VOL:
208 case RT5616_DAC1_DIG_VOL:
209 case RT5616_ADC_DIG_VOL:
210 case RT5616_ADC_BST_VOL:
211 case RT5616_STO1_ADC_MIXER:
212 case RT5616_AD_DA_MIXER:
213 case RT5616_STO_DAC_MIXER:
214 case RT5616_REC_L1_MIXER:
215 case RT5616_REC_L2_MIXER:
216 case RT5616_REC_R1_MIXER:
217 case RT5616_REC_R2_MIXER:
218 case RT5616_HPO_MIXER:
219 case RT5616_OUT_L1_MIXER:
220 case RT5616_OUT_L2_MIXER:
221 case RT5616_OUT_L3_MIXER:
222 case RT5616_OUT_R1_MIXER:
223 case RT5616_OUT_R2_MIXER:
224 case RT5616_OUT_R3_MIXER:
225 case RT5616_LOUT_MIXER:
226 case RT5616_PWR_DIG1:
227 case RT5616_PWR_DIG2:
228 case RT5616_PWR_ANLG1:
229 case RT5616_PWR_ANLG2:
230 case RT5616_PWR_MIXER:
231 case RT5616_PWR_VOL:
232 case RT5616_PRIV_INDEX:
233 case RT5616_PRIV_DATA:
234 case RT5616_I2S1_SDP:
235 case RT5616_ADDA_CLK1:
236 case RT5616_ADDA_CLK2:
237 case RT5616_GLB_CLK:
238 case RT5616_PLL_CTRL1:
239 case RT5616_PLL_CTRL2:
240 case RT5616_HP_OVCD:
241 case RT5616_DEPOP_M1:
242 case RT5616_DEPOP_M2:
243 case RT5616_DEPOP_M3:
244 case RT5616_CHARGE_PUMP:
245 case RT5616_PV_DET_SPK_G:
246 case RT5616_MICBIAS:
247 case RT5616_A_JD_CTL1:
248 case RT5616_A_JD_CTL2:
249 case RT5616_EQ_CTRL1:
250 case RT5616_EQ_CTRL2:
251 case RT5616_WIND_FILTER:
252 case RT5616_DRC_AGC_1:
253 case RT5616_DRC_AGC_2:
254 case RT5616_DRC_AGC_3:
255 case RT5616_SVOL_ZC:
256 case RT5616_JD_CTRL1:
257 case RT5616_JD_CTRL2:
258 case RT5616_IRQ_CTRL1:
259 case RT5616_IRQ_CTRL2:
260 case RT5616_INT_IRQ_ST:
261 case RT5616_GPIO_CTRL1:
262 case RT5616_GPIO_CTRL2:
263 case RT5616_GPIO_CTRL3:
264 case RT5616_PGM_REG_ARR1:
265 case RT5616_PGM_REG_ARR2:
266 case RT5616_PGM_REG_ARR3:
267 case RT5616_PGM_REG_ARR4:
268 case RT5616_PGM_REG_ARR5:
269 case RT5616_SCB_FUNC:
270 case RT5616_SCB_CTRL:
271 case RT5616_BASE_BACK:
272 case RT5616_MP3_PLUS1:
273 case RT5616_MP3_PLUS2:
274 case RT5616_ADJ_HPF_CTRL1:
275 case RT5616_ADJ_HPF_CTRL2:
276 case RT5616_HP_CALIB_AMP_DET:
277 case RT5616_HP_CALIB2:
278 case RT5616_SV_ZCD1:
279 case RT5616_SV_ZCD2:
280 case RT5616_D_MISC:
281 case RT5616_DUMMY2:
282 case RT5616_DUMMY3:
283 return true;
284 default:
285 return false;
286 }
287}
288
289static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
290static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
291static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
292static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
293static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
294
295/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
296static unsigned int bst_tlv[] = {
297 TLV_DB_RANGE_HEAD(7),
298 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
299 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
300 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
301 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
302 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
303 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
304 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
305};
306
307static const struct snd_kcontrol_new rt5616_snd_controls[] = {
308 /* Headphone Output Volume */
309 SOC_DOUBLE("HP Playback Switch", RT5616_HP_VOL,
310 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
311 SOC_DOUBLE_TLV("HP Playback Volume", RT5616_HP_VOL,
312 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
313 /* OUTPUT Control */
314 SOC_DOUBLE("OUT Playback Switch", RT5616_LOUT_CTRL1,
315 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
316 SOC_DOUBLE("OUT Channel Switch", RT5616_LOUT_CTRL1,
317 RT5616_VOL_L_SFT, RT5616_VOL_R_SFT, 1, 1),
318 SOC_DOUBLE_TLV("OUT Playback Volume", RT5616_LOUT_CTRL1,
319 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT, 39, 1, out_vol_tlv),
320
321 /* DAC Digital Volume */
322 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5616_DAC1_DIG_VOL,
323 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
324 175, 0, dac_vol_tlv),
325 /* IN1/IN2 Control */
326 SOC_SINGLE_TLV("IN1 Boost Volume", RT5616_IN1_IN2,
327 RT5616_BST_SFT1, 8, 0, bst_tlv),
328 SOC_SINGLE_TLV("IN2 Boost Volume", RT5616_IN1_IN2,
329 RT5616_BST_SFT2, 8, 0, bst_tlv),
330 /* INL/INR Volume Control */
331 SOC_DOUBLE_TLV("IN Capture Volume", RT5616_INL1_INR1_VOL,
332 RT5616_INL_VOL_SFT, RT5616_INR_VOL_SFT,
333 31, 1, in_vol_tlv),
334 /* ADC Digital Volume Control */
335 SOC_DOUBLE("ADC Capture Switch", RT5616_ADC_DIG_VOL,
336 RT5616_L_MUTE_SFT, RT5616_R_MUTE_SFT, 1, 1),
337 SOC_DOUBLE_TLV("ADC Capture Volume", RT5616_ADC_DIG_VOL,
338 RT5616_L_VOL_SFT, RT5616_R_VOL_SFT,
339 127, 0, adc_vol_tlv),
340
341 /* ADC Boost Volume Control */
342 SOC_DOUBLE_TLV("ADC Boost Volume", RT5616_ADC_BST_VOL,
343 RT5616_ADC_L_BST_SFT, RT5616_ADC_R_BST_SFT,
344 3, 0, adc_bst_tlv),
345};
346
347static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
348 struct snd_soc_dapm_widget *sink)
349{
350 unsigned int val;
351
352 val = snd_soc_read(snd_soc_dapm_to_codec(source->dapm), RT5616_GLB_CLK);
353 val &= RT5616_SCLK_SRC_MASK;
354 if (val == RT5616_SCLK_SRC_PLL1)
355 return 1;
356 else
357 return 0;
358}
359
360/* Digital Mixer */
361static const struct snd_kcontrol_new rt5616_sto1_adc_l_mix[] = {
362 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
363 RT5616_M_STO1_ADC_L1_SFT, 1, 1),
364};
365
366static const struct snd_kcontrol_new rt5616_sto1_adc_r_mix[] = {
367 SOC_DAPM_SINGLE("ADC1 Switch", RT5616_STO1_ADC_MIXER,
368 RT5616_M_STO1_ADC_R1_SFT, 1, 1),
369};
370
371static const struct snd_kcontrol_new rt5616_dac_l_mix[] = {
372 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
373 RT5616_M_ADCMIX_L_SFT, 1, 1),
374 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
375 RT5616_M_IF1_DAC_L_SFT, 1, 1),
376};
377
378static const struct snd_kcontrol_new rt5616_dac_r_mix[] = {
379 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5616_AD_DA_MIXER,
380 RT5616_M_ADCMIX_R_SFT, 1, 1),
381 SOC_DAPM_SINGLE("INF1 Switch", RT5616_AD_DA_MIXER,
382 RT5616_M_IF1_DAC_R_SFT, 1, 1),
383};
384
385static const struct snd_kcontrol_new rt5616_sto_dac_l_mix[] = {
386 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
387 RT5616_M_DAC_L1_MIXL_SFT, 1, 1),
388 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
389 RT5616_M_DAC_R1_MIXL_SFT, 1, 1),
390};
391
392static const struct snd_kcontrol_new rt5616_sto_dac_r_mix[] = {
393 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_STO_DAC_MIXER,
394 RT5616_M_DAC_R1_MIXR_SFT, 1, 1),
395 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_STO_DAC_MIXER,
396 RT5616_M_DAC_L1_MIXR_SFT, 1, 1),
397};
398
399/* Analog Input Mixer */
400static const struct snd_kcontrol_new rt5616_rec_l_mix[] = {
401 SOC_DAPM_SINGLE("INL1 Switch", RT5616_REC_L2_MIXER,
402 RT5616_M_IN1_L_RM_L_SFT, 1, 1),
403 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_L2_MIXER,
404 RT5616_M_BST2_RM_L_SFT, 1, 1),
405 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_L2_MIXER,
406 RT5616_M_BST1_RM_L_SFT, 1, 1),
407};
408
409static const struct snd_kcontrol_new rt5616_rec_r_mix[] = {
410 SOC_DAPM_SINGLE("INR1 Switch", RT5616_REC_R2_MIXER,
411 RT5616_M_IN1_R_RM_R_SFT, 1, 1),
412 SOC_DAPM_SINGLE("BST2 Switch", RT5616_REC_R2_MIXER,
413 RT5616_M_BST2_RM_R_SFT, 1, 1),
414 SOC_DAPM_SINGLE("BST1 Switch", RT5616_REC_R2_MIXER,
415 RT5616_M_BST1_RM_R_SFT, 1, 1),
416};
417
418/* Analog Output Mixer */
419
420static const struct snd_kcontrol_new rt5616_out_l_mix[] = {
421 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_L3_MIXER,
422 RT5616_M_BST1_OM_L_SFT, 1, 1),
423 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_L3_MIXER,
424 RT5616_M_BST2_OM_L_SFT, 1, 1),
425 SOC_DAPM_SINGLE("INL1 Switch", RT5616_OUT_L3_MIXER,
426 RT5616_M_IN1_L_OM_L_SFT, 1, 1),
427 SOC_DAPM_SINGLE("REC MIXL Switch", RT5616_OUT_L3_MIXER,
428 RT5616_M_RM_L_OM_L_SFT, 1, 1),
429 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_OUT_L3_MIXER,
430 RT5616_M_DAC_L1_OM_L_SFT, 1, 1),
431};
432
433static const struct snd_kcontrol_new rt5616_out_r_mix[] = {
434 SOC_DAPM_SINGLE("BST2 Switch", RT5616_OUT_R3_MIXER,
435 RT5616_M_BST2_OM_R_SFT, 1, 1),
436 SOC_DAPM_SINGLE("BST1 Switch", RT5616_OUT_R3_MIXER,
437 RT5616_M_BST1_OM_R_SFT, 1, 1),
438 SOC_DAPM_SINGLE("INR1 Switch", RT5616_OUT_R3_MIXER,
439 RT5616_M_IN1_R_OM_R_SFT, 1, 1),
440 SOC_DAPM_SINGLE("REC MIXR Switch", RT5616_OUT_R3_MIXER,
441 RT5616_M_RM_R_OM_R_SFT, 1, 1),
442 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_OUT_R3_MIXER,
443 RT5616_M_DAC_R1_OM_R_SFT, 1, 1),
444};
445
446static const struct snd_kcontrol_new rt5616_hpo_mix[] = {
447 SOC_DAPM_SINGLE("DAC1 Switch", RT5616_HPO_MIXER,
448 RT5616_M_DAC1_HM_SFT, 1, 1),
449 SOC_DAPM_SINGLE("HPVOL Switch", RT5616_HPO_MIXER,
450 RT5616_M_HPVOL_HM_SFT, 1, 1),
451};
452
453static const struct snd_kcontrol_new rt5616_lout_mix[] = {
454 SOC_DAPM_SINGLE("DAC L1 Switch", RT5616_LOUT_MIXER,
455 RT5616_M_DAC_L1_LM_SFT, 1, 1),
456 SOC_DAPM_SINGLE("DAC R1 Switch", RT5616_LOUT_MIXER,
457 RT5616_M_DAC_R1_LM_SFT, 1, 1),
458 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5616_LOUT_MIXER,
459 RT5616_M_OV_L_LM_SFT, 1, 1),
460 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5616_LOUT_MIXER,
461 RT5616_M_OV_R_LM_SFT, 1, 1),
462};
463
464static int rt5616_adc_event(struct snd_soc_dapm_widget *w,
465 struct snd_kcontrol *kcontrol, int event)
466{
467 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
468
469 switch (event) {
470 case SND_SOC_DAPM_POST_PMU:
471 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
472 RT5616_L_MUTE | RT5616_R_MUTE, 0);
473 break;
474
475 case SND_SOC_DAPM_POST_PMD:
476 snd_soc_update_bits(codec, RT5616_ADC_DIG_VOL,
477 RT5616_L_MUTE | RT5616_R_MUTE,
478 RT5616_L_MUTE | RT5616_R_MUTE);
479 break;
480
481 default:
482 return 0;
483 }
484
485 return 0;
486}
487
488static int rt5616_charge_pump_event(struct snd_soc_dapm_widget *w,
489 struct snd_kcontrol *kcontrol, int event)
490{
491 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
492
493 switch (event) {
494 case SND_SOC_DAPM_POST_PMU:
495 /* depop parameters */
496 snd_soc_update_bits(codec, RT5616_DEPOP_M2,
497 RT5616_DEPOP_MASK, RT5616_DEPOP_MAN);
498 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
499 RT5616_HP_CP_MASK | RT5616_HP_SG_MASK |
500 RT5616_HP_CB_MASK, RT5616_HP_CP_PU |
501 RT5616_HP_SG_DIS | RT5616_HP_CB_PU);
502 snd_soc_write(codec, RT5616_PR_BASE +
503 RT5616_HP_DCC_INT1, 0x9f00);
504 /* headphone amp power on */
505 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
506 RT5616_PWR_FV1 | RT5616_PWR_FV2, 0);
507 snd_soc_update_bits(codec, RT5616_PWR_VOL,
508 RT5616_PWR_HV_L | RT5616_PWR_HV_R,
509 RT5616_PWR_HV_L | RT5616_PWR_HV_R);
510 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
511 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
512 RT5616_PWR_HA, RT5616_PWR_HP_L |
513 RT5616_PWR_HP_R | RT5616_PWR_HA);
514 msleep(50);
515 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
516 RT5616_PWR_FV1 | RT5616_PWR_FV2,
517 RT5616_PWR_FV1 | RT5616_PWR_FV2);
518
519 snd_soc_update_bits(codec, RT5616_CHARGE_PUMP,
520 RT5616_PM_HP_MASK, RT5616_PM_HP_HV);
521 snd_soc_update_bits(codec, RT5616_PR_BASE +
522 RT5616_CHOP_DAC_ADC, 0x0200, 0x0200);
523 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
524 RT5616_HP_CO_MASK | RT5616_HP_SG_MASK,
525 RT5616_HP_CO_EN | RT5616_HP_SG_EN);
526 break;
527 case SND_SOC_DAPM_PRE_PMD:
528 snd_soc_update_bits(codec, RT5616_PR_BASE +
529 RT5616_CHOP_DAC_ADC, 0x0200, 0x0);
530 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
531 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
532 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
533 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
534 /* headphone amp power down */
535 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
536 RT5616_SMT_TRIG_MASK | RT5616_HP_CD_PD_MASK |
537 RT5616_HP_CO_MASK | RT5616_HP_CP_MASK |
538 RT5616_HP_SG_MASK | RT5616_HP_CB_MASK,
539 RT5616_SMT_TRIG_DIS | RT5616_HP_CD_PD_EN |
540 RT5616_HP_CO_DIS | RT5616_HP_CP_PD |
541 RT5616_HP_SG_EN | RT5616_HP_CB_PD);
542 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
543 RT5616_PWR_HP_L | RT5616_PWR_HP_R |
544 RT5616_PWR_HA, 0);
545 break;
546 default:
547 return 0;
548 }
549
550 return 0;
551}
552
553static int rt5616_hp_event(struct snd_soc_dapm_widget *w,
554 struct snd_kcontrol *kcontrol, int event)
555{
556 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
557
558 switch (event) {
559 case SND_SOC_DAPM_POST_PMU:
560 /* headphone unmute sequence */
561 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
562 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
563 RT5616_CP_FQ3_MASK,
564 (RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ1_SFT) |
565 (RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT) |
566 (RT5616_CP_FQ_192_KHZ << RT5616_CP_FQ3_SFT));
567 snd_soc_write(codec, RT5616_PR_BASE +
568 RT5616_MAMP_INT_REG2, 0xfc00);
569 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
570 RT5616_SMT_TRIG_MASK, RT5616_SMT_TRIG_EN);
571 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
572 RT5616_RSTN_MASK, RT5616_RSTN_EN);
573 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
574 RT5616_RSTN_MASK | RT5616_HP_L_SMT_MASK |
575 RT5616_HP_R_SMT_MASK, RT5616_RSTN_DIS |
576 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
577 snd_soc_update_bits(codec, RT5616_HP_VOL,
578 RT5616_L_MUTE | RT5616_R_MUTE, 0);
579 msleep(100);
580 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
581 RT5616_HP_SG_MASK | RT5616_HP_L_SMT_MASK |
582 RT5616_HP_R_SMT_MASK, RT5616_HP_SG_DIS |
583 RT5616_HP_L_SMT_DIS | RT5616_HP_R_SMT_DIS);
584 msleep(20);
585 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
586 RT5616_HPD_PS_MASK, RT5616_HPD_PS_EN);
587 break;
588
589 case SND_SOC_DAPM_PRE_PMD:
590 /* headphone mute sequence */
591 snd_soc_update_bits(codec, RT5616_DEPOP_M3,
592 RT5616_CP_FQ1_MASK | RT5616_CP_FQ2_MASK |
593 RT5616_CP_FQ3_MASK,
594 (RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ1_SFT) |
595 (RT5616_CP_FQ_12_KHZ << RT5616_CP_FQ2_SFT) |
596 (RT5616_CP_FQ_96_KHZ << RT5616_CP_FQ3_SFT));
597 snd_soc_write(codec, RT5616_PR_BASE +
598 RT5616_MAMP_INT_REG2, 0xfc00);
599 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
600 RT5616_HP_SG_MASK, RT5616_HP_SG_EN);
601 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
602 RT5616_RSTP_MASK, RT5616_RSTP_EN);
603 snd_soc_update_bits(codec, RT5616_DEPOP_M1,
604 RT5616_RSTP_MASK | RT5616_HP_L_SMT_MASK |
605 RT5616_HP_R_SMT_MASK, RT5616_RSTP_DIS |
606 RT5616_HP_L_SMT_EN | RT5616_HP_R_SMT_EN);
607 snd_soc_update_bits(codec, RT5616_HP_CALIB_AMP_DET,
608 RT5616_HPD_PS_MASK, RT5616_HPD_PS_DIS);
609 msleep(90);
610 snd_soc_update_bits(codec, RT5616_HP_VOL,
611 RT5616_L_MUTE | RT5616_R_MUTE,
612 RT5616_L_MUTE | RT5616_R_MUTE);
613 msleep(30);
614 break;
615
616 default:
617 return 0;
618 }
619
620 return 0;
621}
622
623static int rt5616_lout_event(struct snd_soc_dapm_widget *w,
624 struct snd_kcontrol *kcontrol, int event)
625{
626 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
627
628 switch (event) {
629 case SND_SOC_DAPM_POST_PMU:
630 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
631 RT5616_PWR_LM, RT5616_PWR_LM);
632 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
633 RT5616_L_MUTE | RT5616_R_MUTE, 0);
634 break;
635
636 case SND_SOC_DAPM_PRE_PMD:
637 snd_soc_update_bits(codec, RT5616_LOUT_CTRL1,
638 RT5616_L_MUTE | RT5616_R_MUTE,
639 RT5616_L_MUTE | RT5616_R_MUTE);
640 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
641 RT5616_PWR_LM, 0);
642 break;
643
644 default:
645 return 0;
646 }
647
648 return 0;
649}
650
651static int rt5616_bst1_event(struct snd_soc_dapm_widget *w,
652 struct snd_kcontrol *kcontrol, int event)
653{
654 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
655
656 switch (event) {
657 case SND_SOC_DAPM_POST_PMU:
658 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
659 RT5616_PWR_BST1_OP2, RT5616_PWR_BST1_OP2);
660 break;
661
662 case SND_SOC_DAPM_PRE_PMD:
663 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
664 RT5616_PWR_BST1_OP2, 0);
665 break;
666
667 default:
668 return 0;
669 }
670
671 return 0;
672}
673
674static int rt5616_bst2_event(struct snd_soc_dapm_widget *w,
675 struct snd_kcontrol *kcontrol, int event)
676{
677 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
678
679 switch (event) {
680 case SND_SOC_DAPM_POST_PMU:
681 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
682 RT5616_PWR_BST2_OP2, RT5616_PWR_BST2_OP2);
683 break;
684
685 case SND_SOC_DAPM_PRE_PMD:
686 snd_soc_update_bits(codec, RT5616_PWR_ANLG2,
687 RT5616_PWR_BST2_OP2, 0);
688 break;
689
690 default:
691 return 0;
692 }
693
694 return 0;
695}
696
697static const struct snd_soc_dapm_widget rt5616_dapm_widgets[] = {
698 SND_SOC_DAPM_SUPPLY("PLL1", RT5616_PWR_ANLG2,
699 RT5616_PWR_PLL_BIT, 0, NULL, 0),
700 /* Input Side */
701 /* micbias */
702 SND_SOC_DAPM_SUPPLY("LDO", RT5616_PWR_ANLG1,
703 RT5616_PWR_LDO_BIT, 0, NULL, 0),
704 SND_SOC_DAPM_SUPPLY("micbias1", RT5616_PWR_ANLG2,
705 RT5616_PWR_MB1_BIT, 0, NULL, 0),
706
707 /* Input Lines */
708 SND_SOC_DAPM_INPUT("MIC1"),
709 SND_SOC_DAPM_INPUT("MIC2"),
710
711 SND_SOC_DAPM_INPUT("IN1P"),
712 SND_SOC_DAPM_INPUT("IN2P"),
713 SND_SOC_DAPM_INPUT("IN2N"),
714
715 /* Boost */
716 SND_SOC_DAPM_PGA_E("BST1", RT5616_PWR_ANLG2,
717 RT5616_PWR_BST1_BIT, 0, NULL, 0, rt5616_bst1_event,
718 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
719 SND_SOC_DAPM_PGA_E("BST2", RT5616_PWR_ANLG2,
720 RT5616_PWR_BST2_BIT, 0, NULL, 0, rt5616_bst2_event,
721 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
722 /* Input Volume */
723 SND_SOC_DAPM_PGA("INL1 VOL", RT5616_PWR_VOL,
724 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
725 SND_SOC_DAPM_PGA("INR1 VOL", RT5616_PWR_VOL,
726 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
727 SND_SOC_DAPM_PGA("INL2 VOL", RT5616_PWR_VOL,
728 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
729 SND_SOC_DAPM_PGA("INR2 VOL", RT5616_PWR_VOL,
730 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
731
732 /* REC Mixer */
733 SND_SOC_DAPM_MIXER("RECMIXL", RT5616_PWR_MIXER, RT5616_PWR_RM_L_BIT, 0,
734 rt5616_rec_l_mix, ARRAY_SIZE(rt5616_rec_l_mix)),
735 SND_SOC_DAPM_MIXER("RECMIXR", RT5616_PWR_MIXER, RT5616_PWR_RM_R_BIT, 0,
736 rt5616_rec_r_mix, ARRAY_SIZE(rt5616_rec_r_mix)),
737 /* ADCs */
738 SND_SOC_DAPM_ADC_E("ADC L", NULL, RT5616_PWR_DIG1,
739 RT5616_PWR_ADC_L_BIT, 0, rt5616_adc_event,
740 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
741 SND_SOC_DAPM_ADC_E("ADC R", NULL, RT5616_PWR_DIG1,
742 RT5616_PWR_ADC_R_BIT, 0, rt5616_adc_event,
743 SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
744
745 /* ADC Mixer */
746 SND_SOC_DAPM_SUPPLY("stereo1 filter", RT5616_PWR_DIG2,
747 RT5616_PWR_ADC_STO1_F_BIT, 0, NULL, 0),
748 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0,
749 rt5616_sto1_adc_l_mix, ARRAY_SIZE(rt5616_sto1_adc_l_mix)),
750 SND_SOC_DAPM_MIXER("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0,
751 rt5616_sto1_adc_r_mix, ARRAY_SIZE(rt5616_sto1_adc_r_mix)),
752
753 /* Digital Interface */
754 SND_SOC_DAPM_SUPPLY("I2S1", RT5616_PWR_DIG1,
755 RT5616_PWR_I2S1_BIT, 0, NULL, 0),
756 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
757 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
758 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
759 SND_SOC_DAPM_PGA("IF1 ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
760
761 /* Digital Interface Select */
762
763 /* Audio Interface */
764 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
765 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
766
767 /* Audio DSP */
768 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
769
770 /* Output Side */
771 /* DAC mixer before sound effect */
772 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
773 rt5616_dac_l_mix, ARRAY_SIZE(rt5616_dac_l_mix)),
774 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
775 rt5616_dac_r_mix, ARRAY_SIZE(rt5616_dac_r_mix)),
776
777 SND_SOC_DAPM_SUPPLY("Stero1 DAC Power", RT5616_PWR_DIG2,
778 RT5616_PWR_DAC_STO1_F_BIT, 0, NULL, 0),
779
780 /* DAC Mixer */
781 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
782 rt5616_sto_dac_l_mix, ARRAY_SIZE(rt5616_sto_dac_l_mix)),
783 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
784 rt5616_sto_dac_r_mix, ARRAY_SIZE(rt5616_sto_dac_r_mix)),
785
786 /* DACs */
787 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5616_PWR_DIG1,
788 RT5616_PWR_DAC_L1_BIT, 0),
789 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5616_PWR_DIG1,
790 RT5616_PWR_DAC_R1_BIT, 0),
791 /* OUT Mixer */
792 SND_SOC_DAPM_MIXER("OUT MIXL", RT5616_PWR_MIXER, RT5616_PWR_OM_L_BIT,
793 0, rt5616_out_l_mix, ARRAY_SIZE(rt5616_out_l_mix)),
794 SND_SOC_DAPM_MIXER("OUT MIXR", RT5616_PWR_MIXER, RT5616_PWR_OM_R_BIT,
795 0, rt5616_out_r_mix, ARRAY_SIZE(rt5616_out_r_mix)),
796 /* Output Volume */
797 SND_SOC_DAPM_PGA("OUTVOL L", RT5616_PWR_VOL,
798 RT5616_PWR_OV_L_BIT, 0, NULL, 0),
799 SND_SOC_DAPM_PGA("OUTVOL R", RT5616_PWR_VOL,
800 RT5616_PWR_OV_R_BIT, 0, NULL, 0),
801 SND_SOC_DAPM_PGA("HPOVOL L", RT5616_PWR_VOL,
802 RT5616_PWR_HV_L_BIT, 0, NULL, 0),
803 SND_SOC_DAPM_PGA("HPOVOL R", RT5616_PWR_VOL,
804 RT5616_PWR_HV_R_BIT, 0, NULL, 0),
805 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
806 0, 0, NULL, 0),
807 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM,
808 0, 0, NULL, 0),
809 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
810 0, 0, NULL, 0),
811 SND_SOC_DAPM_PGA("INL1", RT5616_PWR_VOL,
812 RT5616_PWR_IN1_L_BIT, 0, NULL, 0),
813 SND_SOC_DAPM_PGA("INR1", RT5616_PWR_VOL,
814 RT5616_PWR_IN1_R_BIT, 0, NULL, 0),
815 SND_SOC_DAPM_PGA("INL2", RT5616_PWR_VOL,
816 RT5616_PWR_IN2_L_BIT, 0, NULL, 0),
817 SND_SOC_DAPM_PGA("INR2", RT5616_PWR_VOL,
818 RT5616_PWR_IN2_R_BIT, 0, NULL, 0),
819 /* HPO/LOUT/Mono Mixer */
820 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
821 rt5616_hpo_mix, ARRAY_SIZE(rt5616_hpo_mix)),
822 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
823 rt5616_lout_mix, ARRAY_SIZE(rt5616_lout_mix)),
824
825 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
826 rt5616_hp_event, SND_SOC_DAPM_PRE_PMD |
827 SND_SOC_DAPM_POST_PMU),
828 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
829 rt5616_lout_event, SND_SOC_DAPM_PRE_PMD |
830 SND_SOC_DAPM_POST_PMU),
831
832 SND_SOC_DAPM_SUPPLY_S("Charge Pump", 1, SND_SOC_NOPM, 0, 0,
833 rt5616_charge_pump_event, SND_SOC_DAPM_POST_PMU |
834 SND_SOC_DAPM_PRE_PMD),
835
836 /* Output Lines */
837 SND_SOC_DAPM_OUTPUT("HPOL"),
838 SND_SOC_DAPM_OUTPUT("HPOR"),
839 SND_SOC_DAPM_OUTPUT("LOUTL"),
840 SND_SOC_DAPM_OUTPUT("LOUTR"),
841};
842
843static const struct snd_soc_dapm_route rt5616_dapm_routes[] = {
844 {"IN1P", NULL, "LDO"},
845 {"IN2P", NULL, "LDO"},
846
847 {"IN1P", NULL, "MIC1"},
848 {"IN2P", NULL, "MIC2"},
849 {"IN2N", NULL, "MIC2"},
850
851 {"BST1", NULL, "IN1P"},
852 {"BST2", NULL, "IN2P"},
853 {"BST2", NULL, "IN2N"},
854 {"BST1", NULL, "micbias1"},
855 {"BST2", NULL, "micbias1"},
856
857 {"INL1 VOL", NULL, "IN2P"},
858 {"INR1 VOL", NULL, "IN2N"},
859
860 {"RECMIXL", "INL1 Switch", "INL1 VOL"},
861 {"RECMIXL", "BST2 Switch", "BST2"},
862 {"RECMIXL", "BST1 Switch", "BST1"},
863
864 {"RECMIXR", "INR1 Switch", "INR1 VOL"},
865 {"RECMIXR", "BST2 Switch", "BST2"},
866 {"RECMIXR", "BST1 Switch", "BST1"},
867
868 {"ADC L", NULL, "RECMIXL"},
869 {"ADC R", NULL, "RECMIXR"},
870
871 {"Stereo1 ADC MIXL", "ADC1 Switch", "ADC L"},
872 {"Stereo1 ADC MIXL", NULL, "stereo1 filter"},
873 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
874
875 {"Stereo1 ADC MIXR", "ADC1 Switch", "ADC R"},
876 {"Stereo1 ADC MIXR", NULL, "stereo1 filter"},
877 {"stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll},
878
879 {"IF1 ADC1", NULL, "Stereo1 ADC MIXL"},
880 {"IF1 ADC1", NULL, "Stereo1 ADC MIXR"},
881 {"IF1 ADC1", NULL, "I2S1"},
882
883 {"AIF1TX", NULL, "IF1 ADC1"},
884
885 {"IF1 DAC", NULL, "AIF1RX"},
886 {"IF1 DAC", NULL, "I2S1"},
887
888 {"IF1 DAC1 L", NULL, "IF1 DAC"},
889 {"IF1 DAC1 R", NULL, "IF1 DAC"},
890
891 {"DAC MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL"},
892 {"DAC MIXL", "INF1 Switch", "IF1 DAC1 L"},
893 {"DAC MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR"},
894 {"DAC MIXR", "INF1 Switch", "IF1 DAC1 R"},
895
896 {"Audio DSP", NULL, "DAC MIXL"},
897 {"Audio DSP", NULL, "DAC MIXR"},
898
899 {"Stereo DAC MIXL", "DAC L1 Switch", "Audio DSP"},
900 {"Stereo DAC MIXL", "DAC R1 Switch", "DAC MIXR"},
901 {"Stereo DAC MIXL", NULL, "Stero1 DAC Power"},
902 {"Stereo DAC MIXR", "DAC R1 Switch", "Audio DSP"},
903 {"Stereo DAC MIXR", "DAC L1 Switch", "DAC MIXL"},
904 {"Stereo DAC MIXR", NULL, "Stero1 DAC Power"},
905
906 {"DAC L1", NULL, "Stereo DAC MIXL"},
907 {"DAC L1", NULL, "PLL1", is_sys_clk_from_pll},
908 {"DAC R1", NULL, "Stereo DAC MIXR"},
909 {"DAC R1", NULL, "PLL1", is_sys_clk_from_pll},
910
911 {"OUT MIXL", "BST1 Switch", "BST1"},
912 {"OUT MIXL", "BST2 Switch", "BST2"},
913 {"OUT MIXL", "INL1 Switch", "INL1 VOL"},
914 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
915 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
916
917 {"OUT MIXR", "BST2 Switch", "BST2"},
918 {"OUT MIXR", "BST1 Switch", "BST1"},
919 {"OUT MIXR", "INR1 Switch", "INR1 VOL"},
920 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
921 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
922
923 {"HPOVOL L", NULL, "OUT MIXL"},
924 {"HPOVOL R", NULL, "OUT MIXR"},
925 {"OUTVOL L", NULL, "OUT MIXL"},
926 {"OUTVOL R", NULL, "OUT MIXR"},
927
928 {"DAC 1", NULL, "DAC L1"},
929 {"DAC 1", NULL, "DAC R1"},
930 {"HPOVOL", NULL, "HPOVOL L"},
931 {"HPOVOL", NULL, "HPOVOL R"},
932 {"HPO MIX", "DAC1 Switch", "DAC 1"},
933 {"HPO MIX", "HPVOL Switch", "HPOVOL"},
934
935 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
936 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
937 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
938 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
939
940 {"HP amp", NULL, "HPO MIX"},
941 {"HP amp", NULL, "Charge Pump"},
942 {"HPOL", NULL, "HP amp"},
943 {"HPOR", NULL, "HP amp"},
944
945 {"LOUT amp", NULL, "LOUT MIX"},
946 {"LOUT amp", NULL, "Charge Pump"},
947 {"LOUTL", NULL, "LOUT amp"},
948 {"LOUTR", NULL, "LOUT amp"},
949
950};
951
952static int rt5616_hw_params(struct snd_pcm_substream *substream,
953 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
954{
955 struct snd_soc_pcm_runtime *rtd = substream->private_data;
956 struct snd_soc_codec *codec = rtd->codec;
957 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
958 unsigned int val_len = 0, val_clk, mask_clk;
959 int pre_div, bclk_ms, frame_size;
960
961 rt5616->lrck[dai->id] = params_rate(params);
962
963 pre_div = rl6231_get_clk_info(rt5616->sysclk, rt5616->lrck[dai->id]);
964
965 if (pre_div < 0) {
966 dev_err(codec->dev, "Unsupported clock setting\n");
967 return -EINVAL;
968 }
969 frame_size = snd_soc_params_to_frame_size(params);
970 if (frame_size < 0) {
971 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
972 return -EINVAL;
973 }
974 bclk_ms = frame_size > 32 ? 1 : 0;
975 rt5616->bclk[dai->id] = rt5616->lrck[dai->id] * (32 << bclk_ms);
976
977 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
978 rt5616->bclk[dai->id], rt5616->lrck[dai->id]);
979 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
980 bclk_ms, pre_div, dai->id);
981
982 switch (params_format(params)) {
983 case SNDRV_PCM_FORMAT_S16_LE:
984 break;
985 case SNDRV_PCM_FORMAT_S20_3LE:
986 val_len |= RT5616_I2S_DL_20;
987 break;
988 case SNDRV_PCM_FORMAT_S24_LE:
989 val_len |= RT5616_I2S_DL_24;
990 break;
991 case SNDRV_PCM_FORMAT_S8:
992 val_len |= RT5616_I2S_DL_8;
993 break;
994 default:
995 return -EINVAL;
996 }
997
998 mask_clk = RT5616_I2S_PD1_MASK;
999 val_clk = pre_div << RT5616_I2S_PD1_SFT;
1000 snd_soc_update_bits(codec, RT5616_I2S1_SDP,
1001 RT5616_I2S_DL_MASK, val_len);
1002 snd_soc_update_bits(codec, RT5616_ADDA_CLK1, mask_clk, val_clk);
1003
1004
1005 return 0;
1006}
1007
1008static int rt5616_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1009{
1010 struct snd_soc_codec *codec = dai->codec;
1011 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1012 unsigned int reg_val = 0;
1013
1014 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1015 case SND_SOC_DAIFMT_CBM_CFM:
1016 rt5616->master[dai->id] = 1;
1017 break;
1018 case SND_SOC_DAIFMT_CBS_CFS:
1019 reg_val |= RT5616_I2S_MS_S;
1020 rt5616->master[dai->id] = 0;
1021 break;
1022 default:
1023 return -EINVAL;
1024 }
1025
1026 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1027 case SND_SOC_DAIFMT_NB_NF:
1028 break;
1029 case SND_SOC_DAIFMT_IB_NF:
1030 reg_val |= RT5616_I2S_BP_INV;
1031 break;
1032 default:
1033 return -EINVAL;
1034 }
1035
1036 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1037 case SND_SOC_DAIFMT_I2S:
1038 break;
1039 case SND_SOC_DAIFMT_LEFT_J:
1040 reg_val |= RT5616_I2S_DF_LEFT;
1041 break;
1042 case SND_SOC_DAIFMT_DSP_A:
1043 reg_val |= RT5616_I2S_DF_PCM_A;
1044 break;
1045 case SND_SOC_DAIFMT_DSP_B:
1046 reg_val |= RT5616_I2S_DF_PCM_B;
1047 break;
1048 default:
1049 return -EINVAL;
1050 }
1051
1052 snd_soc_update_bits(codec, RT5616_I2S1_SDP,
1053 RT5616_I2S_MS_MASK | RT5616_I2S_BP_MASK |
1054 RT5616_I2S_DF_MASK, reg_val);
1055
1056
1057 return 0;
1058}
1059
1060static int rt5616_set_dai_sysclk(struct snd_soc_dai *dai,
1061 int clk_id, unsigned int freq, int dir)
1062{
1063 struct snd_soc_codec *codec = dai->codec;
1064 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1065 unsigned int reg_val = 0;
1066
1067 if (freq == rt5616->sysclk && clk_id == rt5616->sysclk_src)
1068 return 0;
1069
1070 switch (clk_id) {
1071 case RT5616_SCLK_S_MCLK:
1072 reg_val |= RT5616_SCLK_SRC_MCLK;
1073 break;
1074 case RT5616_SCLK_S_PLL1:
1075 reg_val |= RT5616_SCLK_SRC_PLL1;
1076 break;
1077 default:
1078 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1079 return -EINVAL;
1080 }
1081 snd_soc_update_bits(codec, RT5616_GLB_CLK,
1082 RT5616_SCLK_SRC_MASK, reg_val);
1083 rt5616->sysclk = freq;
1084 rt5616->sysclk_src = clk_id;
1085
1086 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1087
1088 return 0;
1089}
1090
1091static int rt5616_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1092 unsigned int freq_in, unsigned int freq_out)
1093{
1094 struct snd_soc_codec *codec = dai->codec;
1095 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1096 struct rl6231_pll_code pll_code;
1097 int ret;
1098
1099 if (source == rt5616->pll_src && freq_in == rt5616->pll_in &&
1100 freq_out == rt5616->pll_out)
1101 return 0;
1102
1103 if (!freq_in || !freq_out) {
1104 dev_dbg(codec->dev, "PLL disabled\n");
1105
1106 rt5616->pll_in = 0;
1107 rt5616->pll_out = 0;
1108 snd_soc_update_bits(codec, RT5616_GLB_CLK,
1109 RT5616_SCLK_SRC_MASK, RT5616_SCLK_SRC_MCLK);
1110 return 0;
1111 }
1112
1113 switch (source) {
1114 case RT5616_PLL1_S_MCLK:
1115 snd_soc_update_bits(codec, RT5616_GLB_CLK,
1116 RT5616_PLL1_SRC_MASK, RT5616_PLL1_SRC_MCLK);
1117 break;
1118 case RT5616_PLL1_S_BCLK1:
1119 case RT5616_PLL1_S_BCLK2:
1120 snd_soc_update_bits(codec, RT5616_GLB_CLK,
1121 RT5616_PLL1_SRC_MASK, RT5616_PLL1_SRC_BCLK1);
1122 break;
1123 default:
1124 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1125 return -EINVAL;
1126 }
1127
1128 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
1129 if (ret < 0) {
1130 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1131 return ret;
1132 }
1133
1134 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
1135 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
1136 pll_code.n_code, pll_code.k_code);
1137
1138 snd_soc_write(codec, RT5616_PLL_CTRL1,
1139 pll_code.n_code << RT5616_PLL_N_SFT | pll_code.k_code);
1140 snd_soc_write(codec, RT5616_PLL_CTRL2,
1141 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5616_PLL_M_SFT |
1142 pll_code.m_bp << RT5616_PLL_M_BP_SFT);
1143
1144 rt5616->pll_in = freq_in;
1145 rt5616->pll_out = freq_out;
1146 rt5616->pll_src = source;
1147
1148 return 0;
1149}
1150
1151static int rt5616_set_bias_level(struct snd_soc_codec *codec,
1152 enum snd_soc_bias_level level)
1153{
1154 switch (level) {
1155 case SND_SOC_BIAS_STANDBY:
1156 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1157 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
1158 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1159 RT5616_PWR_BG | RT5616_PWR_VREF2,
1160 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1161 RT5616_PWR_BG | RT5616_PWR_VREF2);
1162 mdelay(10);
1163 snd_soc_update_bits(codec, RT5616_PWR_ANLG1,
1164 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1165 RT5616_PWR_FV1 | RT5616_PWR_FV2);
1166 snd_soc_update_bits(codec, RT5616_D_MISC,
1167 RT5616_D_GATE_EN, RT5616_D_GATE_EN);
1168 }
1169 break;
1170
1171 case SND_SOC_BIAS_OFF:
1172 snd_soc_update_bits(codec, RT5616_D_MISC, RT5616_D_GATE_EN, 0);
1173 snd_soc_write(codec, RT5616_PWR_DIG1, 0x0000);
1174 snd_soc_write(codec, RT5616_PWR_DIG2, 0x0000);
1175 snd_soc_write(codec, RT5616_PWR_VOL, 0x0000);
1176 snd_soc_write(codec, RT5616_PWR_MIXER, 0x0000);
1177 snd_soc_write(codec, RT5616_PWR_ANLG1, 0x0000);
1178 snd_soc_write(codec, RT5616_PWR_ANLG2, 0x0000);
1179 break;
1180
1181 default:
1182 break;
1183 }
1184
1185 return 0;
1186}
1187
1188static int rt5616_probe(struct snd_soc_codec *codec)
1189{
1190 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1191
1192 rt5616->codec = codec;
1193
1194 return 0;
1195}
1196
1197#ifdef CONFIG_PM
1198static int rt5616_suspend(struct snd_soc_codec *codec)
1199{
1200 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1201
1202 regcache_cache_only(rt5616->regmap, true);
1203 regcache_mark_dirty(rt5616->regmap);
1204
1205 return 0;
1206}
1207
1208static int rt5616_resume(struct snd_soc_codec *codec)
1209{
1210 struct rt5616_priv *rt5616 = snd_soc_codec_get_drvdata(codec);
1211
1212 regcache_cache_only(rt5616->regmap, false);
1213 regcache_sync(rt5616->regmap);
1214 return 0;
1215}
1216#else
1217#define rt5616_suspend NULL
1218#define rt5616_resume NULL
1219#endif
1220
1221#define RT5616_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1222#define RT5616_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1223 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1224
1225
1226struct snd_soc_dai_ops rt5616_aif_dai_ops = {
1227 .hw_params = rt5616_hw_params,
1228 .set_fmt = rt5616_set_dai_fmt,
1229 .set_sysclk = rt5616_set_dai_sysclk,
1230 .set_pll = rt5616_set_dai_pll,
1231};
1232
1233struct snd_soc_dai_driver rt5616_dai[] = {
1234 {
1235 .name = "rt5616-aif1",
1236 .id = RT5616_AIF1,
1237 .playback = {
1238 .stream_name = "AIF1 Playback",
1239 .channels_min = 1,
1240 .channels_max = 2,
1241 .rates = RT5616_STEREO_RATES,
1242 .formats = RT5616_FORMATS,
1243 },
1244 .capture = {
1245 .stream_name = "AIF1 Capture",
1246 .channels_min = 1,
1247 .channels_max = 2,
1248 .rates = RT5616_STEREO_RATES,
1249 .formats = RT5616_FORMATS,
1250 },
1251 .ops = &rt5616_aif_dai_ops,
1252 },
1253};
1254
1255static struct snd_soc_codec_driver soc_codec_dev_rt5616 = {
1256 .probe = rt5616_probe,
1257 .suspend = rt5616_suspend,
1258 .resume = rt5616_resume,
1259 .set_bias_level = rt5616_set_bias_level,
1260 .idle_bias_off = true,
1261 .controls = rt5616_snd_controls,
1262 .num_controls = ARRAY_SIZE(rt5616_snd_controls),
1263 .dapm_widgets = rt5616_dapm_widgets,
1264 .num_dapm_widgets = ARRAY_SIZE(rt5616_dapm_widgets),
1265 .dapm_routes = rt5616_dapm_routes,
1266 .num_dapm_routes = ARRAY_SIZE(rt5616_dapm_routes),
1267};
1268
1269static const struct regmap_config rt5616_regmap = {
1270 .reg_bits = 8,
1271 .val_bits = 16,
1272 .use_single_rw = true,
1273 .max_register = RT5616_DEVICE_ID + 1 + (ARRAY_SIZE(rt5616_ranges) *
1274 RT5616_PR_SPACING),
1275 .volatile_reg = rt5616_volatile_register,
1276 .readable_reg = rt5616_readable_register,
1277 .cache_type = REGCACHE_RBTREE,
1278 .reg_defaults = rt5616_reg,
1279 .num_reg_defaults = ARRAY_SIZE(rt5616_reg),
1280 .ranges = rt5616_ranges,
1281 .num_ranges = ARRAY_SIZE(rt5616_ranges),
1282};
1283
1284static const struct i2c_device_id rt5616_i2c_id[] = {
1285 { "rt5616", 0 },
1286 { }
1287};
1288MODULE_DEVICE_TABLE(i2c, rt5616_i2c_id);
1289
1290#if defined(CONFIG_OF)
1291static const struct of_device_id rt5616_of_match[] = {
1292 { .compatible = "realtek,rt5616", },
1293 {},
1294};
1295MODULE_DEVICE_TABLE(of, rt5616_of_match);
1296#endif
1297
1298static int rt5616_i2c_probe(struct i2c_client *i2c,
1299 const struct i2c_device_id *id)
1300{
1301 struct rt5616_priv *rt5616;
1302 unsigned int val;
1303 int ret;
1304
1305 rt5616 = devm_kzalloc(&i2c->dev, sizeof(struct rt5616_priv),
1306 GFP_KERNEL);
1307 if (rt5616 == NULL)
1308 return -ENOMEM;
1309
1310 i2c_set_clientdata(i2c, rt5616);
1311
1312 rt5616->regmap = devm_regmap_init_i2c(i2c, &rt5616_regmap);
1313 if (IS_ERR(rt5616->regmap)) {
1314 ret = PTR_ERR(rt5616->regmap);
1315 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1316 ret);
1317 return ret;
1318 }
1319
1320 regmap_read(rt5616->regmap, RT5616_DEVICE_ID, &val);
1321 if (val != 0x6281) {
1322 dev_err(&i2c->dev,
1323 "Device with ID register %#x is not rt5616\n",
1324 val);
1325 return -ENODEV;
1326 }
1327 regmap_write(rt5616->regmap, RT5616_RESET, 0);
1328 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1329 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1330 RT5616_PWR_BG | RT5616_PWR_VREF2,
1331 RT5616_PWR_VREF1 | RT5616_PWR_MB |
1332 RT5616_PWR_BG | RT5616_PWR_VREF2);
1333 mdelay(10);
1334 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1335 RT5616_PWR_FV1 | RT5616_PWR_FV2,
1336 RT5616_PWR_FV1 | RT5616_PWR_FV2);
1337
1338 ret = regmap_register_patch(rt5616->regmap, init_list,
1339 ARRAY_SIZE(init_list));
1340 if (ret != 0)
1341 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
1342
1343 regmap_update_bits(rt5616->regmap, RT5616_PWR_ANLG1,
1344 RT5616_PWR_LDO_DVO_MASK, RT5616_PWR_LDO_DVO_1_2V);
1345
1346 return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5616,
1347 rt5616_dai, ARRAY_SIZE(rt5616_dai));
1348
1349}
1350
1351static int rt5616_i2c_remove(struct i2c_client *i2c)
1352{
1353 snd_soc_unregister_codec(&i2c->dev);
1354
1355 return 0;
1356}
1357
1358static void rt5616_i2c_shutdown(struct i2c_client *client)
1359{
1360 struct rt5616_priv *rt5616 = i2c_get_clientdata(client);
1361
1362 regmap_write(rt5616->regmap, RT5616_HP_VOL, 0xc8c8);
1363 regmap_write(rt5616->regmap, RT5616_LOUT_CTRL1, 0xc8c8);
1364
1365}
1366
1367static struct i2c_driver rt5616_i2c_driver = {
1368 .driver = {
1369 .name = "rt5616",
1370 .of_match_table = of_match_ptr(rt5616_of_match),
1371 },
1372 .probe = rt5616_i2c_probe,
1373 .remove = rt5616_i2c_remove,
1374 .shutdown = rt5616_i2c_shutdown,
1375 .id_table = rt5616_i2c_id,
1376};
1377module_i2c_driver(rt5616_i2c_driver);
1378
1379MODULE_DESCRIPTION("ASoC RT5616 driver");
1380MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1381MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-25 13:26:18 -0400