diff options
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/dma/Kconfig | 16 | ||||
| -rw-r--r-- | kernel/dma/Makefile | 1 | ||||
| -rw-r--r-- | kernel/dma/contiguous.c | 6 | ||||
| -rw-r--r-- | kernel/dma/debug.c | 16 | ||||
| -rw-r--r-- | kernel/dma/direct.c | 222 | ||||
| -rw-r--r-- | kernel/dma/mapping.c | 71 | ||||
| -rw-r--r-- | kernel/dma/noncoherent.c | 106 |
7 files changed, 246 insertions, 192 deletions
diff --git a/kernel/dma/Kconfig b/kernel/dma/Kconfig index 1b1d63b3634b..645c7a2ecde8 100644 --- a/kernel/dma/Kconfig +++ b/kernel/dma/Kconfig | |||
| @@ -13,6 +13,9 @@ config NEED_DMA_MAP_STATE | |||
| 13 | config ARCH_DMA_ADDR_T_64BIT | 13 | config ARCH_DMA_ADDR_T_64BIT |
| 14 | def_bool 64BIT || PHYS_ADDR_T_64BIT | 14 | def_bool 64BIT || PHYS_ADDR_T_64BIT |
| 15 | 15 | ||
| 16 | config ARCH_HAS_DMA_COHERENCE_H | ||
| 17 | bool | ||
| 18 | |||
| 16 | config HAVE_GENERIC_DMA_COHERENT | 19 | config HAVE_GENERIC_DMA_COHERENT |
| 17 | bool | 20 | bool |
| 18 | 21 | ||
| @@ -26,22 +29,19 @@ config ARCH_HAS_SYNC_DMA_FOR_CPU | |||
| 26 | config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL | 29 | config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL |
| 27 | bool | 30 | bool |
| 28 | 31 | ||
| 29 | config DMA_DIRECT_OPS | 32 | config ARCH_HAS_DMA_COHERENT_TO_PFN |
| 30 | bool | 33 | bool |
| 31 | depends on HAS_DMA | ||
| 32 | 34 | ||
| 33 | config DMA_NONCOHERENT_OPS | 35 | config ARCH_HAS_DMA_MMAP_PGPROT |
| 34 | bool | 36 | bool |
| 35 | depends on HAS_DMA | ||
| 36 | select DMA_DIRECT_OPS | ||
| 37 | 37 | ||
| 38 | config DMA_NONCOHERENT_MMAP | 38 | config DMA_DIRECT_OPS |
| 39 | bool | 39 | bool |
| 40 | depends on DMA_NONCOHERENT_OPS | 40 | depends on HAS_DMA |
| 41 | 41 | ||
| 42 | config DMA_NONCOHERENT_CACHE_SYNC | 42 | config DMA_NONCOHERENT_CACHE_SYNC |
| 43 | bool | 43 | bool |
| 44 | depends on DMA_NONCOHERENT_OPS | 44 | depends on DMA_DIRECT_OPS |
| 45 | 45 | ||
| 46 | config DMA_VIRT_OPS | 46 | config DMA_VIRT_OPS |
| 47 | bool | 47 | bool |
diff --git a/kernel/dma/Makefile b/kernel/dma/Makefile index 6de44e4eb454..7d581e4eea4a 100644 --- a/kernel/dma/Makefile +++ b/kernel/dma/Makefile | |||
| @@ -4,7 +4,6 @@ obj-$(CONFIG_HAS_DMA) += mapping.o | |||
| 4 | obj-$(CONFIG_DMA_CMA) += contiguous.o | 4 | obj-$(CONFIG_DMA_CMA) += contiguous.o |
| 5 | obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += coherent.o | 5 | obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += coherent.o |
| 6 | obj-$(CONFIG_DMA_DIRECT_OPS) += direct.o | 6 | obj-$(CONFIG_DMA_DIRECT_OPS) += direct.o |
| 7 | obj-$(CONFIG_DMA_NONCOHERENT_OPS) += noncoherent.o | ||
| 8 | obj-$(CONFIG_DMA_VIRT_OPS) += virt.o | 7 | obj-$(CONFIG_DMA_VIRT_OPS) += virt.o |
| 9 | obj-$(CONFIG_DMA_API_DEBUG) += debug.o | 8 | obj-$(CONFIG_DMA_API_DEBUG) += debug.o |
| 10 | obj-$(CONFIG_SWIOTLB) += swiotlb.o | 9 | obj-$(CONFIG_SWIOTLB) += swiotlb.o |
diff --git a/kernel/dma/contiguous.c b/kernel/dma/contiguous.c index 286d82329eb0..b2a87905846d 100644 --- a/kernel/dma/contiguous.c +++ b/kernel/dma/contiguous.c | |||
| @@ -49,7 +49,11 @@ static phys_addr_t limit_cmdline; | |||
| 49 | 49 | ||
| 50 | static int __init early_cma(char *p) | 50 | static int __init early_cma(char *p) |
| 51 | { | 51 | { |
| 52 | pr_debug("%s(%s)\n", __func__, p); | 52 | if (!p) { |
| 53 | pr_err("Config string not provided\n"); | ||
| 54 | return -EINVAL; | ||
| 55 | } | ||
| 56 | |||
| 53 | size_cmdline = memparse(p, &p); | 57 | size_cmdline = memparse(p, &p); |
| 54 | if (*p != '@') | 58 | if (*p != '@') |
| 55 | return 0; | 59 | return 0; |
diff --git a/kernel/dma/debug.c b/kernel/dma/debug.c index c007d25bee09..231ca4628062 100644 --- a/kernel/dma/debug.c +++ b/kernel/dma/debug.c | |||
| @@ -1312,6 +1312,22 @@ static void check_sg_segment(struct device *dev, struct scatterlist *sg) | |||
| 1312 | #endif | 1312 | #endif |
| 1313 | } | 1313 | } |
| 1314 | 1314 | ||
| 1315 | void debug_dma_map_single(struct device *dev, const void *addr, | ||
| 1316 | unsigned long len) | ||
| 1317 | { | ||
| 1318 | if (unlikely(dma_debug_disabled())) | ||
| 1319 | return; | ||
| 1320 | |||
| 1321 | if (!virt_addr_valid(addr)) | ||
| 1322 | err_printk(dev, NULL, "DMA-API: device driver maps memory from invalid area [addr=%p] [len=%lu]\n", | ||
| 1323 | addr, len); | ||
| 1324 | |||
| 1325 | if (is_vmalloc_addr(addr)) | ||
| 1326 | err_printk(dev, NULL, "DMA-API: device driver maps memory from vmalloc area [addr=%p] [len=%lu]\n", | ||
| 1327 | addr, len); | ||
| 1328 | } | ||
| 1329 | EXPORT_SYMBOL(debug_dma_map_single); | ||
| 1330 | |||
| 1315 | void debug_dma_map_page(struct device *dev, struct page *page, size_t offset, | 1331 | void debug_dma_map_page(struct device *dev, struct page *page, size_t offset, |
| 1316 | size_t size, int direction, dma_addr_t dma_addr, | 1332 | size_t size, int direction, dma_addr_t dma_addr, |
| 1317 | bool map_single) | 1333 | bool map_single) |
diff --git a/kernel/dma/direct.c b/kernel/dma/direct.c index de87b0282e74..87a6bc2a96c0 100644 --- a/kernel/dma/direct.c +++ b/kernel/dma/direct.c | |||
| @@ -1,13 +1,16 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* | 2 | /* |
| 3 | * DMA operations that map physical memory directly without using an IOMMU or | 3 | * Copyright (C) 2018 Christoph Hellwig. |
| 4 | * flushing caches. | 4 | * |
| 5 | * DMA operations that map physical memory directly without using an IOMMU. | ||
| 5 | */ | 6 | */ |
| 7 | #include <linux/bootmem.h> /* for max_pfn */ | ||
| 6 | #include <linux/export.h> | 8 | #include <linux/export.h> |
| 7 | #include <linux/mm.h> | 9 | #include <linux/mm.h> |
| 8 | #include <linux/dma-direct.h> | 10 | #include <linux/dma-direct.h> |
| 9 | #include <linux/scatterlist.h> | 11 | #include <linux/scatterlist.h> |
| 10 | #include <linux/dma-contiguous.h> | 12 | #include <linux/dma-contiguous.h> |
| 13 | #include <linux/dma-noncoherent.h> | ||
| 11 | #include <linux/pfn.h> | 14 | #include <linux/pfn.h> |
| 12 | #include <linux/set_memory.h> | 15 | #include <linux/set_memory.h> |
| 13 | 16 | ||
| @@ -41,40 +44,83 @@ check_addr(struct device *dev, dma_addr_t dma_addr, size_t size, | |||
| 41 | return false; | 44 | return false; |
| 42 | } | 45 | } |
| 43 | 46 | ||
| 44 | if (*dev->dma_mask >= DMA_BIT_MASK(32)) { | 47 | if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) { |
| 45 | dev_err(dev, | 48 | dev_err(dev, |
| 46 | "%s: overflow %pad+%zu of device mask %llx\n", | 49 | "%s: overflow %pad+%zu of device mask %llx bus mask %llx\n", |
| 47 | caller, &dma_addr, size, *dev->dma_mask); | 50 | caller, &dma_addr, size, |
| 51 | *dev->dma_mask, dev->bus_dma_mask); | ||
| 48 | } | 52 | } |
| 49 | return false; | 53 | return false; |
| 50 | } | 54 | } |
| 51 | return true; | 55 | return true; |
| 52 | } | 56 | } |
| 53 | 57 | ||
| 58 | static inline dma_addr_t phys_to_dma_direct(struct device *dev, | ||
| 59 | phys_addr_t phys) | ||
| 60 | { | ||
| 61 | if (force_dma_unencrypted()) | ||
| 62 | return __phys_to_dma(dev, phys); | ||
| 63 | return phys_to_dma(dev, phys); | ||
| 64 | } | ||
| 65 | |||
| 66 | u64 dma_direct_get_required_mask(struct device *dev) | ||
| 67 | { | ||
| 68 | u64 max_dma = phys_to_dma_direct(dev, (max_pfn - 1) << PAGE_SHIFT); | ||
| 69 | |||
| 70 | if (dev->bus_dma_mask && dev->bus_dma_mask < max_dma) | ||
| 71 | max_dma = dev->bus_dma_mask; | ||
| 72 | |||
| 73 | return (1ULL << (fls64(max_dma) - 1)) * 2 - 1; | ||
| 74 | } | ||
| 75 | |||
| 76 | static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask, | ||
| 77 | u64 *phys_mask) | ||
| 78 | { | ||
| 79 | if (dev->bus_dma_mask && dev->bus_dma_mask < dma_mask) | ||
| 80 | dma_mask = dev->bus_dma_mask; | ||
| 81 | |||
| 82 | if (force_dma_unencrypted()) | ||
| 83 | *phys_mask = __dma_to_phys(dev, dma_mask); | ||
| 84 | else | ||
| 85 | *phys_mask = dma_to_phys(dev, dma_mask); | ||
| 86 | |||
| 87 | /* | ||
| 88 | * Optimistically try the zone that the physical address mask falls | ||
| 89 | * into first. If that returns memory that isn't actually addressable | ||
| 90 | * we will fallback to the next lower zone and try again. | ||
| 91 | * | ||
| 92 | * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding | ||
| 93 | * zones. | ||
| 94 | */ | ||
| 95 | if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS)) | ||
| 96 | return GFP_DMA; | ||
| 97 | if (*phys_mask <= DMA_BIT_MASK(32)) | ||
| 98 | return GFP_DMA32; | ||
| 99 | return 0; | ||
| 100 | } | ||
| 101 | |||
| 54 | static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size) | 102 | static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size) |
| 55 | { | 103 | { |
| 56 | dma_addr_t addr = force_dma_unencrypted() ? | 104 | return phys_to_dma_direct(dev, phys) + size - 1 <= |
| 57 | __phys_to_dma(dev, phys) : phys_to_dma(dev, phys); | 105 | min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask); |
| 58 | return addr + size - 1 <= dev->coherent_dma_mask; | ||
| 59 | } | 106 | } |
| 60 | 107 | ||
| 61 | void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, | 108 | void *dma_direct_alloc_pages(struct device *dev, size_t size, |
| 62 | gfp_t gfp, unsigned long attrs) | 109 | dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) |
| 63 | { | 110 | { |
| 64 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; | 111 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; |
| 65 | int page_order = get_order(size); | 112 | int page_order = get_order(size); |
| 66 | struct page *page = NULL; | 113 | struct page *page = NULL; |
| 114 | u64 phys_mask; | ||
| 67 | void *ret; | 115 | void *ret; |
| 68 | 116 | ||
| 117 | if (attrs & DMA_ATTR_NO_WARN) | ||
| 118 | gfp |= __GFP_NOWARN; | ||
| 119 | |||
| 69 | /* we always manually zero the memory once we are done: */ | 120 | /* we always manually zero the memory once we are done: */ |
| 70 | gfp &= ~__GFP_ZERO; | 121 | gfp &= ~__GFP_ZERO; |
| 71 | 122 | gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask, | |
| 72 | /* GFP_DMA32 and GFP_DMA are no ops without the corresponding zones: */ | 123 | &phys_mask); |
| 73 | if (dev->coherent_dma_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS)) | ||
| 74 | gfp |= GFP_DMA; | ||
| 75 | if (dev->coherent_dma_mask <= DMA_BIT_MASK(32) && !(gfp & GFP_DMA)) | ||
| 76 | gfp |= GFP_DMA32; | ||
| 77 | |||
| 78 | again: | 124 | again: |
| 79 | /* CMA can be used only in the context which permits sleeping */ | 125 | /* CMA can be used only in the context which permits sleeping */ |
| 80 | if (gfpflags_allow_blocking(gfp)) { | 126 | if (gfpflags_allow_blocking(gfp)) { |
| @@ -93,15 +139,14 @@ again: | |||
| 93 | page = NULL; | 139 | page = NULL; |
| 94 | 140 | ||
| 95 | if (IS_ENABLED(CONFIG_ZONE_DMA32) && | 141 | if (IS_ENABLED(CONFIG_ZONE_DMA32) && |
| 96 | dev->coherent_dma_mask < DMA_BIT_MASK(64) && | 142 | phys_mask < DMA_BIT_MASK(64) && |
| 97 | !(gfp & (GFP_DMA32 | GFP_DMA))) { | 143 | !(gfp & (GFP_DMA32 | GFP_DMA))) { |
| 98 | gfp |= GFP_DMA32; | 144 | gfp |= GFP_DMA32; |
| 99 | goto again; | 145 | goto again; |
| 100 | } | 146 | } |
| 101 | 147 | ||
| 102 | if (IS_ENABLED(CONFIG_ZONE_DMA) && | 148 | if (IS_ENABLED(CONFIG_ZONE_DMA) && |
| 103 | dev->coherent_dma_mask < DMA_BIT_MASK(32) && | 149 | phys_mask < DMA_BIT_MASK(32) && !(gfp & GFP_DMA)) { |
| 104 | !(gfp & GFP_DMA)) { | ||
| 105 | gfp = (gfp & ~GFP_DMA32) | GFP_DMA; | 150 | gfp = (gfp & ~GFP_DMA32) | GFP_DMA; |
| 106 | goto again; | 151 | goto again; |
| 107 | } | 152 | } |
| @@ -124,7 +169,7 @@ again: | |||
| 124 | * NOTE: this function must never look at the dma_addr argument, because we want | 169 | * NOTE: this function must never look at the dma_addr argument, because we want |
| 125 | * to be able to use it as a helper for iommu implementations as well. | 170 | * to be able to use it as a helper for iommu implementations as well. |
| 126 | */ | 171 | */ |
| 127 | void dma_direct_free(struct device *dev, size_t size, void *cpu_addr, | 172 | void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr, |
| 128 | dma_addr_t dma_addr, unsigned long attrs) | 173 | dma_addr_t dma_addr, unsigned long attrs) |
| 129 | { | 174 | { |
| 130 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; | 175 | unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; |
| @@ -136,14 +181,96 @@ void dma_direct_free(struct device *dev, size_t size, void *cpu_addr, | |||
| 136 | free_pages((unsigned long)cpu_addr, page_order); | 181 | free_pages((unsigned long)cpu_addr, page_order); |
| 137 | } | 182 | } |
| 138 | 183 | ||
| 184 | void *dma_direct_alloc(struct device *dev, size_t size, | ||
| 185 | dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) | ||
| 186 | { | ||
| 187 | if (!dev_is_dma_coherent(dev)) | ||
| 188 | return arch_dma_alloc(dev, size, dma_handle, gfp, attrs); | ||
| 189 | return dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs); | ||
| 190 | } | ||
| 191 | |||
| 192 | void dma_direct_free(struct device *dev, size_t size, | ||
| 193 | void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs) | ||
| 194 | { | ||
| 195 | if (!dev_is_dma_coherent(dev)) | ||
| 196 | arch_dma_free(dev, size, cpu_addr, dma_addr, attrs); | ||
| 197 | else | ||
| 198 | dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs); | ||
| 199 | } | ||
| 200 | |||
| 201 | static void dma_direct_sync_single_for_device(struct device *dev, | ||
| 202 | dma_addr_t addr, size_t size, enum dma_data_direction dir) | ||
| 203 | { | ||
| 204 | if (dev_is_dma_coherent(dev)) | ||
| 205 | return; | ||
| 206 | arch_sync_dma_for_device(dev, dma_to_phys(dev, addr), size, dir); | ||
| 207 | } | ||
| 208 | |||
| 209 | static void dma_direct_sync_sg_for_device(struct device *dev, | ||
| 210 | struct scatterlist *sgl, int nents, enum dma_data_direction dir) | ||
| 211 | { | ||
| 212 | struct scatterlist *sg; | ||
| 213 | int i; | ||
| 214 | |||
| 215 | if (dev_is_dma_coherent(dev)) | ||
| 216 | return; | ||
| 217 | |||
| 218 | for_each_sg(sgl, sg, nents, i) | ||
| 219 | arch_sync_dma_for_device(dev, sg_phys(sg), sg->length, dir); | ||
| 220 | } | ||
| 221 | |||
| 222 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ | ||
| 223 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) | ||
| 224 | static void dma_direct_sync_single_for_cpu(struct device *dev, | ||
| 225 | dma_addr_t addr, size_t size, enum dma_data_direction dir) | ||
| 226 | { | ||
| 227 | if (dev_is_dma_coherent(dev)) | ||
| 228 | return; | ||
| 229 | arch_sync_dma_for_cpu(dev, dma_to_phys(dev, addr), size, dir); | ||
| 230 | arch_sync_dma_for_cpu_all(dev); | ||
| 231 | } | ||
| 232 | |||
| 233 | static void dma_direct_sync_sg_for_cpu(struct device *dev, | ||
| 234 | struct scatterlist *sgl, int nents, enum dma_data_direction dir) | ||
| 235 | { | ||
| 236 | struct scatterlist *sg; | ||
| 237 | int i; | ||
| 238 | |||
| 239 | if (dev_is_dma_coherent(dev)) | ||
| 240 | return; | ||
| 241 | |||
| 242 | for_each_sg(sgl, sg, nents, i) | ||
| 243 | arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir); | ||
| 244 | arch_sync_dma_for_cpu_all(dev); | ||
| 245 | } | ||
| 246 | |||
| 247 | static void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, | ||
| 248 | size_t size, enum dma_data_direction dir, unsigned long attrs) | ||
| 249 | { | ||
| 250 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 251 | dma_direct_sync_single_for_cpu(dev, addr, size, dir); | ||
| 252 | } | ||
| 253 | |||
| 254 | static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, | ||
| 255 | int nents, enum dma_data_direction dir, unsigned long attrs) | ||
| 256 | { | ||
| 257 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 258 | dma_direct_sync_sg_for_cpu(dev, sgl, nents, dir); | ||
| 259 | } | ||
| 260 | #endif | ||
| 261 | |||
| 139 | dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, | 262 | dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, |
| 140 | unsigned long offset, size_t size, enum dma_data_direction dir, | 263 | unsigned long offset, size_t size, enum dma_data_direction dir, |
| 141 | unsigned long attrs) | 264 | unsigned long attrs) |
| 142 | { | 265 | { |
| 143 | dma_addr_t dma_addr = phys_to_dma(dev, page_to_phys(page)) + offset; | 266 | phys_addr_t phys = page_to_phys(page) + offset; |
| 267 | dma_addr_t dma_addr = phys_to_dma(dev, phys); | ||
| 144 | 268 | ||
| 145 | if (!check_addr(dev, dma_addr, size, __func__)) | 269 | if (!check_addr(dev, dma_addr, size, __func__)) |
| 146 | return DIRECT_MAPPING_ERROR; | 270 | return DIRECT_MAPPING_ERROR; |
| 271 | |||
| 272 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 273 | dma_direct_sync_single_for_device(dev, dma_addr, size, dir); | ||
| 147 | return dma_addr; | 274 | return dma_addr; |
| 148 | } | 275 | } |
| 149 | 276 | ||
| @@ -162,31 +289,29 @@ int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, | |||
| 162 | sg_dma_len(sg) = sg->length; | 289 | sg_dma_len(sg) = sg->length; |
| 163 | } | 290 | } |
| 164 | 291 | ||
| 292 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 293 | dma_direct_sync_sg_for_device(dev, sgl, nents, dir); | ||
| 165 | return nents; | 294 | return nents; |
| 166 | } | 295 | } |
| 167 | 296 | ||
| 297 | /* | ||
| 298 | * Because 32-bit DMA masks are so common we expect every architecture to be | ||
| 299 | * able to satisfy them - either by not supporting more physical memory, or by | ||
| 300 | * providing a ZONE_DMA32. If neither is the case, the architecture needs to | ||
| 301 | * use an IOMMU instead of the direct mapping. | ||
| 302 | */ | ||
| 168 | int dma_direct_supported(struct device *dev, u64 mask) | 303 | int dma_direct_supported(struct device *dev, u64 mask) |
| 169 | { | 304 | { |
| 170 | #ifdef CONFIG_ZONE_DMA | 305 | u64 min_mask; |
| 171 | if (mask < phys_to_dma(dev, DMA_BIT_MASK(ARCH_ZONE_DMA_BITS))) | 306 | |
| 172 | return 0; | 307 | if (IS_ENABLED(CONFIG_ZONE_DMA)) |
| 173 | #else | 308 | min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS); |
| 174 | /* | 309 | else |
| 175 | * Because 32-bit DMA masks are so common we expect every architecture | 310 | min_mask = DMA_BIT_MASK(32); |
| 176 | * to be able to satisfy them - either by not supporting more physical | 311 | |
| 177 | * memory, or by providing a ZONE_DMA32. If neither is the case, the | 312 | min_mask = min_t(u64, min_mask, (max_pfn - 1) << PAGE_SHIFT); |
| 178 | * architecture needs to use an IOMMU instead of the direct mapping. | 313 | |
| 179 | */ | 314 | return mask >= phys_to_dma(dev, min_mask); |
| 180 | if (mask < phys_to_dma(dev, DMA_BIT_MASK(32))) | ||
| 181 | return 0; | ||
| 182 | #endif | ||
| 183 | /* | ||
| 184 | * Upstream PCI/PCIe bridges or SoC interconnects may not carry | ||
| 185 | * as many DMA address bits as the device itself supports. | ||
| 186 | */ | ||
| 187 | if (dev->bus_dma_mask && mask > dev->bus_dma_mask) | ||
| 188 | return 0; | ||
| 189 | return 1; | ||
| 190 | } | 315 | } |
| 191 | 316 | ||
| 192 | int dma_direct_mapping_error(struct device *dev, dma_addr_t dma_addr) | 317 | int dma_direct_mapping_error(struct device *dev, dma_addr_t dma_addr) |
| @@ -199,7 +324,20 @@ const struct dma_map_ops dma_direct_ops = { | |||
| 199 | .free = dma_direct_free, | 324 | .free = dma_direct_free, |
| 200 | .map_page = dma_direct_map_page, | 325 | .map_page = dma_direct_map_page, |
| 201 | .map_sg = dma_direct_map_sg, | 326 | .map_sg = dma_direct_map_sg, |
| 327 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) | ||
| 328 | .sync_single_for_device = dma_direct_sync_single_for_device, | ||
| 329 | .sync_sg_for_device = dma_direct_sync_sg_for_device, | ||
| 330 | #endif | ||
| 331 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ | ||
| 332 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) | ||
| 333 | .sync_single_for_cpu = dma_direct_sync_single_for_cpu, | ||
| 334 | .sync_sg_for_cpu = dma_direct_sync_sg_for_cpu, | ||
| 335 | .unmap_page = dma_direct_unmap_page, | ||
| 336 | .unmap_sg = dma_direct_unmap_sg, | ||
| 337 | #endif | ||
| 338 | .get_required_mask = dma_direct_get_required_mask, | ||
| 202 | .dma_supported = dma_direct_supported, | 339 | .dma_supported = dma_direct_supported, |
| 203 | .mapping_error = dma_direct_mapping_error, | 340 | .mapping_error = dma_direct_mapping_error, |
| 341 | .cache_sync = arch_dma_cache_sync, | ||
| 204 | }; | 342 | }; |
| 205 | EXPORT_SYMBOL(dma_direct_ops); | 343 | EXPORT_SYMBOL(dma_direct_ops); |
diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c index d2a92ddaac4d..58dec7a92b7b 100644 --- a/kernel/dma/mapping.c +++ b/kernel/dma/mapping.c | |||
| @@ -7,7 +7,7 @@ | |||
| 7 | */ | 7 | */ |
| 8 | 8 | ||
| 9 | #include <linux/acpi.h> | 9 | #include <linux/acpi.h> |
| 10 | #include <linux/dma-mapping.h> | 10 | #include <linux/dma-noncoherent.h> |
| 11 | #include <linux/export.h> | 11 | #include <linux/export.h> |
| 12 | #include <linux/gfp.h> | 12 | #include <linux/gfp.h> |
| 13 | #include <linux/of_device.h> | 13 | #include <linux/of_device.h> |
| @@ -202,17 +202,26 @@ EXPORT_SYMBOL(dmam_release_declared_memory); | |||
| 202 | * Create scatter-list for the already allocated DMA buffer. | 202 | * Create scatter-list for the already allocated DMA buffer. |
| 203 | */ | 203 | */ |
| 204 | int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, | 204 | int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, |
| 205 | void *cpu_addr, dma_addr_t handle, size_t size) | 205 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 206 | unsigned long attrs) | ||
| 206 | { | 207 | { |
| 207 | struct page *page = virt_to_page(cpu_addr); | 208 | struct page *page; |
| 208 | int ret; | 209 | int ret; |
| 209 | 210 | ||
| 210 | ret = sg_alloc_table(sgt, 1, GFP_KERNEL); | 211 | if (!dev_is_dma_coherent(dev)) { |
| 211 | if (unlikely(ret)) | 212 | if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN)) |
| 212 | return ret; | 213 | return -ENXIO; |
| 213 | 214 | ||
| 214 | sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0); | 215 | page = pfn_to_page(arch_dma_coherent_to_pfn(dev, cpu_addr, |
| 215 | return 0; | 216 | dma_addr)); |
| 217 | } else { | ||
| 218 | page = virt_to_page(cpu_addr); | ||
| 219 | } | ||
| 220 | |||
| 221 | ret = sg_alloc_table(sgt, 1, GFP_KERNEL); | ||
| 222 | if (!ret) | ||
| 223 | sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0); | ||
| 224 | return ret; | ||
| 216 | } | 225 | } |
| 217 | EXPORT_SYMBOL(dma_common_get_sgtable); | 226 | EXPORT_SYMBOL(dma_common_get_sgtable); |
| 218 | 227 | ||
| @@ -220,27 +229,37 @@ EXPORT_SYMBOL(dma_common_get_sgtable); | |||
| 220 | * Create userspace mapping for the DMA-coherent memory. | 229 | * Create userspace mapping for the DMA-coherent memory. |
| 221 | */ | 230 | */ |
| 222 | int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, | 231 | int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, |
| 223 | void *cpu_addr, dma_addr_t dma_addr, size_t size) | 232 | void *cpu_addr, dma_addr_t dma_addr, size_t size, |
| 233 | unsigned long attrs) | ||
| 224 | { | 234 | { |
| 225 | int ret = -ENXIO; | ||
| 226 | #ifndef CONFIG_ARCH_NO_COHERENT_DMA_MMAP | 235 | #ifndef CONFIG_ARCH_NO_COHERENT_DMA_MMAP |
| 227 | unsigned long user_count = vma_pages(vma); | 236 | unsigned long user_count = vma_pages(vma); |
| 228 | unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; | 237 | unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; |
| 229 | unsigned long off = vma->vm_pgoff; | 238 | unsigned long off = vma->vm_pgoff; |
| 239 | unsigned long pfn; | ||
| 240 | int ret = -ENXIO; | ||
| 230 | 241 | ||
| 231 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | 242 | vma->vm_page_prot = arch_dma_mmap_pgprot(dev, vma->vm_page_prot, attrs); |
| 232 | 243 | ||
| 233 | if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret)) | 244 | if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret)) |
| 234 | return ret; | 245 | return ret; |
| 235 | 246 | ||
| 236 | if (off < count && user_count <= (count - off)) | 247 | if (off >= count || user_count > count - off) |
| 237 | ret = remap_pfn_range(vma, vma->vm_start, | 248 | return -ENXIO; |
| 238 | page_to_pfn(virt_to_page(cpu_addr)) + off, | ||
| 239 | user_count << PAGE_SHIFT, | ||
| 240 | vma->vm_page_prot); | ||
| 241 | #endif /* !CONFIG_ARCH_NO_COHERENT_DMA_MMAP */ | ||
| 242 | 249 | ||
| 243 | return ret; | 250 | if (!dev_is_dma_coherent(dev)) { |
| 251 | if (!IS_ENABLED(CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN)) | ||
| 252 | return -ENXIO; | ||
| 253 | pfn = arch_dma_coherent_to_pfn(dev, cpu_addr, dma_addr); | ||
| 254 | } else { | ||
| 255 | pfn = page_to_pfn(virt_to_page(cpu_addr)); | ||
| 256 | } | ||
| 257 | |||
| 258 | return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff, | ||
| 259 | user_count << PAGE_SHIFT, vma->vm_page_prot); | ||
| 260 | #else | ||
| 261 | return -ENXIO; | ||
| 262 | #endif /* !CONFIG_ARCH_NO_COHERENT_DMA_MMAP */ | ||
| 244 | } | 263 | } |
| 245 | EXPORT_SYMBOL(dma_common_mmap); | 264 | EXPORT_SYMBOL(dma_common_mmap); |
| 246 | 265 | ||
| @@ -327,19 +346,3 @@ void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags) | |||
| 327 | vunmap(cpu_addr); | 346 | vunmap(cpu_addr); |
| 328 | } | 347 | } |
| 329 | #endif | 348 | #endif |
| 330 | |||
| 331 | /* | ||
| 332 | * enables DMA API use for a device | ||
| 333 | */ | ||
| 334 | int dma_configure(struct device *dev) | ||
| 335 | { | ||
| 336 | if (dev->bus->dma_configure) | ||
| 337 | return dev->bus->dma_configure(dev); | ||
| 338 | return 0; | ||
| 339 | } | ||
| 340 | |||
| 341 | void dma_deconfigure(struct device *dev) | ||
| 342 | { | ||
| 343 | of_dma_deconfigure(dev); | ||
| 344 | acpi_dma_deconfigure(dev); | ||
| 345 | } | ||
diff --git a/kernel/dma/noncoherent.c b/kernel/dma/noncoherent.c deleted file mode 100644 index 031fe235d958..000000000000 --- a/kernel/dma/noncoherent.c +++ /dev/null | |||
| @@ -1,106 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | ||
| 2 | /* | ||
| 3 | * Copyright (C) 2018 Christoph Hellwig. | ||
| 4 | * | ||
| 5 | * DMA operations that map physical memory directly without providing cache | ||
| 6 | * coherence. | ||
| 7 | */ | ||
| 8 | #include <linux/export.h> | ||
| 9 | #include <linux/mm.h> | ||
| 10 | #include <linux/dma-direct.h> | ||
| 11 | #include <linux/dma-noncoherent.h> | ||
| 12 | #include <linux/scatterlist.h> | ||
| 13 | |||
| 14 | static void dma_noncoherent_sync_single_for_device(struct device *dev, | ||
| 15 | dma_addr_t addr, size_t size, enum dma_data_direction dir) | ||
| 16 | { | ||
| 17 | arch_sync_dma_for_device(dev, dma_to_phys(dev, addr), size, dir); | ||
| 18 | } | ||
| 19 | |||
| 20 | static void dma_noncoherent_sync_sg_for_device(struct device *dev, | ||
| 21 | struct scatterlist *sgl, int nents, enum dma_data_direction dir) | ||
| 22 | { | ||
| 23 | struct scatterlist *sg; | ||
| 24 | int i; | ||
| 25 | |||
| 26 | for_each_sg(sgl, sg, nents, i) | ||
| 27 | arch_sync_dma_for_device(dev, sg_phys(sg), sg->length, dir); | ||
| 28 | } | ||
| 29 | |||
| 30 | static dma_addr_t dma_noncoherent_map_page(struct device *dev, struct page *page, | ||
| 31 | unsigned long offset, size_t size, enum dma_data_direction dir, | ||
| 32 | unsigned long attrs) | ||
| 33 | { | ||
| 34 | dma_addr_t addr; | ||
| 35 | |||
| 36 | addr = dma_direct_map_page(dev, page, offset, size, dir, attrs); | ||
| 37 | if (!dma_mapping_error(dev, addr) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 38 | arch_sync_dma_for_device(dev, page_to_phys(page) + offset, | ||
| 39 | size, dir); | ||
| 40 | return addr; | ||
| 41 | } | ||
| 42 | |||
| 43 | static int dma_noncoherent_map_sg(struct device *dev, struct scatterlist *sgl, | ||
| 44 | int nents, enum dma_data_direction dir, unsigned long attrs) | ||
| 45 | { | ||
| 46 | nents = dma_direct_map_sg(dev, sgl, nents, dir, attrs); | ||
| 47 | if (nents > 0 && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 48 | dma_noncoherent_sync_sg_for_device(dev, sgl, nents, dir); | ||
| 49 | return nents; | ||
| 50 | } | ||
| 51 | |||
| 52 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ | ||
| 53 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) | ||
| 54 | static void dma_noncoherent_sync_single_for_cpu(struct device *dev, | ||
| 55 | dma_addr_t addr, size_t size, enum dma_data_direction dir) | ||
| 56 | { | ||
| 57 | arch_sync_dma_for_cpu(dev, dma_to_phys(dev, addr), size, dir); | ||
| 58 | arch_sync_dma_for_cpu_all(dev); | ||
| 59 | } | ||
| 60 | |||
| 61 | static void dma_noncoherent_sync_sg_for_cpu(struct device *dev, | ||
| 62 | struct scatterlist *sgl, int nents, enum dma_data_direction dir) | ||
| 63 | { | ||
| 64 | struct scatterlist *sg; | ||
| 65 | int i; | ||
| 66 | |||
| 67 | for_each_sg(sgl, sg, nents, i) | ||
| 68 | arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir); | ||
| 69 | arch_sync_dma_for_cpu_all(dev); | ||
| 70 | } | ||
| 71 | |||
| 72 | static void dma_noncoherent_unmap_page(struct device *dev, dma_addr_t addr, | ||
| 73 | size_t size, enum dma_data_direction dir, unsigned long attrs) | ||
| 74 | { | ||
| 75 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 76 | dma_noncoherent_sync_single_for_cpu(dev, addr, size, dir); | ||
| 77 | } | ||
| 78 | |||
| 79 | static void dma_noncoherent_unmap_sg(struct device *dev, struct scatterlist *sgl, | ||
| 80 | int nents, enum dma_data_direction dir, unsigned long attrs) | ||
| 81 | { | ||
| 82 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) | ||
| 83 | dma_noncoherent_sync_sg_for_cpu(dev, sgl, nents, dir); | ||
| 84 | } | ||
| 85 | #endif | ||
| 86 | |||
| 87 | const struct dma_map_ops dma_noncoherent_ops = { | ||
| 88 | .alloc = arch_dma_alloc, | ||
| 89 | .free = arch_dma_free, | ||
| 90 | .mmap = arch_dma_mmap, | ||
| 91 | .sync_single_for_device = dma_noncoherent_sync_single_for_device, | ||
| 92 | .sync_sg_for_device = dma_noncoherent_sync_sg_for_device, | ||
| 93 | .map_page = dma_noncoherent_map_page, | ||
| 94 | .map_sg = dma_noncoherent_map_sg, | ||
| 95 | #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ | ||
| 96 | defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) | ||
| 97 | .sync_single_for_cpu = dma_noncoherent_sync_single_for_cpu, | ||
| 98 | .sync_sg_for_cpu = dma_noncoherent_sync_sg_for_cpu, | ||
| 99 | .unmap_page = dma_noncoherent_unmap_page, | ||
| 100 | .unmap_sg = dma_noncoherent_unmap_sg, | ||
| 101 | #endif | ||
| 102 | .dma_supported = dma_direct_supported, | ||
| 103 | .mapping_error = dma_direct_mapping_error, | ||
| 104 | .cache_sync = arch_dma_cache_sync, | ||
| 105 | }; | ||
| 106 | EXPORT_SYMBOL(dma_noncoherent_ops); | ||
