1 files changed, 167 insertions, 0 deletions
diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h
new file mode 100644
index 000000000000..fc9e2d6e5e2f
--- /dev/null
+++ b/include/uapi/drm/virtgpu_drm.h
@@ -0,0 +1,167 @@
+/*
+ * Copyright 2013 Red Hat
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#ifndef VIRTGPU_DRM_H
+#define VIRTGPU_DRM_H
+#include <stddef.h>
+#include "drm/drm.h"
+/* Please note that modifications to all structs defined here are
+ * subject to backwards-compatibility constraints.
+ *
+ * Do not use pointers, use uint64_t instead for 32 bit / 64 bit user/kernel
+ * compatibility Keep fields aligned to their size
+ */
+#define DRM_VIRTGPU_MAP         0x01
+#define DRM_VIRTGPU_EXECBUFFER  0x02
+#define DRM_VIRTGPU_GETPARAM    0x03
+#define DRM_VIRTGPU_RESOURCE_CREATE 0x04
+#define DRM_VIRTGPU_RESOURCE_INFO     0x05
+#define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x06
+#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
+#define DRM_VIRTGPU_WAIT     0x08
+#define DRM_VIRTGPU_GET_CAPS  0x09
+struct drm_virtgpu_map {
+        uint64_t offset; /* use for mmap system call */
+        uint32_t handle;
+        uint32_t pad;
+};
+struct drm_virtgpu_execbuffer {
+        uint32_t                flags;          /* for future use */
+        uint32_t size;
+        uint64_t command; /* void* */
+        uint64_t bo_handles;
+        uint32_t num_bo_handles;
+        uint32_t pad;
+};
+#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
+struct drm_virtgpu_getparam {
+        uint64_t param;
+        uint64_t value;
+};
+/* NO_BO flags? NO resource flag? */
+/* resource flag for y_0_top */
+struct drm_virtgpu_resource_create {
+        uint32_t target;
+        uint32_t format;
+        uint32_t bind;
+        uint32_t width;
+        uint32_t height;
+        uint32_t depth;
+        uint32_t array_size;
+        uint32_t last_level;
+        uint32_t nr_samples;
+        uint32_t flags;
+        uint32_t bo_handle; /* if this is set - recreate a new resource attached to this bo ? */
+        uint32_t res_handle;  /* returned by kernel */
+        uint32_t size;        /* validate transfer in the host */
+        uint32_t stride;      /* validate transfer in the host */
+};
+struct drm_virtgpu_resource_info {
+        uint32_t bo_handle;
+        uint32_t res_handle;
+        uint32_t size;
+        uint32_t stride;
+};
+struct drm_virtgpu_3d_box {
+        uint32_t x;
+        uint32_t y;
+        uint32_t z;
+        uint32_t w;
+        uint32_t h;
+        uint32_t d;
+};
+struct drm_virtgpu_3d_transfer_to_host {
+        uint32_t bo_handle;
+        struct drm_virtgpu_3d_box box;
+        uint32_t level;
+        uint32_t offset;
+};
+struct drm_virtgpu_3d_transfer_from_host {
+        uint32_t bo_handle;
+        struct drm_virtgpu_3d_box box;
+        uint32_t level;
+        uint32_t offset;
+};
+#define VIRTGPU_WAIT_NOWAIT 1 /* like it */
+struct drm_virtgpu_3d_wait {
+        uint32_t handle; /* 0 is an invalid handle */
+        uint32_t flags;
+};
+struct drm_virtgpu_get_caps {
+        uint32_t cap_set_id;
+        uint32_t cap_set_ver;
+        uint64_t addr;
+        uint32_t size;
+        uint32_t pad;
+};
+#define DRM_IOCTL_VIRTGPU_MAP \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
+#define DRM_IOCTL_VIRTGPU_EXECBUFFER \
+        DRM_IOW(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
+                struct drm_virtgpu_execbuffer)
+#define DRM_IOCTL_VIRTGPU_GETPARAM \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GETPARAM,\
+                struct drm_virtgpu_getparam)
+#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE                       \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE,        \
+                struct drm_virtgpu_resource_create)
+#define DRM_IOCTL_VIRTGPU_RESOURCE_INFO \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_INFO, \
+                 struct drm_virtgpu_resource_info)
+#define DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_FROM_HOST,     \
+                struct drm_virtgpu_3d_transfer_from_host)
+#define DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_TO_HOST,       \
+                struct drm_virtgpu_3d_transfer_to_host)
+#define DRM_IOCTL_VIRTGPU_WAIT                          \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_WAIT,   \
+                struct drm_virtgpu_3d_wait)
+#define DRM_IOCTL_VIRTGPU_GET_CAPS \
+        DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
+        struct drm_virtgpu_get_caps)
+#endif

diff --git a/include/uapi/drm/virtgpu_drm.h b/include/uapi/drm/virtgpu_drm.h new file mode 100644 index 000000000000..fc9e2d6e5e2f --- /dev/null +++ b/include/uapi/drm/virtgpu_drm.h
@@ -0,0 +1,167 @@
	1	/*
	2	* Copyright 2013 Red Hat
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*/
	24	#ifndef VIRTGPU_DRM_H
	25	#define VIRTGPU_DRM_H
	26
	27	#include <stddef.h>
	28	#include "drm/drm.h"
	29
	30	/* Please note that modifications to all structs defined here are
	31	* subject to backwards-compatibility constraints.
	32	*
	33	* Do not use pointers, use uint64_t instead for 32 bit / 64 bit user/kernel
	34	* compatibility Keep fields aligned to their size
	35	*/
	36
	37	#define DRM_VIRTGPU_MAP 0x01
	38	#define DRM_VIRTGPU_EXECBUFFER 0x02
	39	#define DRM_VIRTGPU_GETPARAM 0x03
	40	#define DRM_VIRTGPU_RESOURCE_CREATE 0x04
	41	#define DRM_VIRTGPU_RESOURCE_INFO 0x05
	42	#define DRM_VIRTGPU_TRANSFER_FROM_HOST 0x06
	43	#define DRM_VIRTGPU_TRANSFER_TO_HOST 0x07
	44	#define DRM_VIRTGPU_WAIT 0x08
	45	#define DRM_VIRTGPU_GET_CAPS 0x09
	46
	47	struct drm_virtgpu_map {
	48	uint64_t offset; /* use for mmap system call */
	49	uint32_t handle;
	50	uint32_t pad;
	51	};
	52
	53	struct drm_virtgpu_execbuffer {
	54	uint32_t flags; /* for future use */
	55	uint32_t size;
	56	uint64_t command; /* void* */
	57	uint64_t bo_handles;
	58	uint32_t num_bo_handles;
	59	uint32_t pad;
	60	};
	61
	62	#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
	63
	64	struct drm_virtgpu_getparam {
	65	uint64_t param;
	66	uint64_t value;
	67	};
	68
	69	/* NO_BO flags? NO resource flag? */
	70	/* resource flag for y_0_top */
	71	struct drm_virtgpu_resource_create {
	72	uint32_t target;
	73	uint32_t format;
	74	uint32_t bind;
	75	uint32_t width;
	76	uint32_t height;
	77	uint32_t depth;
	78	uint32_t array_size;
	79	uint32_t last_level;
	80	uint32_t nr_samples;
	81	uint32_t flags;
	82	uint32_t bo_handle; /* if this is set - recreate a new resource attached to this bo ? */
	83	uint32_t res_handle; /* returned by kernel */
	84	uint32_t size; /* validate transfer in the host */
	85	uint32_t stride; /* validate transfer in the host */
	86	};
	87
	88	struct drm_virtgpu_resource_info {
	89	uint32_t bo_handle;
	90	uint32_t res_handle;
	91	uint32_t size;
	92	uint32_t stride;
	93	};
	94
	95	struct drm_virtgpu_3d_box {
	96	uint32_t x;
	97	uint32_t y;
	98	uint32_t z;
	99	uint32_t w;
	100	uint32_t h;
	101	uint32_t d;
	102	};
	103
	104	struct drm_virtgpu_3d_transfer_to_host {
	105	uint32_t bo_handle;
	106	struct drm_virtgpu_3d_box box;
	107	uint32_t level;
	108	uint32_t offset;
	109	};
	110
	111	struct drm_virtgpu_3d_transfer_from_host {
	112	uint32_t bo_handle;
	113	struct drm_virtgpu_3d_box box;
	114	uint32_t level;
	115	uint32_t offset;
	116	};
	117
	118	#define VIRTGPU_WAIT_NOWAIT 1 /* like it */
	119	struct drm_virtgpu_3d_wait {
	120	uint32_t handle; /* 0 is an invalid handle */
	121	uint32_t flags;
	122	};
	123
	124	struct drm_virtgpu_get_caps {
	125	uint32_t cap_set_id;
	126	uint32_t cap_set_ver;
	127	uint64_t addr;
	128	uint32_t size;
	129	uint32_t pad;
	130	};
	131
	132	#define DRM_IOCTL_VIRTGPU_MAP \
	133	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
	134
	135	#define DRM_IOCTL_VIRTGPU_EXECBUFFER \
	136	DRM_IOW(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
	137	struct drm_virtgpu_execbuffer)
	138
	139	#define DRM_IOCTL_VIRTGPU_GETPARAM \
	140	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GETPARAM,\
	141	struct drm_virtgpu_getparam)
	142
	143	#define DRM_IOCTL_VIRTGPU_RESOURCE_CREATE \
	144	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_CREATE, \
	145	struct drm_virtgpu_resource_create)
	146
	147	#define DRM_IOCTL_VIRTGPU_RESOURCE_INFO \
	148	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_RESOURCE_INFO, \
	149	struct drm_virtgpu_resource_info)
	150
	151	#define DRM_IOCTL_VIRTGPU_TRANSFER_FROM_HOST \
	152	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_FROM_HOST, \
	153	struct drm_virtgpu_3d_transfer_from_host)
	154
	155	#define DRM_IOCTL_VIRTGPU_TRANSFER_TO_HOST \
	156	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_TRANSFER_TO_HOST, \
	157	struct drm_virtgpu_3d_transfer_to_host)
	158
	159	#define DRM_IOCTL_VIRTGPU_WAIT \
	160	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_WAIT, \
	161	struct drm_virtgpu_3d_wait)
	162
	163	#define DRM_IOCTL_VIRTGPU_GET_CAPS \
	164	DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
	165	struct drm_virtgpu_get_caps)
	166
	167	#endif