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-rw-r--r--include/linux/amba/clcd.h63
1 files changed, 60 insertions, 3 deletions
diff --git a/include/linux/amba/clcd.h b/include/linux/amba/clcd.h
index e82e3ee2c54a..1035879b322c 100644
--- a/include/linux/amba/clcd.h
+++ b/include/linux/amba/clcd.h
@@ -67,6 +67,17 @@
67#define CNTL_LDMAFIFOTIME (1 << 15) 67#define CNTL_LDMAFIFOTIME (1 << 15)
68#define CNTL_WATERMARK (1 << 16) 68#define CNTL_WATERMARK (1 << 16)
69 69
70/* ST Microelectronics variant bits */
71#define CNTL_ST_1XBPP_444 0x0
72#define CNTL_ST_1XBPP_5551 (1 << 17)
73#define CNTL_ST_1XBPP_565 (1 << 18)
74#define CNTL_ST_CDWID_12 0x0
75#define CNTL_ST_CDWID_16 (1 << 19)
76#define CNTL_ST_CDWID_18 (1 << 20)
77#define CNTL_ST_CDWID_24 ((1 << 19)|(1 << 20))
78#define CNTL_ST_CEAEN (1 << 21)
79#define CNTL_ST_LCDBPP24_PACKED (6 << 1)
80
70enum { 81enum {
71 /* individual formats */ 82 /* individual formats */
72 CLCD_CAP_RGB444 = (1 << 0), 83 CLCD_CAP_RGB444 = (1 << 0),
@@ -93,6 +104,8 @@ enum {
93 CLCD_CAP_ALL = CLCD_CAP_BGR | CLCD_CAP_RGB, 104 CLCD_CAP_ALL = CLCD_CAP_BGR | CLCD_CAP_RGB,
94}; 105};
95 106
107struct backlight_device;
108
96struct clcd_panel { 109struct clcd_panel {
97 struct fb_videomode mode; 110 struct fb_videomode mode;
98 signed short width; /* width in mm */ 111 signed short width; /* width in mm */
@@ -105,6 +118,13 @@ struct clcd_panel {
105 fixedtimings:1, 118 fixedtimings:1,
106 grayscale:1; 119 grayscale:1;
107 unsigned int connector; 120 unsigned int connector;
121 struct backlight_device *backlight;
122 /*
123 * If the B/R lines are switched between the CLCD
124 * and the panel we need to know this and not try to
125 * compensate with the BGR bit in the control register.
126 */
127 bool bgr_connection;
108}; 128};
109 129
110struct clcd_regs { 130struct clcd_regs {
@@ -170,11 +190,38 @@ struct clcd_board {
170struct amba_device; 190struct amba_device;
171struct clk; 191struct clk;
172 192
193/**
194 * struct clcd_vendor_data - holds hardware (IP-block) vendor-specific
195 * variant information
196 *
197 * @clock_timregs: the CLCD needs to be clocked when accessing the
198 * timer registers, or the hardware will hang.
199 * @packed_24_bit_pixels: this variant supports 24bit packed pixel data,
200 * so that RGB accesses 3 bytes at a time, not just on even 32bit
201 * boundaries, packing the pixel data in memory. ST Microelectronics
202 * have this.
203 * @st_bitmux_control: ST Microelectronics have implemented output
204 * bit line multiplexing into the CLCD control register. This indicates
205 * that we need to use this.
206 * @init_board: custom board init function for this variant
207 * @init_panel: custom panel init function for this variant
208 */
209struct clcd_vendor_data {
210 bool clock_timregs;
211 bool packed_24_bit_pixels;
212 bool st_bitmux_control;
213 int (*init_board)(struct amba_device *adev,
214 struct clcd_board *board);
215 int (*init_panel)(struct clcd_fb *fb,
216 struct device_node *panel);
217};
218
173/* this data structure describes each frame buffer device we find */ 219/* this data structure describes each frame buffer device we find */
174struct clcd_fb { 220struct clcd_fb {
175 struct fb_info fb; 221 struct fb_info fb;
176 struct amba_device *dev; 222 struct amba_device *dev;
177 struct clk *clk; 223 struct clk *clk;
224 struct clcd_vendor_data *vendor;
178 struct clcd_panel *panel; 225 struct clcd_panel *panel;
179 struct clcd_board *board; 226 struct clcd_board *board;
180 void *board_data; 227 void *board_data;
@@ -231,16 +278,22 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
231 if (var->grayscale) 278 if (var->grayscale)
232 val |= CNTL_LCDBW; 279 val |= CNTL_LCDBW;
233 280
234 if (fb->panel->caps && fb->board->caps && 281 if (fb->panel->caps && fb->board->caps && var->bits_per_pixel >= 16) {
235 var->bits_per_pixel >= 16) {
236 /* 282 /*
237 * if board and panel supply capabilities, we can support 283 * if board and panel supply capabilities, we can support
238 * changing BGR/RGB depending on supplied parameters 284 * changing BGR/RGB depending on supplied parameters. Here
285 * we switch to what the framebuffer is providing if need
286 * be, so if the framebuffer is BGR but the display connection
287 * is RGB (first case) we switch it around. Vice versa mutatis
288 * mutandis if the framebuffer is RGB but the display connection
289 * is BGR, we flip it around.
239 */ 290 */
240 if (var->red.offset == 0) 291 if (var->red.offset == 0)
241 val &= ~CNTL_BGR; 292 val &= ~CNTL_BGR;
242 else 293 else
243 val |= CNTL_BGR; 294 val |= CNTL_BGR;
295 if (fb->panel->bgr_connection)
296 val ^= CNTL_BGR;
244 } 297 }
245 298
246 switch (var->bits_per_pixel) { 299 switch (var->bits_per_pixel) {
@@ -270,6 +323,10 @@ static inline void clcdfb_decode(struct clcd_fb *fb, struct clcd_regs *regs)
270 else 323 else
271 val |= CNTL_LCDBPP16_444; 324 val |= CNTL_LCDBPP16_444;
272 break; 325 break;
326 case 24:
327 /* Modified variant supporting 24 bit packed pixels */
328 val |= CNTL_ST_LCDBPP24_PACKED;
329 break;
273 case 32: 330 case 32:
274 val |= CNTL_LCDBPP24; 331 val |= CNTL_LCDBPP24;
275 break; 332 break;