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-rw-r--r--include/linux/platform_data/asoc-mx27vis.h11
-rw-r--r--include/linux/platform_data/asoc-ti-mcbsp.h2
-rw-r--r--include/linux/platform_data/davinci_asp.h105
-rw-r--r--include/linux/platform_data/exynos_thermal.h (renamed from include/linux/platform_data/exynos4_tmu.h)47
-rw-r--r--include/linux/platform_data/i2c-nomadik.h2
-rw-r--r--include/linux/platform_data/leds-lm3556.h50
-rw-r--r--include/linux/platform_data/leds-lm355x.h66
-rw-r--r--include/linux/platform_data/leds-lm3642.h38
-rw-r--r--include/linux/platform_data/leds-pca9633.h35
-rw-r--r--include/linux/platform_data/lm3630_bl.h57
-rw-r--r--include/linux/platform_data/lm3639_bl.h69
-rw-r--r--include/linux/platform_data/lp855x.h2
-rw-r--r--include/linux/platform_data/lp8727.h51
-rw-r--r--include/linux/platform_data/mipi-csis.h30
-rw-r--r--include/linux/platform_data/mmp_dma.h19
-rw-r--r--include/linux/platform_data/omap-twl4030.h32
-rw-r--r--include/linux/platform_data/pxa_sdhci.h1
17 files changed, 515 insertions, 102 deletions
diff --git a/include/linux/platform_data/asoc-mx27vis.h b/include/linux/platform_data/asoc-mx27vis.h
new file mode 100644
index 000000000000..409adcd04d04
--- /dev/null
+++ b/include/linux/platform_data/asoc-mx27vis.h
@@ -0,0 +1,11 @@
1#ifndef __PLATFORM_DATA_ASOC_MX27VIS_H
2#define __PLATFORM_DATA_ASOC_MX27VIS_H
3
4struct snd_mx27vis_platform_data {
5 int amp_gain0_gpio;
6 int amp_gain1_gpio;
7 int amp_mutel_gpio;
8 int amp_muter_gpio;
9};
10
11#endif /* __PLATFORM_DATA_ASOC_MX27VIS_H */
diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h
index 18814127809a..c78d90b28b19 100644
--- a/include/linux/platform_data/asoc-ti-mcbsp.h
+++ b/include/linux/platform_data/asoc-ti-mcbsp.h
@@ -47,8 +47,6 @@ struct omap_mcbsp_platform_data {
47 bool has_wakeup; /* Wakeup capability */ 47 bool has_wakeup; /* Wakeup capability */
48 bool has_ccr; /* Transceiver has configuration control registers */ 48 bool has_ccr; /* Transceiver has configuration control registers */
49 int (*enable_st_clock)(unsigned int, bool); 49 int (*enable_st_clock)(unsigned int, bool);
50 int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src);
51 int (*mux_signal)(struct device *dev, const char *signal, const char *src);
52}; 50};
53 51
54/** 52/**
diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h
new file mode 100644
index 000000000000..d0c5825876f8
--- /dev/null
+++ b/include/linux/platform_data/davinci_asp.h
@@ -0,0 +1,105 @@
1/*
2 * TI DaVinci Audio Serial Port support
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __DAVINCI_ASP_H
17#define __DAVINCI_ASP_H
18
19struct snd_platform_data {
20 u32 tx_dma_offset;
21 u32 rx_dma_offset;
22 int asp_chan_q; /* event queue number for ASP channel */
23 int ram_chan_q; /* event queue number for RAM channel */
24 unsigned int codec_fmt;
25 /*
26 * Allowing this is more efficient and eliminates left and right swaps
27 * caused by underruns, but will swap the left and right channels
28 * when compared to previous behavior.
29 */
30 unsigned enable_channel_combine:1;
31 unsigned sram_size_playback;
32 unsigned sram_size_capture;
33
34 /*
35 * If McBSP peripheral gets the clock from an external pin,
36 * there are three chooses, that are MCBSP_CLKX, MCBSP_CLKR
37 * and MCBSP_CLKS.
38 * Depending on different hardware connections it is possible
39 * to use this setting to change the behaviour of McBSP
40 * driver.
41 */
42 int clk_input_pin;
43
44 /*
45 * This flag works when both clock and FS are outputs for the cpu
46 * and makes clock more accurate (FS is not symmetrical and the
47 * clock is very fast.
48 * The clock becoming faster is named
49 * i2s continuous serial clock (I2S_SCK) and it is an externally
50 * visible bit clock.
51 *
52 * first line : WordSelect
53 * second line : ContinuousSerialClock
54 * third line: SerialData
55 *
56 * SYMMETRICAL APPROACH:
57 * _______________________ LEFT
58 * _| RIGHT |______________________|
59 * _ _ _ _ _ _ _ _
60 * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_
61 * _ _ _ _ _ _ _ _
62 * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_
63 * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/
64 *
65 * ACCURATE CLOCK APPROACH:
66 * ______________ LEFT
67 * _| RIGHT |_______________________________|
68 * _ _ _ _ _ _ _ _ _
69 * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| |
70 * _ _ _ _ dummy cycles
71 * _/ \_ ... _/ \_/ \_ ... _/ \__________________
72 * \_/ \_/ \_/ \_/
73 *
74 */
75 bool i2s_accurate_sck;
76
77 /* McASP specific fields */
78 int tdm_slots;
79 u8 op_mode;
80 u8 num_serializer;
81 u8 *serial_dir;
82 u8 version;
83 u8 txnumevt;
84 u8 rxnumevt;
85};
86
87enum {
88 MCASP_VERSION_1 = 0, /* DM646x */
89 MCASP_VERSION_2, /* DA8xx/OMAPL1x */
90 MCASP_VERSION_3, /* TI81xx/AM33xx */
91};
92
93enum mcbsp_clk_input_pin {
94 MCBSP_CLKR = 0, /* as in DM365 */
95 MCBSP_CLKS,
96};
97
98#define INACTIVE_MODE 0
99#define TX_MODE 1
100#define RX_MODE 2
101
102#define DAVINCI_MCASP_IIS_MODE 0
103#define DAVINCI_MCASP_DIT_MODE 1
104
105#endif
diff --git a/include/linux/platform_data/exynos4_tmu.h b/include/linux/platform_data/exynos_thermal.h
index 39e038cca590..a7bdb2f63b73 100644
--- a/include/linux/platform_data/exynos4_tmu.h
+++ b/include/linux/platform_data/exynos_thermal.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * exynos4_tmu.h - Samsung EXYNOS4 TMU (Thermal Management Unit) 2 * exynos_thermal.h - Samsung EXYNOS TMU (Thermal Management Unit)
3 * 3 *
4 * Copyright (C) 2011 Samsung Electronics 4 * Copyright (C) 2011 Samsung Electronics
5 * Donggeun Kim <dg77.kim@samsung.com> 5 * Donggeun Kim <dg77.kim@samsung.com>
@@ -19,8 +19,9 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 21
22#ifndef _LINUX_EXYNOS4_TMU_H 22#ifndef _LINUX_EXYNOS_THERMAL_H
23#define _LINUX_EXYNOS4_TMU_H 23#define _LINUX_EXYNOS_THERMAL_H
24#include <linux/cpu_cooling.h>
24 25
25enum calibration_type { 26enum calibration_type {
26 TYPE_ONE_POINT_TRIMMING, 27 TYPE_ONE_POINT_TRIMMING,
@@ -28,8 +29,28 @@ enum calibration_type {
28 TYPE_NONE, 29 TYPE_NONE,
29}; 30};
30 31
32enum soc_type {
33 SOC_ARCH_EXYNOS4210 = 1,
34 SOC_ARCH_EXYNOS,
35};
36/**
37 * struct freq_clip_table
38 * @freq_clip_max: maximum frequency allowed for this cooling state.
39 * @temp_level: Temperature level at which the temperature clipping will
40 * happen.
41 * @mask_val: cpumask of the allowed cpu's where the clipping will take place.
42 *
43 * This structure is required to be filled and passed to the
44 * cpufreq_cooling_unregister function.
45 */
46struct freq_clip_table {
47 unsigned int freq_clip_max;