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-rw-r--r--include/linux/platform_data/ad5449.h40
-rw-r--r--include/linux/platform_data/ad7298.h20
-rw-r--r--include/linux/platform_data/ad7793.h112
-rw-r--r--include/linux/platform_data/ad7887.h26
-rw-r--r--include/linux/platform_data/ads7828.h29
-rw-r--r--include/linux/platform_data/asoc-imx-ssi.h2
-rw-r--r--include/linux/platform_data/asoc-s3c.h6
-rw-r--r--include/linux/platform_data/atmel.h73
-rw-r--r--include/linux/platform_data/clk-integrator.h2
-rw-r--r--include/linux/platform_data/clocksource-nomadik-mtu.h9
-rw-r--r--include/linux/platform_data/cpsw.h23
-rw-r--r--include/linux/platform_data/crypto-ux500.h2
-rw-r--r--include/linux/platform_data/davinci_asp.h4
-rw-r--r--include/linux/platform_data/db8500_thermal.h38
-rw-r--r--include/linux/platform_data/dma-imx.h4
-rw-r--r--include/linux/platform_data/dma-mv_xor.h11
-rw-r--r--include/linux/platform_data/dma-ste-dma40.h223
-rw-r--r--include/linux/platform_data/dmtimer-omap.h31
-rw-r--r--include/linux/platform_data/gpio-omap.h1
-rw-r--r--include/linux/platform_data/gpio-ts5500.h27
-rw-r--r--include/linux/platform_data/i2c-cbus-gpio.h27
-rw-r--r--include/linux/platform_data/iommu-omap.h54
-rw-r--r--include/linux/platform_data/leds-omap.h22
-rw-r--r--include/linux/platform_data/lp855x.h9
-rw-r--r--include/linux/platform_data/macb.h1
-rw-r--r--include/linux/platform_data/mmc-omap.h151
-rw-r--r--include/linux/platform_data/mtd-nand-omap2.h46
-rw-r--r--include/linux/platform_data/mtd-nomadik-nand.h16
-rw-r--r--include/linux/platform_data/mtd-onenand-omap2.h28
-rw-r--r--include/linux/platform_data/omap-twl4030.h26
-rw-r--r--include/linux/platform_data/omap-wd-timer.h38
-rw-r--r--include/linux/platform_data/omap_drm.h1
-rw-r--r--include/linux/platform_data/omap_ocp2scp.h31
-rw-r--r--include/linux/platform_data/pinctrl-coh901.h4
-rw-r--r--include/linux/platform_data/pinctrl-nomadik.h266
-rw-r--r--include/linux/platform_data/pn544.h44
-rw-r--r--include/linux/platform_data/pxa2xx_udc.h27
-rw-r--r--include/linux/platform_data/pxa_sdhci.h6
-rw-r--r--include/linux/platform_data/sa11x0-serial.h33
-rw-r--r--include/linux/platform_data/serial-omap.h51
-rw-r--r--include/linux/platform_data/spi-clps711x.h21
-rw-r--r--include/linux/platform_data/spi-omap2-mcspi.h4
-rw-r--r--include/linux/platform_data/ti_am335x_adc.h14
-rw-r--r--include/linux/platform_data/uio_dmem_genirq.h26
-rw-r--r--include/linux/platform_data/uio_pruss.h3
-rw-r--r--include/linux/platform_data/usb-omap.h83
46 files changed, 1614 insertions, 101 deletions
diff --git a/include/linux/platform_data/ad5449.h b/include/linux/platform_data/ad5449.h
new file mode 100644
index 000000000000..bd712bd4b94e
--- /dev/null
+++ b/include/linux/platform_data/ad5449.h
@@ -0,0 +1,40 @@
1/*
2 * AD5415, AD5426, AD5429, AD5432, AD5439, AD5443, AD5449 Digital to Analog
3 * Converter driver.
4 *
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 *
8 * Licensed under the GPL-2.
9 */
10
11#ifndef __LINUX_PLATFORM_DATA_AD5449_H__
12#define __LINUX_PLATFORM_DATA_AD5449_H__
13
14/**
15 * enum ad5449_sdo_mode - AD5449 SDO pin configuration
16 * @AD5449_SDO_DRIVE_FULL: Drive the SDO pin with full strength.
17 * @AD5449_SDO_DRIVE_WEAK: Drive the SDO pin with not full strength.
18 * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode.
19 * @AD5449_SDO_DISABLED: Disable the SDO pin, in this mode it is not possible to
20 * read back from the device.
21 */
22enum ad5449_sdo_mode {
23 AD5449_SDO_DRIVE_FULL = 0x0,
24 AD5449_SDO_DRIVE_WEAK = 0x1,
25 AD5449_SDO_OPEN_DRAIN = 0x2,
26 AD5449_SDO_DISABLED = 0x3,
27};
28
29/**
30 * struct ad5449_platform_data - Platform data for the ad5449 DAC driver
31 * @sdo_mode: SDO pin mode
32 * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the
33 * outputs to midscale (true) or to zero scale(false).
34 */
35struct ad5449_platform_data {
36 enum ad5449_sdo_mode sdo_mode;
37 bool hardware_clear_to_midscale;
38};
39
40#endif
diff --git a/include/linux/platform_data/ad7298.h b/include/linux/platform_data/ad7298.h
new file mode 100644
index 000000000000..fbf8adf1363a
--- /dev/null
+++ b/include/linux/platform_data/ad7298.h
@@ -0,0 +1,20 @@
1/*
2 * AD7298 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#ifndef __LINUX_PLATFORM_DATA_AD7298_H__
10#define __LINUX_PLATFORM_DATA_AD7298_H__
11
12/**
13 * struct ad7298_platform_data - Platform data for the ad7298 ADC driver
14 * @ext_ref: Whether to use an external reference voltage.
15 **/
16struct ad7298_platform_data {
17 bool ext_ref;
18};
19
20#endif /* IIO_ADC_AD7298_H_ */
diff --git a/include/linux/platform_data/ad7793.h b/include/linux/platform_data/ad7793.h
new file mode 100644
index 000000000000..7ea6751aae6d
--- /dev/null
+++ b/include/linux/platform_data/ad7793.h
@@ -0,0 +1,112 @@
1/*
2 * AD7792/AD7793 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8#ifndef __LINUX_PLATFORM_DATA_AD7793_H__
9#define __LINUX_PLATFORM_DATA_AD7793_H__
10
11/**
12 * enum ad7793_clock_source - AD7793 clock source selection
13 * @AD7793_CLK_SRC_INT: Internal 64 kHz clock, not available at the CLK pin.
14 * @AD7793_CLK_SRC_INT_CO: Internal 64 kHz clock, available at the CLK pin.
15 * @AD7793_CLK_SRC_EXT: Use external clock.
16 * @AD7793_CLK_SRC_EXT_DIV2: Use external clock divided by 2.
17 */
18enum ad7793_clock_source {
19 AD7793_CLK_SRC_INT,
20 AD7793_CLK_SRC_INT_CO,
21 AD7793_CLK_SRC_EXT,
22 AD7793_CLK_SRC_EXT_DIV2,
23};
24
25/**
26 * enum ad7793_bias_voltage - AD7793 bias voltage selection
27 * @AD7793_BIAS_VOLTAGE_DISABLED: Bias voltage generator disabled
28 * @AD7793_BIAS_VOLTAGE_AIN1: Bias voltage connected to AIN1(-).
29 * @AD7793_BIAS_VOLTAGE_AIN2: Bias voltage connected to AIN2(-).
30 * @AD7793_BIAS_VOLTAGE_AIN3: Bias voltage connected to AIN3(-).
31 * Only valid for AD7795/AD7796.
32 */
33enum ad7793_bias_voltage {
34 AD7793_BIAS_VOLTAGE_DISABLED,
35 AD7793_BIAS_VOLTAGE_AIN1,
36 AD7793_BIAS_VOLTAGE_AIN2,
37 AD7793_BIAS_VOLTAGE_AIN3,
38};
39
40/**
41 * enum ad7793_refsel - AD7793 reference voltage selection
42 * @AD7793_REFSEL_REFIN1: External reference applied between REFIN1(+)
43 * and REFIN1(-).
44 * @AD7793_REFSEL_REFIN2: External reference applied between REFIN2(+) and
45 * and REFIN1(-). Only valid for AD7795/AD7796.
46 * @AD7793_REFSEL_INTERNAL: Internal 1.17 V reference.
47 */
48enum ad7793_refsel {
49 AD7793_REFSEL_REFIN1 = 0,
50 AD7793_REFSEL_REFIN2 = 1,
51 AD7793_REFSEL_INTERNAL = 2,
52};
53
54/**
55 * enum ad7793_current_source_direction - AD7793 excitation current direction
56 * @AD7793_IEXEC1_IOUT1_IEXEC2_IOUT2: Current source IEXC1 connected to pin
57 * IOUT1, current source IEXC2 connected to pin IOUT2.
58 * @AD7793_IEXEC1_IOUT2_IEXEC2_IOUT1: Current source IEXC2 connected to pin
59 * IOUT1, current source IEXC1 connected to pin IOUT2.
60 * @AD7793_IEXEC1_IEXEC2_IOUT1: Both current sources connected to pin IOUT1.
61 * Only valid when the current sources are set to 10 uA or 210 uA.
62 * @AD7793_IEXEC1_IEXEC2_IOUT2: Both current sources connected to Pin IOUT2.
63 * Only valid when the current ources are set to 10 uA or 210 uA.
64 */
65enum ad7793_current_source_direction {
66 AD7793_IEXEC1_IOUT1_IEXEC2_IOUT2 = 0,
67 AD7793_IEXEC1_IOUT2_IEXEC2_IOUT1 = 1,
68 AD7793_IEXEC1_IEXEC2_IOUT1 = 2,
69 AD7793_IEXEC1_IEXEC2_IOUT2 = 3,
70};
71
72/**
73 * enum ad7793_excitation_current - AD7793 excitation current selection
74 * @AD7793_IX_DISABLED: Excitation current Disabled.
75 * @AD7793_IX_10uA: Enable 10 micro-ampere excitation current.
76 * @AD7793_IX_210uA: Enable 210 micro-ampere excitation current.
77 * @AD7793_IX_1mA: Enable 1 milli-Ampere excitation current.
78 */
79enum ad7793_excitation_current {
80 AD7793_IX_DISABLED = 0,
81 AD7793_IX_10uA = 1,
82 AD7793_IX_210uA = 2,
83 AD7793_IX_1mA = 3,
84};
85
86/**
87 * struct ad7793_platform_data - AD7793 platform data
88 * @clock_src: Clock source selection
89 * @burnout_current: If set to true the 100nA burnout current is enabled.
90 * @boost_enable: Enable boost for the bias voltage generator.
91 * @buffered: If set to true configure the device for buffered input mode.
92 * @unipolar: If set to true sample in unipolar mode, if set to false sample in
93 * bipolar mode.
94 * @refsel: Reference voltage selection
95 * @bias_voltage: Bias voltage selection
96 * @exitation_current: Excitation current selection
97 * @current_source_direction: Excitation current direction selection
98 */
99struct ad7793_platform_data {
100 enum ad7793_clock_source clock_src;
101 bool burnout_current;
102 bool boost_enable;
103 bool buffered;
104 bool unipolar;
105
106 enum ad7793_refsel refsel;
107 enum ad7793_bias_voltage bias_voltage;
108 enum ad7793_excitation_current exitation_current;
109 enum ad7793_current_source_direction current_source_direction;
110};
111
112#endif /* IIO_ADC_AD7793_H_ */
diff --git a/include/linux/platform_data/ad7887.h b/include/linux/platform_data/ad7887.h
new file mode 100644
index 000000000000..1e06eac3174d
--- /dev/null
+++ b/include/linux/platform_data/ad7887.h
@@ -0,0 +1,26 @@
1/*
2 * AD7887 SPI ADC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8#ifndef IIO_ADC_AD7887_H_
9#define IIO_ADC_AD7887_H_
10
11/**
12 * struct ad7887_platform_data - AD7887 ADC driver platform data
13 * @en_dual: Whether to use dual channel mode. If set to true AIN1 becomes the
14 * second input channel, and Vref is internally connected to Vdd. If set to
15 * false the device is used in single channel mode and AIN1/Vref is used as
16 * VREF input.
17 * @use_onchip_ref: Whether to use the onchip reference. If set to true the
18 * internal 2.5V reference is used. If set to false a external reference is
19 * used.
20 */
21struct ad7887_platform_data {
22 bool en_dual;
23 bool use_onchip_ref;
24};
25
26#endif /* IIO_ADC_AD7887_H_ */
diff --git a/include/linux/platform_data/ads7828.h b/include/linux/platform_data/ads7828.h
new file mode 100644
index 000000000000..3245f45f9d77
--- /dev/null
+++ b/include/linux/platform_data/ads7828.h
@@ -0,0 +1,29 @@
1/*
2 * TI ADS7828 A/D Converter platform data definition
3 *
4 * Copyright (c) 2012 Savoir-faire Linux Inc.
5 * Vivien Didelot <vivien.didelot@savoirfairelinux.com>
6 *
7 * For further information, see the Documentation/hwmon/ads7828 file.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef _PDATA_ADS7828_H
15#define _PDATA_ADS7828_H
16
17/**
18 * struct ads7828_platform_data - optional ADS7828 connectivity info
19 * @diff_input: Differential input mode.
20 * @ext_vref: Use an external voltage reference.
21 * @vref_mv: Voltage reference value, if external.
22 */
23struct ads7828_platform_data {
24 bool diff_input;
25 bool ext_vref;
26 unsigned int vref_mv;
27};
28
29#endif /* _PDATA_ADS7828_H */
diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h
index 63f3c2804239..92c7fd72f636 100644
--- a/include/linux/platform_data/asoc-imx-ssi.h
+++ b/include/linux/platform_data/asoc-imx-ssi.h
@@ -17,5 +17,7 @@ struct imx_ssi_platform_data {
17 void (*ac97_warm_reset)(struct snd_ac97 *ac97); 17 void (*ac97_warm_reset)(struct snd_ac97 *ac97);
18}; 18};
19 19
20extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type);
21
20#endif /* __MACH_SSI_H */ 22#endif /* __MACH_SSI_H */
21 23
diff --git a/include/linux/platform_data/asoc-s3c.h b/include/linux/platform_data/asoc-s3c.h
index aa9875f77c40..88272591a895 100644
--- a/include/linux/platform_data/asoc-s3c.h
+++ b/include/linux/platform_data/asoc-s3c.h
@@ -38,12 +38,6 @@ struct samsung_i2s {
38#define QUIRK_NEED_RSTCLR (1 << 3) 38#define QUIRK_NEED_RSTCLR (1 << 3)
39 /* Quirks of the I2S controller */ 39 /* Quirks of the I2S controller */
40 u32 quirks; 40 u32 quirks;
41
42 /*
43 * Array of clock names that can be used to generate I2S signals.
44 * Also corresponds to clocks of I2SMOD[10]
45 */
46 const char **src_clk;
47 dma_addr_t idma_addr; 41 dma_addr_t idma_addr;
48}; 42};
49 43
diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h
index b0f2c56a8ea2..6a293b7fff3b 100644
--- a/include/linux/platform_data/atmel.h
+++ b/include/linux/platform_data/atmel.h
@@ -8,6 +8,55 @@
8#define __ATMEL_H__ 8#define __ATMEL_H__
9 9
10#include <linux/mtd/nand.h> 10#include <linux/mtd/nand.h>
11#include <linux/mtd/partitions.h>
12#include <linux/device.h>
13#include <linux/i2c.h>
14#include <linux/leds.h>
15#include <linux/spi/spi.h>
16#include <linux/usb/atmel_usba_udc.h>
17#include <linux/atmel-mci.h>
18#include <sound/atmel-ac97c.h>
19#include <linux/serial.h>
20#include <linux/platform_data/macb.h>
21
22/*
23 * at91: 6 USARTs and one DBGU port (SAM9260)
24 * avr32: 4
25 */
26#define ATMEL_MAX_UART 7
27
28 /* USB Device */
29struct at91_udc_data {
30 int vbus_pin; /* high == host powering us */
31 u8 vbus_active_low; /* vbus polarity */
32 u8 vbus_polled; /* Use polling, not interrupt */
33 int pullup_pin; /* active == D+ pulled up */
34 u8 pullup_active_low; /* true == pullup_pin is active low */
35};
36
37 /* Compact Flash */
38struct at91_cf_data {
39 int irq_pin; /* I/O IRQ */
40 int det_pin; /* Card detect */
41 int vcc_pin; /* power switching */
42 int rst_pin; /* card reset */
43 u8 chipselect; /* EBI Chip Select number */
44 u8 flags;
45#define AT91_CF_TRUE_IDE 0x01
46#define AT91_IDE_SWAP_A0_A2 0x02
47};
48
49 /* USB Host */
50#define AT91_MAX_USBH_PORTS 3
51struct at91_usbh_data {
52 int vbus_pin[AT91_MAX_USBH_PORTS]; /* port power-control pin */
53 int overcurrent_pin[AT91_MAX_USBH_PORTS];
54 u8 ports; /* number of ports on root hub */
55 u8 overcurrent_supported;
56 u8 vbus_pin_active_low[AT91_MAX_USBH_PORTS];
57 u8 overcurrent_status[AT91_MAX_USBH_PORTS];
58 u8 overcurrent_changed[AT91_MAX_USBH_PORTS];
59};
11 60
12 /* NAND / SmartMedia */ 61 /* NAND / SmartMedia */
13struct atmel_nand_data { 62struct atmel_nand_data {
@@ -24,4 +73,28 @@ struct atmel_nand_data {
24 unsigned int num_parts; 73 unsigned int num_parts;
25}; 74};
26 75
76 /* Serial */
77struct atmel_uart_data {
78 int num; /* port num */
79 short use_dma_tx; /* use transmit DMA? */
80 short use_dma_rx; /* use receive DMA? */
81 void __iomem *regs; /* virt. base address, if any */
82 struct serial_rs485 rs485; /* rs485 settings */
83};
84
85 /* Touchscreen Controller */
86struct at91_tsadcc_data {
87 unsigned int adc_clock;
88 u8 pendet_debounce;
89 u8 ts_sample_hold_time;
90};
91
92/* CAN */
93struct at91_can_data {
94 void (*transceiver_switch)(int on);
95};
96
97/* FIXME: this needs a better location, but gets stuff building again */
98extern int at91_suspend_entering_slow_clock(void);
99
27#endif /* __ATMEL_H__ */ 100#endif /* __ATMEL_H__ */
diff --git a/include/linux/platform_data/clk-integrator.h b/include/linux/platform_data/clk-integrator.h
index 83fe9c283bb8..280edac9d0a5 100644
--- a/include/linux/platform_data/clk-integrator.h
+++ b/include/linux/platform_data/clk-integrator.h
@@ -1 +1,3 @@
1void integrator_clk_init(bool is_cp); 1void integrator_clk_init(bool is_cp);
2void integrator_impd1_clk_init(void __iomem *base, unsigned int id);
3void integrator_impd1_clk_exit(unsigned int id);
diff --git a/include/linux/platform_data/clocksource-nomadik-mtu.h b/include/linux/platform_data/clocksource-nomadik-mtu.h
new file mode 100644
index 000000000000..80088973b734
--- /dev/null
+++ b/include/linux/platform_data/clocksource-nomadik-mtu.h
@@ -0,0 +1,9 @@
1#ifndef __PLAT_MTU_H
2#define __PLAT_MTU_H
3
4void nmdk_timer_init(void __iomem *base, int irq);
5void nmdk_clkevt_reset(void);
6void nmdk_clksrc_reset(void);
7
8#endif /* __PLAT_MTU_H */
9
diff --git a/include/linux/platform_data/cpsw.h b/include/linux/platform_data/cpsw.h
index c4e23d029498..24368a2e8b87 100644
--- a/include/linux/platform_data/cpsw.h
+++ b/include/linux/platform_data/cpsw.h
@@ -18,9 +18,7 @@
18#include <linux/if_ether.h> 18#include <linux/if_ether.h>
19 19
20struct cpsw_slave_data { 20struct cpsw_slave_data {
21 u32 slave_reg_ofs; 21 char phy_id[MII_BUS_ID_SIZE];
22 u32 sliver_reg_ofs;
23 const char *phy_id;
24 int phy_if; 22 int phy_if;
25 u8 mac_addr[ETH_ALEN]; 23 u8 mac_addr[ETH_ALEN];
26}; 24};
@@ -28,27 +26,14 @@ struct cpsw_slave_data {
28struct cpsw_platform_data { 26struct cpsw_platform_data {
29 u32 ss_reg_ofs; /* Subsystem control register offset */ 27 u32 ss_reg_ofs; /* Subsystem control register offset */
30 u32 channels; /* number of cpdma channels (symmetric) */ 28 u32 channels; /* number of cpdma channels (symmetric) */
31 u32 cpdma_reg_ofs; /* cpdma register offset */
32 u32 cpdma_sram_ofs; /* cpdma sram offset */
33
34 u32 slaves; /* number of slave cpgmac ports */ 29 u32 slaves; /* number of slave cpgmac ports */
35 struct cpsw_slave_data *slave_data; 30 struct cpsw_slave_data *slave_data;
36 31 u32 cpts_active_slave; /* time stamping slave */
37 u32 ale_reg_ofs; /* address lookup engine reg offset */ 32 u32 cpts_clock_mult; /* convert input clock ticks to nanoseconds */
33 u32 cpts_clock_shift; /* convert input clock ticks to nanoseconds */
38 u32 ale_entries; /* ale table size */ 34 u32 ale_entries; /* ale table size */
39
40 u32 host_port_reg_ofs; /* cpsw cpdma host port registers */
41 u32 host_port_num; /* The port number for the host port */
42
43 u32 hw_stats_reg_ofs; /* cpsw hardware statistics counters */
44
45 u32 bd_ram_ofs; /* embedded buffer descriptor RAM offset*/
46 u32 bd_ram_size; /*buffer descriptor ram size */ 35 u32 bd_ram_size; /*buffer descriptor ram size */
47 u32 hw_ram_addr; /*if the HW address for BD RAM is different */
48 bool no_bd_ram; /* no embedded BD ram*/
49
50 u32 rx_descs; /* Number of Rx Descriptios */ 36 u32 rx_descs; /* Number of Rx Descriptios */
51
52 u32 mac_control; /* Mac control register */ 37 u32 mac_control; /* Mac control register */
53}; 38};
54 39
diff --git a/include/linux/platform_data/crypto-ux500.h b/include/linux/platform_data/crypto-ux500.h
index 5b2d0817e26a..94df96d9a336 100644
--- a/include/linux/platform_data/crypto-ux500.h
+++ b/include/linux/platform_data/crypto-ux500.h
@@ -7,7 +7,7 @@
7#ifndef _CRYPTO_UX500_H 7#ifndef _CRYPTO_UX500_H
8#define _CRYPTO_UX500_H 8#define _CRYPTO_UX500_H
9#include <linux/dmaengine.h> 9#include <linux/dmaengine.h>
10#include <plat/ste_dma40.h> 10#include <linux/platform_data/dma-ste-dma40.h>
11 11
12struct hash_platform_data { 12struct hash_platform_data {
13 void *mem_to_engine; 13 void *mem_to_engine;
diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h
index d0c5825876f8..8db5ae03b6e3 100644
--- a/include/linux/platform_data/davinci_asp.h
+++ b/include/linux/platform_data/davinci_asp.h
@@ -16,12 +16,13 @@
16#ifndef __DAVINCI_ASP_H 16#ifndef __DAVINCI_ASP_H
17#define __DAVINCI_ASP_H 17#define __DAVINCI_ASP_H
18 18
19#include <linux/genalloc.h>
20
19struct snd_platform_data { 21struct snd_platform_data {
20 u32 tx_dma_offset; 22 u32 tx_dma_offset;
21 u32 rx_dma_offset; 23 u32 rx_dma_offset;
22 int asp_chan_q; /* event queue number for ASP channel */ 24 int asp_chan_q; /* event queue number for ASP channel */
23 int ram_chan_q; /* event queue number for RAM channel */ 25 int ram_chan_q; /* event queue number for RAM channel */
24 unsigned int codec_fmt;
25 /* 26 /*
26 * Allowing this is more efficient and eliminates left and right swaps 27 * Allowing this is more efficient and eliminates left and right swaps
27 * caused by underruns, but will swap the left and right channels 28 * caused by underruns, but will swap the left and right channels
@@ -30,6 +31,7 @@ struct snd_platform_data {
30 unsigned enable_channel_combine:1; 31 unsigned enable_channel_combine:1;
31 unsigned sram_size_playback; 32 unsigned sram_size_playback;
32 unsigned sram_size_capture; 33 unsigned sram_size_capture;
34 struct gen_pool *sram_pool;
33 35
34 /* 36 /*
35 * If McBSP peripheral gets the clock from an external pin, 37 * If McBSP peripheral gets the clock from an external pin,
diff --git a/include/linux/platform_data/db8500_thermal.h b/include/linux/platform_data/db8500_thermal.h
new file mode 100644
index 000000000000..3bf60902e902
--- /dev/null
+++ b/include/linux/platform_data/db8500_thermal.h
@@ -0,0 +1,38 @@
1/*
2 * db8500_thermal.h - DB8500 Thermal Management Implementation
3 *
4 * Copyright (C) 2012 ST-Ericsson
5 * Copyright (C) 2012 Linaro Ltd.
6 *
7 * Author: Hongbo Zhang <hongbo.zhang@linaro.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 */
19
20#ifndef _DB8500_THERMAL_H_
21#define _DB8500_THERMAL_H_
22
23#include <linux/thermal.h>
24
25#define COOLING_DEV_MAX 8
26
27struct db8500_trip_point {
28 unsigned long temp;
29 enum thermal_trip_type type;
30 char cdev_name[COOLING_DEV_MAX][THERMAL_NAME_LENGTH];
31};
32
33struct db8500_thsens_platform_data {
34 struct db8500_trip_point trip_points[THERMAL_MAX_TRIPS];
35 int num_trips;
36};
37
38#endif /* _DB8500_THERMAL_H_ */
diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h
index 1b9080385b46..f6d30cc1cb77 100644
--- a/include/linux/platform_data/dma-imx.h
+++ b/include/linux/platform_data/dma-imx.h
@@ -61,7 +61,9 @@ static inline int imx_dma_is_ipu(struct dma_chan *chan)
61static inline int imx_dma_is_general_purpose(struct dma_chan *chan) 61static inline int imx_dma_is_general_purpose(struct dma_chan *chan)
62{ 62{
63 return strstr(dev_name(chan->device->dev), "sdma") || 63 return strstr(dev_name(chan->device->dev), "sdma") ||
64 !strcmp(dev_name(chan->device->dev), "imx-dma"); 64 !strcmp(dev_name(chan->device->dev), "imx1-dma") ||
65 !strcmp(dev_name(chan->device->dev), "imx21-dma") ||
66 !strcmp(dev_name(chan->device->dev), "imx27-dma");
65} 67}
66 68
67#endif 69#endif
diff --git a/include/linux/platform_data/dma-mv_xor.h b/include/linux/platform_data/dma-mv_xor.h
index 2ba1f7d76eef..8ec18f64e396 100644
--- a/include/linux/platform_data/dma-mv_xor.h
+++ b/include/linux/platform_data/dma-mv_xor.h
@@ -10,15 +10,14 @@
10#include <linux/dmaengine.h> 10#include <linux/dmaengine.h>
11#include <linux/mbus.h> 11#include <linux/mbus.h>
12 12
13#define MV_XOR_SHARED_NAME "mv_xor_shared" 13#define MV_XOR_NAME "mv_xor"
14#define MV_XOR_NAME "mv_xor"
15 14
16struct mv_xor_platform_data { 15struct mv_xor_channel_data {
17 struct platform_device *shared;
18 int hw_id;
19 dma_cap_mask_t cap_mask; 16 dma_cap_mask_t cap_mask;
20 size_t pool_size;
21}; 17};
22 18
19struct mv_xor_platform_data {
20 struct mv_xor_channel_data *channels;
21};
23 22
24#endif 23#endif
diff --git a/include/linux/platform_data/dma-ste-dma40.h b/include/linux/platform_data/dma-ste-dma40.h
new file mode 100644
index 000000000000..9ff93b065686
--- /dev/null
+++ b/include/linux/platform_data/dma-ste-dma40.h
@@ -0,0 +1,223 @@
1/*
2 * Copyright (C) ST-Ericsson SA 2007-2010
3 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
4 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
5 * License terms: GNU General Public License (GPL) version 2
6 */
7
8
9#ifndef STE_DMA40_H
10#define STE_DMA40_H
11
12#include <linux/dmaengine.h>
13#include <linux/scatterlist.h>
14#include <linux/workqueue.h>
15#include <linux/interrupt.h>
16
17/*
18 * Maxium size for a single dma descriptor
19 * Size is limited to 16 bits.
20 * Size is in the units of addr-widths (1,2,4,8 bytes)
21 * Larger transfers will be split up to multiple linked desc
22 */
23#define STEDMA40_MAX_SEG_SIZE 0xFFFF
24
25/* dev types for memcpy */
26#define STEDMA40_DEV_DST_MEMORY (-1)
27#define STEDMA40_DEV_SRC_MEMORY (-1)
28
29enum stedma40_mode {
30 STEDMA40_MODE_LOGICAL = 0,
31 STEDMA40_MODE_PHYSICAL,
32 STEDMA40_MODE_OPERATION,
33};
34
35enum stedma40_mode_opt {
36 STEDMA40_PCHAN_BASIC_MODE = 0,
37 STEDMA40_LCHAN_SRC_LOG_DST_LOG = 0,
38 STEDMA40_PCHAN_MODULO_MODE,
39 STEDMA40_PCHAN_DOUBLE_DST_MODE,
40 STEDMA40_LCHAN_SRC_PHY_DST_LOG,
41 STEDMA40_LCHAN_SRC_LOG_DST_PHY,
42};
43
44#define STEDMA40_ESIZE_8_BIT 0x0
45#define STEDMA40_ESIZE_16_BIT 0x1
46#define STEDMA40_ESIZE_32_BIT 0x2
47#define STEDMA40_ESIZE_64_BIT 0x3
48
49/* The value 4 indicates that PEN-reg shall be set to 0 */
50#define STEDMA40_PSIZE_PHY_1 0x4
51#define STEDMA40_PSIZE_PHY_2 0x0
52#define STEDMA40_PSIZE_PHY_4 0x1
53#define STEDMA40_PSIZE_PHY_8 0x2
54#define STEDMA40_PSIZE_PHY_16 0x3
55
56/*
57 * The number of elements differ in logical and
58 * physical mode
59 */
60#define STEDMA40_PSIZE_LOG_1 STEDMA40_PSIZE_PHY_2
61#define STEDMA40_PSIZE_LOG_4 STEDMA40_PSIZE_PHY_4
62#define STEDMA40_PSIZE_LOG_8 STEDMA40_PSIZE_PHY_8
63#define STEDMA40_PSIZE_LOG_16 STEDMA40_PSIZE_PHY_16
64
65/* Maximum number of possible physical channels */
66#define STEDMA40_MAX_PHYS 32
67
68enum stedma40_flow_ctrl {
69 STEDMA40_NO_FLOW_CTRL,
70 STEDMA40_FLOW_CTRL,
71};
72
73enum stedma40_periph_data_width {
74 STEDMA40_BYTE_WIDTH = STEDMA40_ESIZE_8_BIT,
75 STEDMA40_HALFWORD_WIDTH = STEDMA40_ESIZE_16_BIT,
76 STEDMA40_WORD_WIDTH = STEDMA40_ESIZE_32_BIT,
77 STEDMA40_DOUBLEWORD_WIDTH = STEDMA40_ESIZE_64_BIT
78};
79
80enum stedma40_xfer_dir {
81 STEDMA40_MEM_TO_MEM = 1,
82 STEDMA40_MEM_TO_PERIPH,
83 STEDMA40_PERIPH_TO_MEM,
84 STEDMA40_PERIPH_TO_PERIPH
85};
86
87
88/**
89 * struct stedma40_chan_cfg - dst/src channel configuration
90 *
91 * @big_endian: true if the src/dst should be read as big endian
92 * @data_width: Data width of the src/dst hardware
93 * @p_size: Burst size
94 * @flow_ctrl: Flow control on/off.
95 */
96struct stedma40_half_channel_info {
97 bool big_endian;
98 enum stedma40_periph_data_width data_width;
99 int psize;
100 enum stedma40_flow_ctrl flow_ctrl;
101};
102
103/**
104 * struct stedma40_chan_cfg - Structure to be filled by client drivers.
105 *
106 * @dir: MEM 2 MEM, PERIPH 2 MEM , MEM 2 PERIPH, PERIPH 2 PERIPH
107 * @high_priority: true if high-priority
108 * @realtime: true if realtime mode is to be enabled. Only available on DMA40
109 * version 3+, i.e DB8500v2+
110 * @mode: channel mode: physical, logical, or operation
111 * @mode_opt: options for the chosen channel mode
112 * @src_dev_type: Src device type
113 * @dst_dev_type: Dst device type
114 * @src_info: Parameters for dst half channel
115 * @dst_info: Parameters for dst half channel
116 * @use_fixed_channel: if true, use physical channel specified by phy_channel
117 * @phy_channel: physical channel to use, only if use_fixed_channel is true
118 *
119 * This structure has to be filled by the client drivers.
120 * It is recommended to do all dma configurations for clients in the machine.
121 *
122 */
123struct stedma40_chan_cfg {
124 enum stedma40_xfer_dir dir;
125 bool high_priority;
126 bool realtime;
127 enum stedma40_mode mode;
128 enum stedma40_mode_opt mode_opt;
129 int src_dev_type;
130 int dst_dev_type;
131 struct stedma40_half_channel_info src_info;
132 struct stedma40_half_channel_info dst_info;
133
134 bool use_fixed_channel;
135 int phy_channel;
136};
137
138/**
139 * struct stedma40_platform_data - Configuration struct for the dma device.
140 *
141 * @dev_len: length of dev_tx and dev_rx
142 * @dev_tx: mapping between destination event line and io address
143 * @dev_rx: mapping between source event line and io address
144 * @memcpy: list of memcpy event lines
145 * @memcpy_len: length of memcpy
146 * @memcpy_conf_phy: default configuration of physical channel memcpy
147 * @memcpy_conf_log: default configuration of logical channel memcpy
148 * @disabled_channels: A vector, ending with -1, that marks physical channels
149 * that are for different reasons not available for the driver.
150 */
151struct stedma40_platform_data {
152 u32 dev_len;
153 const dma_addr_t *dev_tx;
154 const dma_addr_t *dev_rx;
155 int *memcpy;
156 u32 memcpy_len;
157 struct stedma40_chan_cfg *memcpy_conf_phy;
158 struct stedma40_chan_cfg *memcpy_conf_log;
159 int disabled_channels[STEDMA40_MAX_PHYS];
160 bool use_esram_lcla;
161};
162
163#ifdef CONFIG_STE_DMA40
164
165/**
166 * stedma40_filter() - Provides stedma40_chan_cfg to the
167 * ste_dma40 dma driver via the dmaengine framework.
168 * does some checking of what's provided.
169 *
170 * Never directly called by client. It used by dmaengine.
171 * @chan: dmaengine handle.
172 * @data: Must be of type: struct stedma40_chan_cfg and is
173 * the configuration of the framework.
174 *
175 *
176 */
177
178bool stedma40_filter(struct dma_chan *chan, void *data);
179
180/**
181 * stedma40_slave_mem() - Transfers a raw data buffer to or from a slave
182 * (=device)
183 *
184 * @chan: dmaengine handle
185 * @addr: source or destination physicall address.
186 * @size: bytes to transfer
187 * @direction: direction of transfer
188 * @flags: is actually enum dma_ctrl_flags. See dmaengine.h
189 */
190
191static inline struct
192dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
193 dma_addr_t addr,
194 unsigned int size,
195 enum dma_transfer_direction direction,
196 unsigned long flags)
197{
198 struct scatterlist sg;
199 sg_init_table(&sg, 1);
200 sg.dma_address = addr;
201 sg.length = size;
202
203 return dmaengine_prep_slave_sg(chan, &sg, 1, direction, flags);
204}
205
206#else
207static inline bool stedma40_filter(struct dma_chan *chan, void *data)
208{
209 return false;
210}
211
212static inline struct
213dma_async_tx_descriptor *stedma40_slave_mem(struct dma_chan *chan,
214 dma_addr_t addr,
215 unsigned int size,
216 enum dma_transfer_direction direction,
217 unsigned long flags)
218{
219 return NULL;
220}
221#endif
222
223#endif
diff --git a/include/linux/platform_data/dmtimer-omap.h b/include/linux/platform_data/dmtimer-omap.h
new file mode 100644
index 000000000000..a19b78d826e9
--- /dev/null
+++ b/include/linux/platform_data/dmtimer-omap.h
@@ -0,0 +1,31 @@
1/*
2 * DMTIMER platform data for TI OMAP platforms
3 *
4 * Copyright (C) 2012 Texas Instruments
5 * Author: Jon Hunter <jon-hunter@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef __PLATFORM_DATA_DMTIMER_OMAP_H__
21#define __PLATFORM_DATA_DMTIMER_OMAP_H__
22
23struct dmtimer_platform_data {
24 /* set_timer_src - Only used for OMAP1 devices */
25 int (*set_timer_src)(struct platform_device *pdev, int source);
26 u32 timer_capability;
27 u32 timer_errata;
28 int (*get_context_loss_count)(struct device *);
29};
30
31#endif /* __PLATFORM_DATA_DMTIMER_OMAP_H__ */
diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h
index e8741c2678d5..5d50b25a73d7 100644
--- a/include/linux/platform_data/gpio-omap.h
+++ b/include/linux/platform_data/gpio-omap.h
@@ -26,7 +26,6 @@
26 26
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/platform_device.h> 28#include <linux/platform_device.h>
29#include <mach/irqs.h>
30 29
31#define OMAP1_MPUIO_BASE 0xfffb5000 30#define OMAP1_MPUIO_BASE 0xfffb5000
32 31
diff --git a/include/linux/platform_data/gpio-ts5500.h b/include/linux/platform_data/gpio-ts5500.h
new file mode 100644
index 000000000000..b10d11c9bb49
--- /dev/null
+++ b/include/linux/platform_data/gpio-ts5500.h
@@ -0,0 +1,27 @@
1/*
2 * GPIO (DIO) header for Technologic Systems TS-5500
3 *
4 * Copyright (c) 2012 Savoir-faire Linux Inc.
5 * Vivien Didelot <vivien.didelot@savoirfairelinux.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef _PDATA_GPIO_TS5500_H
13#define _PDATA_GPIO_TS5500_H
14
15/**
16 * struct ts5500_dio_platform_data - TS-5500 pin block configuration
17 * @base: The GPIO base number to use.
18 * @strap: The only pin connected to an interrupt in a block is input-only.
19 * If you need a bidirectional line which can trigger an IRQ, you
20 * may strap it with an in/out pin. This flag indicates this case.
21 */
22struct ts5500_dio_platform_data {
23 int base;
24 bool strap;
25};
26
27#endif /* _PDATA_GPIO_TS5500_H */
diff --git a/include/linux/platform_data/i2c-cbus-gpio.h b/include/linux/platform_data/i2c-cbus-gpio.h
new file mode 100644
index 000000000000..6faa992a9502
--- /dev/null
+++ b/include/linux/platform_data/i2c-cbus-gpio.h
@@ -0,0 +1,27 @@
1/*
2 * i2c-cbus-gpio.h - CBUS I2C platform_data definition
3 *
4 * Copyright (C) 2004-2009 Nokia Corporation
5 *
6 * Written by Felipe Balbi and Aaro Koskinen.
7 *
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file "COPYING" in the main directory of this
10 * archive for more details.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18#ifndef __INCLUDE_LINUX_I2C_CBUS_GPIO_H
19#define __INCLUDE_LINUX_I2C_CBUS_GPIO_H
20
21struct i2c_cbus_platform_data {
22 int dat_gpio;
23 int clk_gpio;
24 int sel_gpio;
25};
26
27#endif /* __INCLUDE_LINUX_I2C_CBUS_GPIO_H */
diff --git a/include/linux/platform_data/iommu-omap.h b/include/linux/platform_data/iommu-omap.h
new file mode 100644
index 000000000000..5b429c43a297
--- /dev/null
+++ b/include/linux/platform_data/iommu-omap.h
@@ -0,0 +1,54 @@
1/*
2 * omap iommu: main structures
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/platform_device.h>
14
15#define MMU_REG_SIZE 256
16
17/**
18 * struct iommu_arch_data - omap iommu private data
19 * @name: name of the iommu device
20 * @iommu_dev: handle of the iommu device
21 *
22 * This is an omap iommu private data object, which binds an iommu user
23 * to its iommu device. This object should be placed at the iommu user's
24 * dev_archdata so generic IOMMU API can be used without having to
25 * utilize omap-specific plumbing anymore.
26 */
27struct omap_iommu_arch_data {
28 const char *name;
29 struct omap_iommu *iommu_dev;
30};
31
32/**
33 * struct omap_mmu_dev_attr - OMAP mmu device attributes for omap_hwmod
34 * @da_start: device address where the va space starts.
35 * @da_end: device address where the va space ends.
36 * @nr_tlb_entries: number of entries supported by the translation
37 * look-aside buffer (TLB).
38 */
39struct omap_mmu_dev_attr {
40 u32 da_start;
41 u32 da_end;
42 int nr_tlb_entries;
43};
44
45struct iommu_platform_data {
46 const char *name;
47 const char *reset_name;
48 int nr_tlb_entries;
49 u32 da_start;
50 u32 da_end;
51
52 int (*assert_reset)(struct platform_device *pdev, const char *name);
53 int (*deassert_reset)(struct platform_device *pdev, const char *name);
54};
diff --git a/include/linux/platform_data/leds-omap.h b/include/linux/platform_data/leds-omap.h
new file mode 100644
index 000000000000..56c9b2a0ada5
--- /dev/null
+++ b/include/linux/platform_data/leds-omap.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (C) 2006 Samsung Electronics
3 * Kyungmin Park <kyungmin.park@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#ifndef ASMARM_ARCH_LED_H
10#define ASMARM_ARCH_LED_H
11
12struct omap_led_config {
13 struct led_classdev cdev;
14 s16 gpio;
15};
16
17struct omap_led_platform_data {
18 s16 nr_leds;
19 struct omap_led_config *leds;
20};
21
22#endif
diff --git a/include/linux/platform_data/lp855x.h b/include/linux/platform_data/lp855x.h
index 761f31752367..e81f62d24ee2 100644
--- a/include/linux/platform_data/lp855x.h
+++ b/include/linux/platform_data/lp855x.h
@@ -89,11 +89,6 @@ enum lp8556_brightness_source {
89 LP8556_COMBINED2, /* pwm + i2c after the shaper block */ 89 LP8556_COMBINED2, /* pwm + i2c after the shaper block */
90}; 90};
91 91
92struct lp855x_pwm_data {
93 void (*pwm_set_intensity) (int brightness, int max_brightness);
94 int (*pwm_get_intensity) (int max_brightness);
95};
96
97struct lp855x_rom_data { 92struct lp855x_rom_data {
98 u8 addr; 93 u8 addr;
99 u8 val; 94 u8 val;
@@ -105,7 +100,7 @@ struct lp855x_rom_data {
105 * @mode : brightness control by pwm or lp855x register 100 * @mode : brightness control by pwm or lp855x register
106 * @device_control : value of DEVICE CONTROL register 101 * @device_control : value of DEVICE CONTROL register
107 * @initial_brightness : initial value of backlight brightness 102 * @initial_brightness : initial value of backlight brightness
108 * @pwm_data : platform specific pwm generation functions. 103 * @period_ns : platform specific pwm period value. unit is nano.
109 Only valid when mode is PWM_BASED. 104 Only valid when mode is PWM_BASED.
110 * @load_new_rom_data : 105 * @load_new_rom_data :
111 0 : use default configuration data 106 0 : use default configuration data
@@ -118,7 +113,7 @@ struct lp855x_platform_data {
118 enum lp855x_brightness_ctrl_mode mode; 113 enum lp855x_brightness_ctrl_mode mode;
119 u8 device_control; 114 u8 device_control;
120 int initial_brightness; 115 int initial_brightness;
121 struct lp855x_pwm_data pwm_data; 116 unsigned int period_ns;
122 u8 load_new_rom_data; 117 u8 load_new_rom_data;
123 int size_program; 118 int size_program;
124 struct lp855x_rom_data *rom_data; 119 struct lp855x_rom_data *rom_data;
diff --git a/include/linux/platform_data/macb.h b/include/linux/platform_data/macb.h
index b081c7245ec8..044a124bfbbc 100644
--- a/include/linux/platform_data/macb.h
+++ b/include/linux/platform_data/macb.h
@@ -12,6 +12,7 @@ struct macb_platform_data {
12 u32 phy_mask; 12 u32 phy_mask;
13 int phy_irq_pin; /* PHY IRQ */ 13 int phy_irq_pin; /* PHY IRQ */
14 u8 is_rmii; /* using RMII interface? */ 14 u8 is_rmii; /* using RMII interface? */
15 u8 rev_eth_addr; /* reverse Ethernet address byte order */
15}; 16};
16 17
17#endif /* __MACB_PDATA_H__ */ 18#endif /* __MACB_PDATA_H__ */
diff --git a/include/linux/platform_data/mmc-omap.h b/include/linux/platform_data/mmc-omap.h
new file mode 100644
index 000000000000..2bf1b30cb5dc
--- /dev/null
+++ b/include/linux/platform_data/mmc-omap.h
@@ -0,0 +1,151 @@
1/*
2 * MMC definitions for OMAP2
3 *
4 * Copyright (C) 2006 Nokia Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#define OMAP_MMC_MAX_SLOTS 2
12
13/*
14 * struct omap_mmc_dev_attr.flags possibilities
15 *
16 * OMAP_HSMMC_SUPPORTS_DUAL_VOLT: Some HSMMC controller instances can
17 * operate with either 1.8Vdc or 3.0Vdc card voltages; this flag
18 * should be set if this is the case. See for example Section 22.5.3
19 * "MMC/SD/SDIO1 Bus Voltage Selection" of the OMAP34xx Multimedia
20 * Device Silicon Revision 3.1.x Revision ZR (July 2011) (SWPU223R).
21 *
22 * OMAP_HSMMC_BROKEN_MULTIBLOCK_READ: Multiple-block read transfers
23 * don't work correctly on some MMC controller instances on some
24 * OMAP3 SoCs; this flag should be set if this is the case. See
25 * for example Advisory 2.1.1.128 "MMC: Multiple Block Read
26 * Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
27 * Revision F (October 2010) (SPRZ278F).
28 */
29#define OMAP_HSMMC_SUPPORTS_DUAL_VOLT BIT(0)
30#define OMAP_HSMMC_BROKEN_MULTIBLOCK_READ BIT(1)
31
32struct mmc_card;
33
34struct omap_mmc_dev_attr {
35 u8 flags;
36};
37
38struct omap_mmc_platform_data {
39 /* back-link to device */
40 struct device *dev;
41
42 /* number of slots per controller */
43 unsigned nr_slots:2;
44
45 /* set if your board has components or wiring that limits the
46 * maximum frequency on the MMC bus */
47 unsigned int max_freq;
48
49 /* switch the bus to a new slot */
50 int (*switch_slot)(struct device *dev, int slot);
51 /* initialize board-specific MMC functionality, can be NULL if
52 * not supported */
53 int (*init)(struct device *dev);
54 void (*cleanup)(struct device *dev);
55 void (*shutdown)(struct device *dev);
56
57 /* To handle board related suspend/resume functionality for MMC */
58 int (*suspend)(struct device *dev, int slot);
59 int (*resume)(struct device *dev, int slot);
60
61 /* Return context loss count due to PM states changing */
62 int (*get_context_loss_count)(struct device *dev);
63
64 /* Integrating attributes from the omap_hwmod layer */
65 u8 controller_flags;
66
67 /* Register offset deviation */
68 u16 reg_offset;
69
70 struct omap_mmc_slot_data {
71
72 /*
73 * 4/8 wires and any additional host capabilities
74 * need to OR'd all capabilities (ref. linux/mmc/host.h)
75 */
76 u8 wires; /* Used for the MMC driver on omap1 and 2420 */
77 u32 caps; /* Used for the MMC driver on 2430 and later */
78 u32 pm_caps; /* PM capabilities of the mmc */
79
80 /*
81 * nomux means "standard" muxing is wrong on this board, and
82 * that board-specific code handled it before common init logic.
83 */
84 unsigned nomux:1;
85
86 /* switch pin can be for card detect (default) or card cover */
87 unsigned cover:1;
88
89 /* use the internal clock */
90 unsigned internal_clock:1;
91
92 /* nonremovable e.g. eMMC */
93 unsigned nonremovable:1;
94
95 /* Try to sleep or power off when possible */
96 unsigned power_saving:1;
97
98 /* If using power_saving and the MMC power is not to go off */
99 unsigned no_off:1;
100
101 /* eMMC does not handle power off when not in sleep state */
102 unsigned no_regulator_off_init:1;
103
104 /* Regulator off remapped to sleep */
105 unsigned vcc_aux_disable_is_sleep:1;
106
107 /* we can put the features above into this variable */
108#define HSMMC_HAS_PBIAS (1 << 0)
109#define HSMMC_HAS_UPDATED_RESET (1 << 1)
110#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
111#define MMC_OMAP7XX (1 << 3)
112#define MMC_OMAP15XX (1 << 4)
113#define MMC_OMAP16XX (1 << 5)
114 unsigned features;
115
116 int switch_pin; /* gpio (card detect) */
117 int gpio_wp; /* gpio (write protect) */
118
119 int (*set_bus_mode)(struct device *dev, int slot, int bus_mode);
120 int (*set_power)(struct device *dev, int slot,
121 int power_on, int vdd);
122 int (*get_ro)(struct device *dev, int slot);
123 void (*remux)(struct device *dev, int slot, int power_on);
124 /* Call back before enabling / disabling regulators */
125 void (*before_set_reg)(struct device *dev, int slot,
126 int power_on, int vdd);
127 /* Call back after enabling / disabling regulators */
128 void (*after_set_reg)(struct device *dev, int slot,
129 int power_on, int vdd);
130 /* if we have special card, init it using this callback */
131 void (*init_card)(struct mmc_card *card);
132
133 /* return MMC cover switch state, can be NULL if not supported.
134 *
135 * possible return values:
136 * 0 - closed
137 * 1 - open
138 */
139 int (*get_cover_state)(struct device *dev, int slot);
140
141 const char *name;
142 u32 ocr_mask;
143
144 /* Card detection IRQs */
145 int card_detect_irq;
146 int (*card_detect)(struct device *dev, int slot);
147
148 unsigned int ban_openended:1;
149
150 } slots[OMAP_MMC_MAX_SLOTS];
151};
diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h
index 1a68c1e5fe53..24d32ca34bef 100644
--- a/include/linux/platform_data/mtd-nand-omap2.h
+++ b/include/linux/platform_data/mtd-nand-omap2.h
@@ -8,9 +8,13 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <plat/gpmc.h> 11#ifndef _MTD_NAND_OMAP2_H
12#define _MTD_NAND_OMAP2_H
13
12#include <linux/mtd/partitions.h> 14#include <linux/mtd/partitions.h>
13 15
16#define GPMC_BCH_NUM_REMAINDER 8
17
14enum nand_io { 18enum nand_io {
15 NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */ 19 NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */
16 NAND_OMAP_POLLED, /* polled mode, without prefetch */ 20 NAND_OMAP_POLLED, /* polled mode, without prefetch */
@@ -18,10 +22,38 @@ enum nand_io {
18 NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */ 22 NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */
19}; 23};
20 24
25enum omap_ecc {
26 /* 1-bit ecc: stored at end of spare area */
27 OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
28 OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
29 /* 1-bit ecc: stored at beginning of spare area as romcode */
30 OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
31 OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
32 OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
33};
34
35struct gpmc_nand_regs {
36 void __iomem *gpmc_status;
37 void __iomem *gpmc_nand_command;
38 void __iomem *gpmc_nand_address;
39 void __iomem *gpmc_nand_data;
40 void __iomem *gpmc_prefetch_config1;
41 void __iomem *gpmc_prefetch_config2;
42 void __iomem *gpmc_prefetch_control;
43 void __iomem *gpmc_prefetch_status;
44 void __iomem *gpmc_ecc_config;
45 void __iomem *gpmc_ecc_control;
46 void __iomem *gpmc_ecc_size_config;
47 void __iomem *gpmc_ecc1_result;
48 void __iomem *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
49 void __iomem *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
50 void __iomem *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
51 void __iomem *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
52};
53
21struct omap_nand_platform_data { 54struct omap_nand_platform_data {
22 int cs; 55 int cs;
23 struct mtd_partition *parts; 56 struct mtd_partition *parts;
24 struct gpmc_timings *gpmc_t;
25 int nr_parts; 57 int nr_parts;
26 bool dev_ready; 58 bool dev_ready;
27 enum nand_io xfer_type; 59 enum nand_io xfer_type;
@@ -30,14 +62,4 @@ struct omap_nand_platform_data {
30 struct gpmc_nand_regs reg; 62 struct gpmc_nand_regs reg;
31}; 63};
32 64
33/* minimum size for IO mapping */
34#define NAND_IO_SIZE 4
35
36#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
37extern int gpmc_nand_init(struct omap_nand_platform_data *d);
38#else
39static inline int gpmc_nand_init(struct omap_nand_platform_data *d)
40{
41 return 0;
42}
43#endif 65#endif
diff --git a/include/linux/platform_data/mtd-nomadik-nand.h b/include/linux/platform_data/mtd-nomadik-nand.h
deleted file mode 100644
index c3c8254c22a5..000000000000
--- a/include/linux/platform_data/mtd-nomadik-nand.h
+++ /dev/null
@@ -1,16 +0,0 @@
1#ifndef __ASM_ARCH_NAND_H
2#define __ASM_ARCH_NAND_H
3
4struct nomadik_nand_platform_data {
5 struct mtd_partition *parts;
6 int nparts;
7 int options;
8 int (*init) (void);
9 int (*exit) (void);
10};
11
12#define NAND_IO_DATA 0x40000000
13#define NAND_IO_CMD 0x40800000
14#define NAND_IO_ADDR 0x41000000
15
16#endif /* __ASM_ARCH_NAND_H */
diff --git a/include/linux/platform_data/mtd-onenand-omap2.h b/include/linux/platform_data/mtd-onenand-omap2.h
index 2858667d2e4f..685af7e8b120 100644
--- a/include/linux/platform_data/mtd-onenand-omap2.h
+++ b/include/linux/platform_data/mtd-onenand-omap2.h
@@ -9,17 +9,15 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12#ifndef __MTD_ONENAND_OMAP2_H
13#define __MTD_ONENAND_OMAP2_H
14
12#include <linux/mtd/mtd.h> 15#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h> 16#include <linux/mtd/partitions.h>
14 17
15#define ONENAND_SYNC_READ (1 << 0) 18#define ONENAND_SYNC_READ (1 << 0)
16#define ONENAND_SYNC_READWRITE (1 << 1) 19#define ONENAND_SYNC_READWRITE (1 << 1)
17 20#define ONENAND_IN_OMAP34XX (1 << 2)
18struct onenand_freq_info {
19 u16 maf_id;
20 u16 dev_id;
21 u16 ver_id;
22};
23 21
24struct omap_onenand_platform_data { 22struct omap_onenand_platform_data {
25 int cs; 23 int cs;
@@ -27,27 +25,9 @@ struct omap_onenand_platform_data {
27 struct mtd_partition *parts; 25 struct mtd_partition *parts;
28 int nr_parts; 26 int nr_parts;
29 int (*onenand_setup)(void __iomem *, int *freq_ptr); 27 int (*onenand_setup)(void __iomem *, int *freq_ptr);
30 int (*get_freq)(const struct onenand_freq_info *freq_info,
31 bool *clk_dep);
32 int dma_channel; 28 int dma_channel;
33 u8 flags; 29 u8 flags;
34 u8 regulator_can_sleep; 30 u8 regulator_can_sleep;
35 u8 skip_initial_unlocking; 31 u8 skip_initial_unlocking;
36}; 32};
37
38#define ONENAND_MAX_PARTITIONS 8
39
40#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
41 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
42
43extern void gpmc_onenand_init(struct omap_onenand_platform_data *d);
44
45#else
46
47#define board_onenand_data NULL
48
49static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d)
50{
51}
52
53#endif 33#endif
diff --git a/include/linux/platform_data/omap-twl4030.h b/include/linux/platform_data/omap-twl4030.h
index c7bef788daab..ee60ef79d792 100644
--- a/include/linux/platform_data/omap-twl4030.h
+++ b/include/linux/platform_data/omap-twl4030.h
@@ -25,8 +25,34 @@
25#ifndef _OMAP_TWL4030_H_ 25#ifndef _OMAP_TWL4030_H_
26#define _OMAP_TWL4030_H_ 26#define _OMAP_TWL4030_H_
27 27
28/* To select if only one channel is connected in a stereo port */
29#define OMAP_TWL4030_LEFT (1 << 0)
30#define OMAP_TWL4030_RIGHT (1 << 1)
31
28struct omap_tw4030_pdata { 32struct omap_tw4030_pdata {
29 const char *card_name; 33 const char *card_name;
34 /* Voice port is connected to McBSP3 */
35 bool voice_connected;
36
37 /* The driver will parse the connection flags if this flag is set */
38 bool custom_routing;
39 /* Flags to indicate connected audio ports. */
40 u8 has_hs;
41 u8 has_hf;
42 u8 has_predriv;
43 u8 has_carkit;
44 bool has_ear;
45
46 bool has_mainmic;
47 bool has_submic;
48 bool has_hsmic;
49 bool has_carkitmic;
50 bool has_digimic0;
51 bool has_digimic1;
52 u8 has_linein;
53
54 /* Jack detect GPIO or <= 0 if it is not implemented */
55 int jack_detect;
30}; 56};
31 57
32#endif /* _OMAP_TWL4030_H_ */ 58#endif /* _OMAP_TWL4030_H_ */
diff --git a/include/linux/platform_data/omap-wd-timer.h b/include/linux/platform_data/omap-wd-timer.h
new file mode 100644
index 000000000000..d75f5f802d98
--- /dev/null
+++ b/include/linux/platform_data/omap-wd-timer.h
@@ -0,0 +1,38 @@
1/*
2 * OMAP2+ WDTIMER-specific function prototypes
3 *
4 * Copyright (C) 2012 Texas Instruments, Inc.
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H
14#define __LINUX_PLATFORM_DATA_OMAP_WD_TIMER_H
15
16#include <linux/types.h>
17
18/*
19 * Standardized OMAP reset source bits
20 *
21 * This is a subset of the ones listed in arch/arm/mach-omap2/prm.h
22 * and are the only ones needed in the watchdog driver.
23 */
24#define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3
25
26/**
27 * struct omap_wd_timer_platform_data - WDTIMER integration to the host SoC
28 * @read_reset_sources - fn ptr for the SoC to indicate the last reset cause
29 *
30 * The function pointed to by @read_reset_sources must return its data
31 * in a standard format - search for RST_SRC_ID_SHIFT in
32 * arch/arm/mach-omap2
33 */
34struct omap_wd_timer_platform_data {
35 u32 (*read_reset_sources)(void);
36};
37
38#endif
diff --git a/include/linux/platform_data/omap_drm.h b/include/linux/platform_data/omap_drm.h
index 3da73bdc2031..f4e4a237ebd2 100644
--- a/include/linux/platform_data/omap_drm.h
+++ b/include/linux/platform_data/omap_drm.h
@@ -46,6 +46,7 @@ struct omap_kms_platform_data {
46}; 46};
47 47
48struct omap_drm_platform_data { 48struct omap_drm_platform_data {
49 uint32_t omaprev;
49 struct omap_kms_platform_data *kms_pdata; 50 struct omap_kms_platform_data *kms_pdata;
50}; 51};
51 52
diff --git a/include/linux/platform_data/omap_ocp2scp.h b/include/linux/platform_data/omap_ocp2scp.h
new file mode 100644
index 000000000000..5c6c3939355f
--- /dev/null
+++ b/include/linux/platform_data/omap_ocp2scp.h
@@ -0,0 +1,31 @@
1/*
2 * omap_ocp2scp.h -- ocp2scp header file
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * Author: Kishon Vijay Abraham I <kishon@ti.com>
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __DRIVERS_OMAP_OCP2SCP_H
20#define __DRIVERS_OMAP_OCP2SCP_H
21
22struct omap_ocp2scp_dev {
23 const char *drv_name;
24 struct resource *res;
25};
26
27struct omap_ocp2scp_platform_data {
28 int dev_cnt;
29 struct omap_ocp2scp_dev **devices;
30};
31#endif /* __DRIVERS_OMAP_OCP2SCP_H */
diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h
index 30dea251b835..dfbc65d10484 100644
--- a/include/linux/platform_data/pinctrl-coh901.h
+++ b/include/linux/platform_data/pinctrl-coh901.h
@@ -13,14 +13,10 @@
13 * struct u300_gpio_platform - U300 GPIO platform data 13 * struct u300_gpio_platform - U300 GPIO platform data
14 * @ports: number of GPIO block ports 14 * @ports: number of GPIO block ports
15 * @gpio_base: first GPIO number for this block (use a free range) 15 * @gpio_base: first GPIO number for this block (use a free range)
16 * @gpio_irq_base: first GPIO IRQ number for this block (use a free range)
17 * @pinctrl_device: pin control device to spawn as child
18 */ 16 */
19struct u300_gpio_platform { 17struct u300_gpio_platform {
20 u8 ports; 18 u8 ports;
21 int gpio_base; 19 int gpio_base;
22 int gpio_irq_base;
23 struct platform_device *pinctrl_device;
24}; 20};
25 21
26#endif /* __MACH_U300_GPIO_U300_H */ 22#endif /* __MACH_U300_GPIO_U300_H */
diff --git a/include/linux/platform_data/pinctrl-nomadik.h b/include/linux/platform_data/pinctrl-nomadik.h
new file mode 100644
index 000000000000..f73b2f0c55b7
--- /dev/null
+++ b/include/linux/platform_data/pinctrl-nomadik.h
@@ -0,0 +1,266 @@
1/*
2 * Structures and registers for GPIO access in the Nomadik SoC
3 *
4 * Copyright (C) 2008 STMicroelectronics
5 * Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
6 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __PLAT_NOMADIK_GPIO
14#define __PLAT_NOMADIK_GPIO
15
16/*
17 * pin configurations are represented by 32-bit integers:
18 *
19 * bit 0.. 8 - Pin Number (512 Pins Maximum)
20 * bit 9..10 - Alternate Function Selection
21 * bit 11..12 - Pull up/down state
22 * bit 13 - Sleep mode behaviour
23 * bit 14 - Direction
24 * bit 15 - Value (if output)
25 * bit 16..18 - SLPM pull up/down state
26 * bit 19..20 - SLPM direction
27 * bit 21..22 - SLPM Value (if output)
28 * bit 23..25 - PDIS value (if input)
29 * bit 26 - Gpio mode
30 * bit 27 - Sleep mode
31 *
32 * to facilitate the definition, the following macros are provided
33 *
34 * PIN_CFG_DEFAULT - default config (0):
35 * pull up/down = disabled
36 * sleep mode = input/wakeup
37 * direction = input
38 * value = low
39 * SLPM direction = same as normal
40 * SLPM pull = same as normal
41 * SLPM value = same as normal
42 *
43 * PIN_CFG - default config with alternate function
44 */
45
46typedef unsigned long pin_cfg_t;
47
48#define PIN_NUM_MASK 0x1ff
49#define PIN_NUM(x) ((x) & PIN_NUM_MASK)
50
51#define PIN_ALT_SHIFT 9
52#define PIN_ALT_MASK (0x3 << PIN_ALT_SHIFT)
53#define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
54#define PIN_GPIO (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
55#define PIN_ALT_A (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
56#define PIN_ALT_B (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
57#define PIN_ALT_C (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
58
59#define PIN_PULL_SHIFT 11
60#define PIN_PULL_MASK (0x3 << PIN_PULL_SHIFT)
61#define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
62#define PIN_PULL_NONE (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
63#define PIN_PULL_UP (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
64#define PIN_PULL_DOWN (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
65
66#define PIN_SLPM_SHIFT 13
67#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT)
68#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
69#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
70#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
71/* These two replace the above in DB8500v2+ */
72#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
73#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
74#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
75
76#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
77#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
78
79#define PIN_DIR_SHIFT 14
80#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
81#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
82#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT)
83#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT)
84
85#define PIN_VAL_SHIFT 15
86#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT)
87#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
88#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT)
89#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT)
90
91#define PIN_SLPM_PULL_SHIFT 16
92#define PIN_SLPM_PULL_MASK (0x7 << PIN_SLPM_PULL_SHIFT)
93#define PIN_SLPM_PULL(x) \
94 (((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
95#define PIN_SLPM_PULL_NONE \
96 ((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
97#define PIN_SLPM_PULL_UP \
98 ((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
99#define PIN_SLPM_PULL_DOWN \
100 ((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
101
102#define PIN_SLPM_DIR_SHIFT 19
103#define PIN_SLPM_DIR_MASK (0x3 << PIN_SLPM_DIR_SHIFT)
104#define PIN_SLPM_DIR(x) \
105 (((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
106#define PIN_SLPM_DIR_INPUT ((1 + 0) << PIN_SLPM_DIR_SHIFT)
107#define PIN_SLPM_DIR_OUTPUT ((1 + 1) << PIN_SLPM_DIR_SHIFT)
108
109#define PIN_SLPM_VAL_SHIFT 21
110#define PIN_SLPM_VAL_MASK (0x3 << PIN_SLPM_VAL_SHIFT)
111#define PIN_SLPM_VAL(x) \
112 (((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
113#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT)
114#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT)
115
116#define PIN_SLPM_PDIS_SHIFT 23
117#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT)
118#define PIN_SLPM_PDIS(x) \
119 (((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
120#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT)
121#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT)
122#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT)
123
124#define PIN_LOWEMI_SHIFT 25
125#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT)
126#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
127#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT)
128#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT)
129
130#define PIN_GPIOMODE_SHIFT 26
131#define PIN_GPIOMODE_MASK (0x1 << PIN_GPIOMODE_SHIFT)
132#define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
133#define PIN_GPIOMODE_DISABLED (0 << PIN_GPIOMODE_SHIFT)
134#define PIN_GPIOMODE_ENABLED (1 << PIN_GPIOMODE_SHIFT)
135
136#define PIN_SLEEPMODE_SHIFT 27
137#define PIN_SLEEPMODE_MASK (0x1 << PIN_SLEEPMODE_SHIFT)
138#define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
139#define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT)
140#define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT)
141
142
143/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */
144#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN)
145#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP)
146#define PIN_INPUT_NOPULL (PIN_DIR_INPUT | PIN_PULL_NONE)
147#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW)
148#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
149
150#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
151#define PIN_SLPM_INPUT_PULLUP (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
152#define PIN_SLPM_INPUT_NOPULL (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
153#define PIN_SLPM_OUTPUT_LOW (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
154#define PIN_SLPM_OUTPUT_HIGH (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
155
156#define PIN_CFG_DEFAULT (0)
157
158#define PIN_CFG(num, alt) \
159 (PIN_CFG_DEFAULT |\
160 (PIN_NUM(num) | PIN_##alt))
161
162#define PIN_CFG_INPUT(num, alt, pull) \
163 (PIN_CFG_DEFAULT |\
164 (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
165
166#define PIN_CFG_OUTPUT(num, alt, val) \
167 (PIN_CFG_DEFAULT |\
168 (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
169
170/*
171 * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
172 * the "gpio" namespace for generic and cross-machine functions
173 */
174
175#define GPIO_BLOCK_SHIFT 5
176#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
177
178/* Register in the logic block */
179#define NMK_GPIO_DAT 0x00
180#define NMK_GPIO_DATS 0x04
181#define NMK_GPIO_DATC 0x08
182#define NMK_GPIO_PDIS 0x0c
183#define NMK_GPIO_DIR 0x10
184#define NMK_GPIO_DIRS 0x14
185#define NMK_GPIO_DIRC 0x18
186#define NMK_GPIO_SLPC 0x1c
187#define NMK_GPIO_AFSLA 0x20
188#define NMK_GPIO_AFSLB 0x24
189#define NMK_GPIO_LOWEMI 0x28
190
191#define NMK_GPIO_RIMSC 0x40
192#define NMK_GPIO_FIMSC 0x44
193#define NMK_GPIO_IS 0x48
194#define NMK_GPIO_IC 0x4c
195#define NMK_GPIO_RWIMSC 0x50
196#define NMK_GPIO_FWIMSC 0x54
197#define NMK_GPIO_WKS 0x58
198/* These appear in DB8540 and later ASICs */
199#define NMK_GPIO_EDGELEVEL 0x5C
200#define NMK_GPIO_LEVEL 0x60
201
202/* Alternate functions: function C is set in hw by setting both A and B */
203#define NMK_GPIO_ALT_GPIO 0
204#define NMK_GPIO_ALT_A 1
205#define NMK_GPIO_ALT_B 2
206#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
207
208#define NMK_GPIO_ALT_CX_SHIFT 2
209#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
210#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
211#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
212#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
213
214/* Pull up/down values */
215enum nmk_gpio_pull {
216 NMK_GPIO_PULL_NONE,
217 NMK_GPIO_PULL_UP,
218 NMK_GPIO_PULL_DOWN,
219};
220
221/* Sleep mode */
222enum nmk_gpio_slpm {
223 NMK_GPIO_SLPM_INPUT,
224 NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
225 NMK_GPIO_SLPM_NOCHANGE,
226 NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
227};
228
229/* Older deprecated pin config API that should go away soon */
230extern int nmk_config_pin(pin_cfg_t cfg, bool sleep);
231extern int nmk_config_pins(pin_cfg_t *cfgs, int num);
232extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num);
233extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode);
234extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull);
235#ifdef CONFIG_PINCTRL_NOMADIK
236extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
237#else
238static inline int nmk_gpio_set_mode(int gpio, int gpio_mode)
239{
240 return -ENODEV;
241}
242#endif
243extern int nmk_gpio_get_mode(int gpio);
244
245extern void nmk_gpio_wakeups_suspend(void);
246extern void nmk_gpio_wakeups_resume(void);
247
248extern void nmk_gpio_clocks_enable(void);
249extern void nmk_gpio_clocks_disable(void);
250
251extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up);
252
253/*
254 * Platform data to register a block: only the initial gpio/irq number.
255 */
256struct nmk_gpio_platform_data {
257 char *name;
258 int first_gpio;
259 int first_irq;
260 int num_gpio;
261 u32 (*get_secondary_status)(unsigned int bank);
262 void (*set_ioforce)(bool enable);
263 bool supports_sleepmode;
264};
265
266#endif /* __PLAT_NOMADIK_GPIO */
diff --git a/include/linux/platform_data/pn544.h b/include/linux/platform_data/pn544.h
new file mode 100644
index 000000000000..713bfd703342
--- /dev/null
+++ b/include/linux/platform_data/pn544.h
@@ -0,0 +1,44 @@
1/*
2 * Driver include for the PN544 NFC chip.
3 *
4 * Copyright (C) Nokia Corporation
5 *
6 * Author: Jari Vanhala <ext-jari.vanhala@nokia.com>
7 * Contact: Matti Aaltoenn <matti.j.aaltonen@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#ifndef _PN544_H_
24#define _PN544_H_
25
26#include <linux/i2c.h>
27
28enum {
29 NFC_GPIO_ENABLE,
30 NFC_GPIO_FW_RESET,
31 NFC_GPIO_IRQ
32};
33
34/* board config */
35struct pn544_nfc_platform_data {
36 int (*request_resources) (struct i2c_client *client);
37 void (*free_resources) (void);
38 void (*enable) (int fw);
39 int (*test) (void);
40 void (*disable) (void);
41 int (*get_gpio)(int type);
42};
43
44#endif /* _PN544_H_ */
diff --git a/include/linux/platform_data/pxa2xx_udc.h b/include/linux/platform_data/pxa2xx_udc.h
new file mode 100644
index 000000000000..c6c5e98b5b82
--- /dev/null
+++ b/include/linux/platform_data/pxa2xx_udc.h
@@ -0,0 +1,27 @@
1/*
2 * This supports machine-specific differences in how the PXA2xx
3 * USB Device Controller (UDC) is wired.
4 *
5 * It is set in linux/arch/arm/mach-pxa/<machine>.c or in
6 * linux/arch/mach-ixp4xx/<machine>.c and used in
7 * the probe routine of linux/drivers/usb/gadget/pxa2xx_udc.c
8 */
9#ifndef PXA2XX_UDC_H
10#define PXA2XX_UDC_H
11
12struct pxa2xx_udc_mach_info {
13 int (*udc_is_connected)(void); /* do we see host? */
14 void (*udc_command)(int cmd);
15#define PXA2XX_UDC_CMD_CONNECT 0 /* let host see us */
16#define PXA2XX_UDC_CMD_DISCONNECT 1 /* so host won't see us */
17
18 /* Boards following the design guidelines in the developer's manual,
19 * with on-chip GPIOs not Lubbock's weird hardware, can have a sane
20 * VBUS IRQ and omit the methods above. Store the GPIO number
21 * here. Note that sometimes the signals go through inverters...
22 */
23 bool gpio_pullup_inverted;
24 int gpio_pullup; /* high == pullup activated */
25};
26
27#endif
diff --git a/include/linux/platform_data/pxa_sdhci.h b/include/linux/platform_data/pxa_sdhci.h
index 59acd987ed34..27d3156d093a 100644
--- a/include/linux/platform_data/pxa_sdhci.h
+++ b/include/linux/platform_data/pxa_sdhci.h
@@ -38,6 +38,7 @@
38 * @max_speed: the maximum speed supported 38 * @max_speed: the maximum speed supported
39 * @host_caps: Standard MMC host capabilities bit field. 39 * @host_caps: Standard MMC host capabilities bit field.
40 * @quirks: quirks of platfrom 40 * @quirks: quirks of platfrom
41 * @quirks2: quirks2 of platfrom
41 * @pm_caps: pm_caps of platfrom 42 * @pm_caps: pm_caps of platfrom
42 */ 43 */
43struct sdhci_pxa_platdata { 44struct sdhci_pxa_platdata {
@@ -48,9 +49,10 @@ struct sdhci_pxa_platdata {
48 unsigned int ext_cd_gpio; 49 unsigned int ext_cd_gpio;
49 bool ext_cd_gpio_invert; 50 bool ext_cd_gpio_invert;
50 unsigned int max_speed; 51 unsigned int max_speed;
51 unsigned int host_caps; 52 u32 host_caps;
52 unsigned int host_caps2; 53 u32 host_caps2;
53 unsigned int quirks; 54 unsigned int quirks;
55 unsigned int quirks2;
54 unsigned int pm_caps; 56 unsigned int pm_caps;
55}; 57};
56 58
diff --git a/include/linux/platform_data/sa11x0-serial.h b/include/linux/platform_data/sa11x0-serial.h
new file mode 100644
index 000000000000..4504d5d592f0
--- /dev/null
+++ b/include/linux/platform_data/sa11x0-serial.h
@@ -0,0 +1,33 @@
1/*
2 * Author: Nicolas Pitre
3 *
4 * Moved and changed lots, Russell King
5 *
6 * Low level machine dependent UART functions.
7 */
8#ifndef SA11X0_SERIAL_H
9#define SA11X0_SERIAL_H
10
11struct uart_port;
12struct uart_info;
13
14/*
15 * This is a temporary structure for registering these
16 * functions; it is intended to be discarded after boot.
17 */
18struct sa1100_port_fns {
19 void (*set_mctrl)(struct uart_port *, u_int);
20 u_int (*get_mctrl)(struct uart_port *);
21 void (*pm)(struct uart_port *, u_int, u_int);
22 int (*set_wake)(struct uart_port *, u_int);
23};
24
25#ifdef CONFIG_SERIAL_SA1100
26void sa1100_register_uart_fns(struct sa1100_port_fns *fns);
27void sa1100_register_uart(int idx, int port);
28#else
29#define sa1100_register_uart_fns(fns) do { } while (0)
30#define sa1100_register_uart(idx,port) do { } while (0)
31#endif
32
33#endif
diff --git a/include/linux/platform_data/serial-omap.h b/include/linux/platform_data/serial-omap.h
new file mode 100644
index 000000000000..ff9b0aab5281
--- /dev/null
+++ b/include/linux/platform_data/serial-omap.h
@@ -0,0 +1,51 @@
1/*
2 * Driver for OMAP-UART controller.
3 * Based on drivers/serial/8250.c
4 *
5 * Copyright (C) 2010 Texas Instruments.
6 *
7 * Authors:
8 * Govindraj R <govindraj.raja@ti.com>
9 * Thara Gopinath <thara@ti.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 */
16
17#ifndef __OMAP_SERIAL_H__
18#define __OMAP_SERIAL_H__
19
20#include <linux/serial_core.h>
21#include <linux/device.h>
22#include <linux/pm_qos.h>
23
24#define DRIVER_NAME "omap_uart"
25
26/*
27 * Use tty device name as ttyO, [O -> OMAP]
28 * in bootargs we specify as console=ttyO0 if uart1
29 * is used as console uart.
30 */
31#define OMAP_SERIAL_NAME "ttyO"
32
33struct omap_uart_port_info {
34 bool dma_enabled; /* To specify DMA Mode */
35 unsigned int uartclk; /* UART clock rate */
36 upf_t flags; /* UPF_* flags */
37 unsigned int dma_rx_buf_size;
38 unsigned int dma_rx_timeout;
39 unsigned int autosuspend_timeout;
40 unsigned int dma_rx_poll_rate;
41 int DTR_gpio;
42 int DTR_inverted;
43 int DTR_present;
44
45 int (*get_context_loss_count)(struct device *);
46 void (*set_forceidle)(struct device *);
47 void (*set_noidle)(struct device *);
48 void (*enable_wakeup)(struct device *, bool);
49};
50
51#endif /* __OMAP_SERIAL_H__ */
diff --git a/include/linux/platform_data/spi-clps711x.h b/include/linux/platform_data/spi-clps711x.h
new file mode 100644
index 000000000000..301956e63143
--- /dev/null
+++ b/include/linux/platform_data/spi-clps711x.h
@@ -0,0 +1,21 @@
1/*
2 * CLPS711X SPI bus driver definitions
3 *
4 * Copyright (C) 2012 Alexander Shiyan <shc_work@mail.ru>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H
13#define ____LINUX_PLATFORM_DATA_SPI_CLPS711X_H
14
15/* Board specific platform_data */
16struct spi_clps711x_pdata {
17 int *chipselect; /* Array of GPIO-numbers */
18 int num_chipselect; /* Total count of GPIOs */
19};
20
21#endif
diff --git a/include/linux/platform_data/spi-omap2-mcspi.h b/include/linux/platform_data/spi-omap2-mcspi.h
index a357eb26bd25..a65572d53211 100644
--- a/include/linux/platform_data/spi-omap2-mcspi.h
+++ b/include/linux/platform_data/spi-omap2-mcspi.h
@@ -7,9 +7,13 @@
7 7
8#define OMAP4_MCSPI_REG_OFFSET 0x100 8#define OMAP4_MCSPI_REG_OFFSET 0x100
9 9
10#define MCSPI_PINDIR_D0_IN_D1_OUT 0
11#define MCSPI_PINDIR_D0_OUT_D1_IN 1
12
10struct omap2_mcspi_platform_config { 13struct omap2_mcspi_platform_config {
11 unsigned short num_cs; 14 unsigned short num_cs;
12 unsigned int regs_offset; 15 unsigned int regs_offset;
16 unsigned int pin_dir:1;
13}; 17};
14 18
15struct omap2_mcspi_dev_attr { 19struct omap2_mcspi_dev_attr {
diff --git a/include/linux/platform_data/ti_am335x_adc.h b/include/linux/platform_data/ti_am335x_adc.h
new file mode 100644
index 000000000000..e41d5834cb84
--- /dev/null
+++ b/include/linux/platform_data/ti_am335x_adc.h
@@ -0,0 +1,14 @@
1#ifndef __LINUX_TI_AM335X_ADC_H
2#define __LINUX_TI_AM335X_ADC_H
3
4/**
5 * struct adc_data ADC Input information
6 * @adc_channels: Number of analog inputs
7 * available for ADC.
8 */
9
10struct adc_data {
11 unsigned int adc_channels;
12};
13
14#endif
diff --git a/include/linux/platform_data/uio_dmem_genirq.h b/include/linux/platform_data/uio_dmem_genirq.h
new file mode 100644
index 000000000000..973c1bb32168
--- /dev/null
+++ b/include/linux/platform_data/uio_dmem_genirq.h
@@ -0,0 +1,26 @@
1/*
2 * include/linux/platform_data/uio_dmem_genirq.h
3 *
4 * Copyright (C) 2012 Damian Hobson-Garcia
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef _UIO_DMEM_GENIRQ_H
17#define _UIO_DMEM_GENIRQ_H
18
19#include <linux/uio_driver.h>
20
21struct uio_dmem_genirq_pdata {
22 struct uio_info uioinfo;
23 unsigned int *dynamic_region_sizes;
24 unsigned int num_dynamic_regions;
25};
26#endif /* _UIO_DMEM_GENIRQ_H */
diff --git a/include/linux/platform_data/uio_pruss.h b/include/linux/platform_data/uio_pruss.h
index f39140aabc6f..3d47d219827f 100644
--- a/include/linux/platform_data/uio_pruss.h
+++ b/include/linux/platform_data/uio_pruss.h
@@ -20,6 +20,7 @@
20 20
21/* To configure the PRUSS INTC base offset for UIO driver */ 21/* To configure the PRUSS INTC base offset for UIO driver */
22struct uio_pruss_pdata { 22struct uio_pruss_pdata {
23 u32 pintc_base; 23 u32 pintc_base;
24 struct gen_pool *sram_pool;
24}; 25};
25#endif /* _UIO_PRUSS_H_ */ 26#endif /* _UIO_PRUSS_H_ */
diff --git a/include/linux/platform_data/usb-omap.h b/include/linux/platform_data/usb-omap.h
new file mode 100644
index 000000000000..ef65b67c56c3
--- /dev/null
+++ b/include/linux/platform_data/usb-omap.h
@@ -0,0 +1,83 @@
1/*
2 * usb-omap.h - Platform data for the various OMAP USB IPs
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * This software is distributed under the terms of the GNU General Public
7 * License ("GPL") version 2, as published by the Free Software Foundation.
8 *
9 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
10 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
11 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
12 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
13 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
14 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
15 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
16 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
17 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
18 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
19 * POSSIBILITY OF SUCH DAMAGE.
20 */
21
22#define OMAP3_HS_USB_PORTS 3
23
24enum usbhs_omap_port_mode {
25 OMAP_USBHS_PORT_MODE_UNUSED,
26 OMAP_EHCI_PORT_MODE_PHY,
27 OMAP_EHCI_PORT_MODE_TLL,
28 OMAP_EHCI_PORT_MODE_HSIC,
29 OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0,
30 OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM,
31 OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0,
32 OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM,
33 OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0,
34 OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM,
35 OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0,
36 OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM,
37 OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0,
38 OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM
39};
40
41struct usbtll_omap_platform_data {
42 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
43};
44
45struct ehci_hcd_omap_platform_data {
46 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
47 int reset_gpio_port[OMAP3_HS_USB_PORTS];
48 struct regulator *regulator[OMAP3_HS_USB_PORTS];
49 unsigned phy_reset:1;
50};
51
52struct ohci_hcd_omap_platform_data {
53 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
54 unsigned es2_compatibility:1;
55};
56
57struct usbhs_omap_platform_data {
58 enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS];
59
60 struct ehci_hcd_omap_platform_data *ehci_data;
61 struct ohci_hcd_omap_platform_data *ohci_data;
62
63 /* OMAP3 <= ES2.1 have a single ulpi bypass control bit */
64 unsigned single_ulpi_bypass:1;
65};
66
67/*-------------------------------------------------------------------------*/
68
69struct omap_musb_board_data {
70 u8 interface_type;
71 u8 mode;
72 u16 power;
73 unsigned extvbus:1;
74 void (*set_phy_power)(u8 on);
75 void (*clear_irq)(void);
76 void (*set_mode)(u8 mode);
77 void (*reset)(void);
78};
79
80enum musb_interface {
81 MUSB_INTERFACE_ULPI,
82 MUSB_INTERFACE_UTMI
83};
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-22 04:53:33 -0500