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-rw-r--r--include/linux/platform_data/atmel.h28
-rw-r--r--include/linux/platform_data/dma-dw.h2
-rw-r--r--include/linux/platform_data/dma-hsu.h4
-rw-r--r--include/linux/platform_data/edma.h104
-rw-r--r--include/linux/platform_data/leds-kirkwood-netxbig.h1
-rw-r--r--include/linux/platform_data/mdio-gpio.h33
-rw-r--r--include/linux/platform_data/mtd-nand-pxa3xx.h27
-rw-r--r--include/linux/platform_data/nfcmrvl.h8
-rw-r--r--include/linux/platform_data/s3c-hsotg.h10
-rw-r--r--include/linux/platform_data/st-nci.h2
10 files changed, 54 insertions, 165 deletions
diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h
index 527a85c61924..3c8825b67298 100644
--- a/include/linux/platform_data/atmel.h
+++ b/include/linux/platform_data/atmel.h
@@ -9,30 +9,7 @@
9 9
10#include <linux/mtd/nand.h> 10#include <linux/mtd/nand.h>
11#include <linux/mtd/partitions.h> 11#include <linux/mtd/partitions.h>
12#include <linux/device.h>
13#include <linux/i2c.h>
14#include <linux/leds.h>
15#include <linux/spi/spi.h>
16#include <linux/usb/atmel_usba_udc.h>
17#include <linux/atmel-mci.h>
18#include <sound/atmel-ac97c.h>
19#include <linux/serial.h> 12#include <linux/serial.h>
20#include <linux/platform_data/macb.h>
21
22/*
23 * at91: 6 USARTs and one DBGU port (SAM9260)
24 * avr32: 4
25 */
26#define ATMEL_MAX_UART 7
27
28 /* USB Device */
29struct at91_udc_data {
30 int vbus_pin; /* high == host powering us */
31 u8 vbus_active_low; /* vbus polarity */
32 u8 vbus_polled; /* Use polling, not interrupt */
33 int pullup_pin; /* active == D+ pulled up */
34 u8 pullup_active_low; /* true == pullup_pin is active low */
35};
36 13
37 /* Compact Flash */ 14 /* Compact Flash */
38struct at91_cf_data { 15struct at91_cf_data {
@@ -74,11 +51,6 @@ struct atmel_uart_data {
74 struct serial_rs485 rs485; /* rs485 settings */ 51 struct serial_rs485 rs485; /* rs485 settings */
75}; 52};
76 53
77/* CAN */
78struct at91_can_data {
79 void (*transceiver_switch)(int on);
80};
81
82/* FIXME: this needs a better location, but gets stuff building again */ 54/* FIXME: this needs a better location, but gets stuff building again */
83extern int at91_suspend_entering_slow_clock(void); 55extern int at91_suspend_entering_slow_clock(void);
84 56
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index 87ac14c584f2..03b6095d3b18 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -37,6 +37,7 @@ struct dw_dma_slave {
37 * @nr_channels: Number of channels supported by hardware (max 8) 37 * @nr_channels: Number of channels supported by hardware (max 8)
38 * @is_private: The device channels should be marked as private and not for 38 * @is_private: The device channels should be marked as private and not for
39 * by the general purpose DMA channel allocator. 39 * by the general purpose DMA channel allocator.
40 * @is_memcpy: The device channels do support memory-to-memory transfers.
40 * @chan_allocation_order: Allocate channels starting from 0 or 7 41 * @chan_allocation_order: Allocate channels starting from 0 or 7
41 * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0. 42 * @chan_priority: Set channel priority increasing from 0 to 7 or 7 to 0.
42 * @block_size: Maximum block size supported by the controller 43 * @block_size: Maximum block size supported by the controller
@@ -47,6 +48,7 @@ struct dw_dma_slave {
47struct dw_dma_platform_data { 48struct dw_dma_platform_data {
48 unsigned int nr_channels; 49 unsigned int nr_channels;
49 bool is_private; 50 bool is_private;
51 bool is_memcpy;
50#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */ 52#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
51#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */ 53#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
52 unsigned char chan_allocation_order; 54 unsigned char chan_allocation_order;
diff --git a/include/linux/platform_data/dma-hsu.h b/include/linux/platform_data/dma-hsu.h
index 8a1f6a4920b2..3453fa655502 100644
--- a/include/linux/platform_data/dma-hsu.h
+++ b/include/linux/platform_data/dma-hsu.h
@@ -18,8 +18,4 @@ struct hsu_dma_slave {
18 int chan_id; 18 int chan_id;
19}; 19};
20 20
21struct hsu_dma_platform_data {
22 unsigned short nr_channels;
23};
24
25#endif /* _PLATFORM_DATA_DMA_HSU_H */ 21#endif /* _PLATFORM_DATA_DMA_HSU_H */
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index bdb2710e2aab..e2878baeb90e 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -41,51 +41,6 @@
41#ifndef EDMA_H_ 41#ifndef EDMA_H_
42#define EDMA_H_ 42#define EDMA_H_
43 43
44/* PaRAM slots are laid out like this */
45struct edmacc_param {
46 u32 opt;
47 u32 src;
48 u32 a_b_cnt;
49 u32 dst;
50 u32 src_dst_bidx;
51 u32 link_bcntrld;
52 u32 src_dst_cidx;
53 u32 ccnt;
54} __packed;
55
56/* fields in edmacc_param.opt */
57#define SAM BIT(0)
58#define DAM BIT(1)
59#define SYNCDIM BIT(2)
60#define STATIC BIT(3)
61#define EDMA_FWID (0x07 << 8)
62#define TCCMODE BIT(11)
63#define EDMA_TCC(t) ((t) << 12)
64#define TCINTEN BIT(20)
65#define ITCINTEN BIT(21)
66#define TCCHEN BIT(22)
67#define ITCCHEN BIT(23)
68
69/*ch_status paramater of callback function possible values*/
70#define EDMA_DMA_COMPLETE 1
71#define EDMA_DMA_CC_ERROR 2
72#define EDMA_DMA_TC1_ERROR 3
73#define EDMA_DMA_TC2_ERROR 4
74
75enum address_mode {
76 INCR = 0,
77 FIFO = 1
78};
79
80enum fifo_width {
81 W8BIT = 0,
82 W16BIT = 1,
83 W32BIT = 2,
84 W64BIT = 3,
85 W128BIT = 4,
86 W256BIT = 5
87};
88
89enum dma_event_q { 44enum dma_event_q {
90 EVENTQ_0 = 0, 45 EVENTQ_0 = 0,
91 EVENTQ_1 = 1, 46 EVENTQ_1 = 1,
@@ -94,64 +49,10 @@ enum dma_event_q {
94 EVENTQ_DEFAULT = -1 49 EVENTQ_DEFAULT = -1
95}; 50};
96 51
97enum sync_dimension {
98 ASYNC = 0,
99 ABSYNC = 1
100};
101
102#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan)) 52#define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
103#define EDMA_CTLR(i) ((i) >> 16) 53#define EDMA_CTLR(i) ((i) >> 16)
104#define EDMA_CHAN_SLOT(i) ((i) & 0xffff) 54#define EDMA_CHAN_SLOT(i) ((i) & 0xffff)
105 55
106#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
107#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
108#define EDMA_CONT_PARAMS_ANY 1001
109#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
110#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
111
112#define EDMA_MAX_CC 2
113
114/* alloc/free DMA channels and their dedicated parameter RAM slots */
115int edma_alloc_channel(int channel,
116 void (*callback)(unsigned channel, u16 ch_status, void *data),
117 void *data, enum dma_event_q);
118void edma_free_channel(unsigned channel);
119
120/* alloc/free parameter RAM slots */
121int edma_alloc_slot(unsigned ctlr, int slot);
122void edma_free_slot(unsigned slot);
123
124/* alloc/free a set of contiguous parameter RAM slots */
125int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
126int edma_free_cont_slots(unsigned slot, int count);
127
128/* calls that operate on part of a parameter RAM slot */
129void edma_set_src(unsigned slot, dma_addr_t src_port,
130 enum address_mode mode, enum fifo_width);
131void edma_set_dest(unsigned slot, dma_addr_t dest_port,
132 enum address_mode mode, enum fifo_width);
133dma_addr_t edma_get_position(unsigned slot, bool dst);
134void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
135void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
136void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
137 u16 bcnt_rld, enum sync_dimension sync_mode);
138void edma_link(unsigned from, unsigned to);
139void edma_unlink(unsigned from);
140
141/* calls that operate on an entire parameter RAM slot */
142void edma_write_slot(unsigned slot, const struct edmacc_param *params);
143void edma_read_slot(unsigned slot, struct edmacc_param *params);
144
145/* channel control operations */
146int edma_start(unsigned channel);
147void edma_stop(unsigned channel);
148void edma_clean_channel(unsigned channel);
149void edma_clear_event(unsigned channel);
150void edma_pause(unsigned channel);
151void edma_resume(unsigned channel);
152
153void edma_assign_channel_eventq(unsigned channel, enum dma_event_q eventq_no);
154
155struct edma_rsv_info { 56struct edma_rsv_info {
156 57
157 const s16 (*rsv_chans)[2]; 58 const s16 (*rsv_chans)[2];
@@ -170,10 +71,11 @@ struct edma_soc_info {
170 /* Resource reservation for other cores */ 71 /* Resource reservation for other cores */
171 struct edma_rsv_info *rsv; 72 struct edma_rsv_info *rsv;
172 73
74 /* List of channels allocated for memcpy, terminated with -1 */
75 s16 *memcpy_channels;
76
173 s8 (*queue_priority_mapping)[2]; 77 s8 (*queue_priority_mapping)[2];
174 const s16 (*xbar_chans)[2]; 78 const s16 (*xbar_chans)[2];
175}; 79};
176 80
177int edma_trigger_channel(unsigned);
178
179#endif 81#endif
diff --git a/include/linux/platform_data/leds-kirkwood-netxbig.h b/include/linux/platform_data/leds-kirkwood-netxbig.h
index d2be19a51acd..3c85a735c380 100644
--- a/include/linux/platform_data/leds-kirkwood-netxbig.h
+++ b/include/linux/platform_data/leds-kirkwood-netxbig.h
@@ -40,6 +40,7 @@ struct netxbig_led {
40 int mode_addr; 40 int mode_addr;
41 int *mode_val; 41 int *mode_val;
42 int bright_addr; 42 int bright_addr;
43 int bright_max;
43}; 44};
44 45
45struct netxbig_led_platform_data { 46struct netxbig_led_platform_data {
diff --git a/include/linux/platform_data/mdio-gpio.h b/include/linux/platform_data/mdio-gpio.h
new file mode 100644
index 000000000000..11f00cdabe3d
--- /dev/null
+++ b/include/linux/platform_data/mdio-gpio.h
@@ -0,0 +1,33 @@
1/*
2 * MDIO-GPIO bus platform data structures
3 *
4 * Copyright (C) 2008, Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11#ifndef __LINUX_MDIO_GPIO_H
12#define __LINUX_MDIO_GPIO_H
13
14#include <linux/mdio-bitbang.h>
15
16struct mdio_gpio_platform_data {
17 /* GPIO numbers for bus pins */
18 unsigned int mdc;
19 unsigned int mdio;
20 unsigned int mdo;
21
22 bool mdc_active_low;
23 bool mdio_active_low;
24 bool mdo_active_low;
25
26 u32 phy_mask;
27 u32 phy_ignore_ta_mask;
28 int irqs[PHY_MAX_ADDR];
29 /* reset callback */
30 int (*reset)(struct mii_bus *bus);
31};
32
33#endif /* __LINUX_MDIO_GPIO_H */
diff --git a/include/linux/platform_data/mtd-nand-pxa3xx.h b/include/linux/platform_data/mtd-nand-pxa3xx.h
index ac4ea2e641c7..394d15597dc7 100644
--- a/include/linux/platform_data/mtd-nand-pxa3xx.h
+++ b/include/linux/platform_data/mtd-nand-pxa3xx.h
@@ -4,30 +4,6 @@
4#include <linux/mtd/mtd.h> 4#include <linux/mtd/mtd.h>
5#include <linux/mtd/partitions.h> 5#include <linux/mtd/partitions.h>
6 6
7struct pxa3xx_nand_timing {
8 unsigned int tCH; /* Enable signal hold time */
9 unsigned int tCS; /* Enable signal setup time */
10 unsigned int tWH; /* ND_nWE high duration */
11 unsigned int tWP; /* ND_nWE pulse time */
12 unsigned int tRH; /* ND_nRE high duration */
13 unsigned int tRP; /* ND_nRE pulse width */
14 unsigned int tR; /* ND_nWE high to ND_nRE low for read */
15 unsigned int tWHR; /* ND_nWE high to ND_nRE low for status read */
16 unsigned int tAR; /* ND_ALE low to ND_nRE low delay */
17};
18
19struct pxa3xx_nand_flash {
20 char *name;
21 uint32_t chip_id;
22 unsigned int page_per_block; /* Pages per block (PG_PER_BLK) */
23 unsigned int page_size; /* Page size in bytes (PAGE_SZ) */
24 unsigned int flash_width; /* Width of Flash memory (DWIDTH_M) */
25 unsigned int dfc_width; /* Width of flash controller(DWIDTH_C) */
26 unsigned int num_blocks; /* Number of physical blocks in Flash */
27
28 struct pxa3xx_nand_timing *timing; /* NAND Flash timing */
29};
30
31/* 7/*
32 * Current pxa3xx_nand controller has two chip select which 8 * Current pxa3xx_nand controller has two chip select which
33 * both be workable. 9 * both be workable.
@@ -63,9 +39,6 @@ struct pxa3xx_nand_platform_data {
63 39
64 const struct mtd_partition *parts[NUM_CHIP_SELECT]; 40 const struct mtd_partition *parts[NUM_CHIP_SELECT];
65 unsigned int nr_parts[NUM_CHIP_SELECT]; 41 unsigned int nr_parts[NUM_CHIP_SELECT];
66
67 const struct pxa3xx_nand_flash * flash;
68 size_t num_flash;
69}; 42};
70 43
71extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info); 44extern void pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info);
diff --git a/include/linux/platform_data/nfcmrvl.h b/include/linux/platform_data/nfcmrvl.h
index ac91707dabcb..a6f9d633f5be 100644
--- a/include/linux/platform_data/nfcmrvl.h
+++ b/include/linux/platform_data/nfcmrvl.h
@@ -35,6 +35,14 @@ struct nfcmrvl_platform_data {
35 unsigned int flow_control; 35 unsigned int flow_control;
36 /* Tell if firmware supports break control for power management */ 36 /* Tell if firmware supports break control for power management */
37 unsigned int break_control; 37 unsigned int break_control;
38
39
40 /*
41 * I2C specific
42 */
43
44 unsigned int irq;
45 unsigned int irq_polarity;
38}; 46};
39 47
40#endif /* _NFCMRVL_PTF_H_ */ 48#endif /* _NFCMRVL_PTF_H_ */
diff --git a/include/linux/platform_data/s3c-hsotg.h b/include/linux/platform_data/s3c-hsotg.h
index 3f1cbf95ec3b..3982586ba6df 100644
--- a/include/linux/platform_data/s3c-hsotg.h
+++ b/include/linux/platform_data/s3c-hsotg.h
@@ -17,19 +17,19 @@
17 17
18struct platform_device; 18struct platform_device;
19 19
20enum s3c_hsotg_dmamode { 20enum dwc2_hsotg_dmamode {
21 S3C_HSOTG_DMA_NONE, /* do not use DMA at-all */ 21 S3C_HSOTG_DMA_NONE, /* do not use DMA at-all */
22 S3C_HSOTG_DMA_ONLY, /* always use DMA */ 22 S3C_HSOTG_DMA_ONLY, /* always use DMA */
23 S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */ 23 S3C_HSOTG_DMA_DRV, /* DMA is chosen by driver */
24}; 24};
25 25
26/** 26/**
27 * struct s3c_hsotg_plat - platform data for high-speed otg/udc 27 * struct dwc2_hsotg_plat - platform data for high-speed otg/udc
28 * @dma: Whether to use DMA or not. 28 * @dma: Whether to use DMA or not.
29 * @is_osc: The clock source is an oscillator, not a crystal 29 * @is_osc: The clock source is an oscillator, not a crystal
30 */ 30 */
31struct s3c_hsotg_plat { 31struct dwc2_hsotg_plat {
32 enum s3c_hsotg_dmamode dma; 32 enum dwc2_hsotg_dmamode dma;
33 unsigned int is_osc:1; 33 unsigned int is_osc:1;
34 int phy_type; 34 int phy_type;
35 35
@@ -37,6 +37,6 @@ struct s3c_hsotg_plat {
37 int (*phy_exit)(struct platform_device *pdev, int type); 37 int (*phy_exit)(struct platform_device *pdev, int type);
38}; 38};
39 39
40extern void s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd); 40extern void dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd);
41 41
42#endif /* __LINUX_USB_S3C_HSOTG_H */ 42#endif /* __LINUX_USB_S3C_HSOTG_H */
diff --git a/include/linux/platform_data/st-nci.h b/include/linux/platform_data/st-nci.h
index d9d400a297bd..f6494b347c06 100644
--- a/include/linux/platform_data/st-nci.h
+++ b/include/linux/platform_data/st-nci.h
@@ -24,6 +24,8 @@
24struct st_nci_nfc_platform_data { 24struct st_nci_nfc_platform_data {
25 unsigned int gpio_reset; 25 unsigned int gpio_reset;
26 unsigned int irq_polarity; 26 unsigned int irq_polarity;
27 bool is_ese_present;
28 bool is_uicc_present;
27}; 29};
28 30
29#endif /* _ST_NCI_H_ */ 31#endif /* _ST_NCI_H_ */