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-rw-r--r--include/linux/mmc/card.h2
-rw-r--r--include/linux/mmc/core.h1
-rw-r--r--include/linux/mmc/host.h6
-rw-r--r--include/linux/mmc/sdio_ids.h1
4 files changed, 10 insertions, 0 deletions
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index 279b39008a33..de7377815b6b 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -156,6 +156,7 @@ struct sd_switch_caps {
156#define UHS_DDR50_MAX_DTR 50000000 156#define UHS_DDR50_MAX_DTR 50000000
157#define UHS_SDR25_MAX_DTR UHS_DDR50_MAX_DTR 157#define UHS_SDR25_MAX_DTR UHS_DDR50_MAX_DTR
158#define UHS_SDR12_MAX_DTR 25000000 158#define UHS_SDR12_MAX_DTR 25000000
159#define DEFAULT_SPEED_MAX_DTR UHS_SDR12_MAX_DTR
159 unsigned int sd3_bus_mode; 160 unsigned int sd3_bus_mode;
160#define UHS_SDR12_BUS_SPEED 0 161#define UHS_SDR12_BUS_SPEED 0
161#define HIGH_SPEED_BUS_SPEED 1 162#define HIGH_SPEED_BUS_SPEED 1
@@ -252,6 +253,7 @@ struct mmc_card {
252#define MMC_TYPE_SD_COMBO 3 /* SD combo (IO+mem) card */ 253#define MMC_TYPE_SD_COMBO 3 /* SD combo (IO+mem) card */
253 unsigned int state; /* (our) card state */ 254 unsigned int state; /* (our) card state */
254 unsigned int quirks; /* card quirks */ 255 unsigned int quirks; /* card quirks */
256 unsigned int quirk_max_rate; /* max rate set by quirks */
255#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */ 257#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
256#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */ 258#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
257 /* for byte mode */ 259 /* for byte mode */
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 927519385482..134a6483347a 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -177,6 +177,7 @@ int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd,
177 int retries); 177 int retries);
178 178
179int mmc_hw_reset(struct mmc_host *host); 179int mmc_hw_reset(struct mmc_host *host);
180int mmc_sw_reset(struct mmc_host *host);
180void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card); 181void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card);
181 182
182#endif /* LINUX_MMC_CORE_H */ 183#endif /* LINUX_MMC_CORE_H */
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index 85146235231e..64300a48dcce 100644
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -22,6 +22,7 @@
22struct mmc_ios { 22struct mmc_ios {
23 unsigned int clock; /* clock rate */ 23 unsigned int clock; /* clock rate */
24 unsigned short vdd; 24 unsigned short vdd;
25 unsigned int power_delay_ms; /* waiting for stable power */
25 26
26/* vdd stores the bit number of the selected voltage range from below. */ 27/* vdd stores the bit number of the selected voltage range from below. */
27 28
@@ -320,6 +321,9 @@ struct mmc_host {
320#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */ 321#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
321#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */ 322#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
322#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */ 323#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
324#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
325 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
326 MMC_CAP_UHS_DDR50)
323/* (1 << 21) is free for reuse */ 327/* (1 << 21) is free for reuse */
324#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 328#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
325#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 329#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
@@ -345,6 +349,7 @@ struct mmc_host {
345#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */ 349#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
346#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \ 350#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
347 MMC_CAP2_HS400_1_2V) 351 MMC_CAP2_HS400_1_2V)
352#define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
348#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V) 353#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
349#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17) 354#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
350#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */ 355#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
@@ -354,6 +359,7 @@ struct mmc_host {
354#define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */ 359#define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
355#define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */ 360#define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
356#define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */ 361#define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
362#define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
357 363
358 int fixed_drv_type; /* fixed driver type for non-removable media */ 364 int fixed_drv_type; /* fixed driver type for non-removable media */
359 365
diff --git a/include/linux/mmc/sdio_ids.h b/include/linux/mmc/sdio_ids.h
index cdd66a5fbd5e..2836a96e014a 100644
--- a/include/linux/mmc/sdio_ids.h
+++ b/include/linux/mmc/sdio_ids.h
@@ -55,6 +55,7 @@
55#define SDIO_DEVICE_ID_MARVELL_8688WLAN 0x9104 55#define SDIO_DEVICE_ID_MARVELL_8688WLAN 0x9104
56#define SDIO_DEVICE_ID_MARVELL_8688BT 0x9105 56#define SDIO_DEVICE_ID_MARVELL_8688BT 0x9105
57#define SDIO_DEVICE_ID_MARVELL_8797_F0 0x9128 57#define SDIO_DEVICE_ID_MARVELL_8797_F0 0x9128
58#define SDIO_DEVICE_ID_MARVELL_8887WLAN 0x9134
58 59
59#define SDIO_VENDOR_ID_SIANO 0x039a 60#define SDIO_VENDOR_ID_SIANO 0x039a
60#define SDIO_DEVICE_ID_SIANO_NOVA_B0 0x0201 61#define SDIO_DEVICE_ID_SIANO_NOVA_B0 0x0201