diff options
Diffstat (limited to 'include/linux/mfd')
| -rw-r--r-- | include/linux/mfd/da9063/pdata.h | 60 | ||||
| -rw-r--r-- | include/linux/mfd/intel_soc_pmic_mrfld.h | 81 | ||||
| -rw-r--r-- | include/linux/mfd/mt6397/core.h | 11 |
3 files changed, 92 insertions, 60 deletions
diff --git a/include/linux/mfd/da9063/pdata.h b/include/linux/mfd/da9063/pdata.h deleted file mode 100644 index 085edbf7601b..000000000000 --- a/include/linux/mfd/da9063/pdata.h +++ /dev/null | |||
| @@ -1,60 +0,0 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ | ||
| 2 | /* | ||
| 3 | * Platform configuration options for DA9063 | ||
| 4 | * | ||
| 5 | * Copyright 2012 Dialog Semiconductor Ltd. | ||
| 6 | * | ||
| 7 | * Author: Michal Hajduk, Dialog Semiconductor | ||
| 8 | * Author: Krystian Garbaciak, Dialog Semiconductor | ||
| 9 | */ | ||
| 10 | |||
| 11 | #ifndef __MFD_DA9063_PDATA_H__ | ||
| 12 | #define __MFD_DA9063_PDATA_H__ | ||
| 13 | |||
| 14 | /* | ||
| 15 | * RGB LED configuration | ||
| 16 | */ | ||
| 17 | /* LED IDs for flags in struct led_info. */ | ||
| 18 | enum { | ||
| 19 | DA9063_GPIO11_LED, | ||
| 20 | DA9063_GPIO14_LED, | ||
| 21 | DA9063_GPIO15_LED, | ||
| 22 | |||
| 23 | DA9063_LED_NUM | ||
| 24 | }; | ||
| 25 | #define DA9063_LED_ID_MASK 0x3 | ||
| 26 | |||
| 27 | /* LED polarity for flags in struct led_info. */ | ||
| 28 | #define DA9063_LED_HIGH_LEVEL_ACTIVE 0x0 | ||
| 29 | #define DA9063_LED_LOW_LEVEL_ACTIVE 0x4 | ||
| 30 | |||
| 31 | |||
| 32 | /* | ||
| 33 | * General PMIC configuration | ||
| 34 | */ | ||
| 35 | /* HWMON ADC channels configuration */ | ||
| 36 | #define DA9063_FLG_FORCE_IN0_MANUAL_MODE 0x0010 | ||
| 37 | #define DA9063_FLG_FORCE_IN0_AUTO_MODE 0x0020 | ||
| 38 | #define DA9063_FLG_FORCE_IN1_MANUAL_MODE 0x0040 | ||
| 39 | #define DA9063_FLG_FORCE_IN1_AUTO_MODE 0x0080 | ||
| 40 | #define DA9063_FLG_FORCE_IN2_MANUAL_MODE 0x0100 | ||
| 41 | #define DA9063_FLG_FORCE_IN2_AUTO_MODE 0x0200 | ||
| 42 | #define DA9063_FLG_FORCE_IN3_MANUAL_MODE 0x0400 | ||
| 43 | #define DA9063_FLG_FORCE_IN3_AUTO_MODE 0x0800 | ||
| 44 | |||
| 45 | /* Disable register caching. */ | ||
| 46 | #define DA9063_FLG_NO_CACHE 0x0008 | ||
| 47 | |||
| 48 | struct da9063; | ||
| 49 | |||
| 50 | /* DA9063 platform data */ | ||
| 51 | struct da9063_pdata { | ||
| 52 | int (*init)(struct da9063 *da9063); | ||
| 53 | int irq_base; | ||
| 54 | bool key_power; | ||
| 55 | unsigned flags; | ||
| 56 | struct da9063_regulators_pdata *regulators_pdata; | ||
| 57 | struct led_platform_data *leds_pdata; | ||
| 58 | }; | ||
| 59 | |||
| 60 | #endif /* __MFD_DA9063_PDATA_H__ */ | ||
diff --git a/include/linux/mfd/intel_soc_pmic_mrfld.h b/include/linux/mfd/intel_soc_pmic_mrfld.h new file mode 100644 index 000000000000..4daecd682275 --- /dev/null +++ b/include/linux/mfd/intel_soc_pmic_mrfld.h | |||
| @@ -0,0 +1,81 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | /* | ||
| 3 | * Header file for Intel Merrifield Basin Cove PMIC | ||
| 4 | * | ||
| 5 | * Copyright (C) 2019 Intel Corporation. All rights reserved. | ||
| 6 | */ | ||
| 7 | |||
| 8 | #ifndef __INTEL_SOC_PMIC_MRFLD_H__ | ||
| 9 | #define __INTEL_SOC_PMIC_MRFLD_H__ | ||
| 10 | |||
| 11 | #include <linux/bits.h> | ||
| 12 | |||
| 13 | #define BCOVE_ID 0x00 | ||
| 14 | |||
| 15 | #define BCOVE_ID_MINREV0 GENMASK(2, 0) | ||
| 16 | #define BCOVE_ID_MAJREV0 GENMASK(5, 3) | ||
| 17 | #define BCOVE_ID_VENDID0 GENMASK(7, 6) | ||
| 18 | |||
| 19 | #define BCOVE_MINOR(x) (unsigned int)(((x) & BCOVE_ID_MINREV0) >> 0) | ||
| 20 | #define BCOVE_MAJOR(x) (unsigned int)(((x) & BCOVE_ID_MAJREV0) >> 3) | ||
| 21 | #define BCOVE_VENDOR(x) (unsigned int)(((x) & BCOVE_ID_VENDID0) >> 6) | ||
| 22 | |||
| 23 | #define BCOVE_IRQLVL1 0x01 | ||
| 24 | |||
| 25 | #define BCOVE_PBIRQ 0x02 | ||
| 26 | #define BCOVE_TMUIRQ 0x03 | ||
| 27 | #define BCOVE_THRMIRQ 0x04 | ||
| 28 | #define BCOVE_BCUIRQ 0x05 | ||
| 29 | #define BCOVE_ADCIRQ 0x06 | ||
| 30 | #define BCOVE_CHGRIRQ0 0x07 | ||
| 31 | #define BCOVE_CHGRIRQ1 0x08 | ||
| 32 | #define BCOVE_GPIOIRQ 0x09 | ||
| 33 | #define BCOVE_CRITIRQ 0x0B | ||
| 34 | |||
| 35 | #define BCOVE_MIRQLVL1 0x0C | ||
| 36 | |||
| 37 | #define BCOVE_MPBIRQ 0x0D | ||
| 38 | #define BCOVE_MTMUIRQ 0x0E | ||
| 39 | #define BCOVE_MTHRMIRQ 0x0F | ||
| 40 | #define BCOVE_MBCUIRQ 0x10 | ||
| 41 | #define BCOVE_MADCIRQ 0x11 | ||
| 42 | #define BCOVE_MCHGRIRQ0 0x12 | ||
| 43 | #define BCOVE_MCHGRIRQ1 0x13 | ||
| 44 | #define BCOVE_MGPIOIRQ 0x14 | ||
| 45 | #define BCOVE_MCRITIRQ 0x16 | ||
| 46 | |||
| 47 | #define BCOVE_SCHGRIRQ0 0x4E | ||
| 48 | #define BCOVE_SCHGRIRQ1 0x4F | ||
| 49 | |||
| 50 | /* Level 1 IRQs */ | ||
| 51 | #define BCOVE_LVL1_PWRBTN BIT(0) /* power button */ | ||
| 52 | #define BCOVE_LVL1_TMU BIT(1) /* time management unit */ | ||
| 53 | #define BCOVE_LVL1_THRM BIT(2) /* thermal */ | ||
| 54 | #define BCOVE_LVL1_BCU BIT(3) /* burst control unit */ | ||
| 55 | #define BCOVE_LVL1_ADC BIT(4) /* ADC */ | ||
| 56 | #define BCOVE_LVL1_CHGR BIT(5) /* charger */ | ||
| 57 | #define BCOVE_LVL1_GPIO BIT(6) /* GPIO */ | ||
| 58 | #define BCOVE_LVL1_CRIT BIT(7) /* critical event */ | ||
| 59 | |||
| 60 | /* Level 2 IRQs: power button */ | ||
| 61 | #define BCOVE_PBIRQ_PBTN BIT(0) | ||
| 62 | #define BCOVE_PBIRQ_UBTN BIT(1) | ||
| 63 | |||
| 64 | /* Level 2 IRQs: ADC */ | ||
| 65 | #define BCOVE_ADCIRQ_BATTEMP BIT(2) | ||
| 66 | #define BCOVE_ADCIRQ_SYSTEMP BIT(3) | ||
| 67 | #define BCOVE_ADCIRQ_BATTID BIT(4) | ||
| 68 | #define BCOVE_ADCIRQ_VIBATT BIT(5) | ||
| 69 | #define BCOVE_ADCIRQ_CCTICK BIT(7) | ||
| 70 | |||
| 71 | /* Level 2 IRQs: charger */ | ||
| 72 | #define BCOVE_CHGRIRQ_BAT0ALRT BIT(4) | ||
| 73 | #define BCOVE_CHGRIRQ_BAT1ALRT BIT(5) | ||
| 74 | #define BCOVE_CHGRIRQ_BATCRIT BIT(6) | ||
| 75 | |||
| 76 | #define BCOVE_CHGRIRQ_VBUSDET BIT(0) | ||
| 77 | #define BCOVE_CHGRIRQ_DCDET BIT(1) | ||
| 78 | #define BCOVE_CHGRIRQ_BATTDET BIT(2) | ||
| 79 | #define BCOVE_CHGRIRQ_USBIDDET BIT(3) | ||
| 80 | |||
| 81 | #endif /* __INTEL_SOC_PMIC_MRFLD_H__ */ | ||
diff --git a/include/linux/mfd/mt6397/core.h b/include/linux/mfd/mt6397/core.h index 25a95e72179b..fc88d315bdde 100644 --- a/include/linux/mfd/mt6397/core.h +++ b/include/linux/mfd/mt6397/core.h | |||
| @@ -7,6 +7,14 @@ | |||
| 7 | #ifndef __MFD_MT6397_CORE_H__ | 7 | #ifndef __MFD_MT6397_CORE_H__ |
| 8 | #define __MFD_MT6397_CORE_H__ | 8 | #define __MFD_MT6397_CORE_H__ |
| 9 | 9 | ||
| 10 | #include <linux/mutex.h> | ||
| 11 | |||
| 12 | enum chip_id { | ||
| 13 | MT6323_CHIP_ID = 0x23, | ||
| 14 | MT6391_CHIP_ID = 0x91, | ||
| 15 | MT6397_CHIP_ID = 0x97, | ||
| 16 | }; | ||
| 17 | |||
| 10 | enum mt6397_irq_numbers { | 18 | enum mt6397_irq_numbers { |
| 11 | MT6397_IRQ_SPKL_AB = 0, | 19 | MT6397_IRQ_SPKL_AB = 0, |
| 12 | MT6397_IRQ_SPKR_AB, | 20 | MT6397_IRQ_SPKR_AB, |
| @@ -54,6 +62,9 @@ struct mt6397_chip { | |||
| 54 | u16 irq_masks_cache[2]; | 62 | u16 irq_masks_cache[2]; |
| 55 | u16 int_con[2]; | 63 | u16 int_con[2]; |
| 56 | u16 int_status[2]; | 64 | u16 int_status[2]; |
| 65 | u16 chip_id; | ||
| 57 | }; | 66 | }; |
| 58 | 67 | ||
| 68 | int mt6397_irq_init(struct mt6397_chip *chip); | ||
| 69 | |||
| 59 | #endif /* __MFD_MT6397_CORE_H__ */ | 70 | #endif /* __MFD_MT6397_CORE_H__ */ |
