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-rw-r--r--include/linux/brcmphy.h29
1 files changed, 10 insertions, 19 deletions
diff --git a/include/linux/brcmphy.h b/include/linux/brcmphy.h
index 697ca7795bd9..59f4a7304419 100644
--- a/include/linux/brcmphy.h
+++ b/include/linux/brcmphy.h
@@ -30,6 +30,8 @@
30#define PHY_ID_BCM7439_2 0xae025080 30#define PHY_ID_BCM7439_2 0xae025080
31#define PHY_ID_BCM7445 0x600d8510 31#define PHY_ID_BCM7445 0x600d8510
32 32
33#define PHY_ID_BCM_CYGNUS 0xae025200
34
33#define PHY_BCM_OUI_MASK 0xfffffc00 35#define PHY_BCM_OUI_MASK 0xfffffc00
34#define PHY_BCM_OUI_1 0x00206000 36#define PHY_BCM_OUI_1 0x00206000
35#define PHY_BCM_OUI_2 0x0143bc00 37#define PHY_BCM_OUI_2 0x0143bc00
@@ -138,7 +140,10 @@
138 140
139/* 01010: Auto Power-Down */ 141/* 01010: Auto Power-Down */
140#define BCM54XX_SHD_APD 0x0a 142#define BCM54XX_SHD_APD 0x0a
143#define BCM_APD_CLR_MASK 0xFE9F /* clear bits 5, 6 & 8 */
141#define BCM54XX_SHD_APD_EN 0x0020 144#define BCM54XX_SHD_APD_EN 0x0020
145#define BCM_NO_ANEG_APD_EN 0x0060 /* bits 5 & 6 */
146#define BCM_APD_SINGLELP_EN 0x0100 /* Bit 8 */
142 147
143#define BCM5482_SHD_LEDS1 0x0d /* 01101: LED Selector 1 */ 148#define BCM5482_SHD_LEDS1 0x0d /* 01101: LED Selector 1 */
144 /* LED3 / ~LINKSPD[2] selector */ 149 /* LED3 / ~LINKSPD[2] selector */
@@ -209,27 +214,13 @@
209#define MII_BRCM_FET_SHDW_AUXSTAT2 0x1b /* Auxiliary status 2 */ 214#define MII_BRCM_FET_SHDW_AUXSTAT2 0x1b /* Auxiliary status 2 */
210#define MII_BRCM_FET_SHDW_AS2_APDE 0x0020 /* Auto power down enable */ 215#define MII_BRCM_FET_SHDW_AS2_APDE 0x0020 /* Auto power down enable */
211 216
212/*
213 * Indirect register access functions for the 1000BASE-T/100BASE-TX/10BASE-T
214 * 0x1c shadow registers.
215 */
216static inline int bcm54xx_shadow_read(struct phy_device *phydev, u16 shadow)
217{
218 phy_write(phydev, MII_BCM54XX_SHD, MII_BCM54XX_SHD_VAL(shadow));
219 return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD));
220}
221
222static inline int bcm54xx_shadow_write(struct phy_device *phydev, u16 shadow,
223 u16 val)
224{
225 return phy_write(phydev, MII_BCM54XX_SHD,
226 MII_BCM54XX_SHD_WRITE |
227 MII_BCM54XX_SHD_VAL(shadow) |
228 MII_BCM54XX_SHD_DATA(val));
229}
230
231#define BRCM_CL45VEN_EEE_CONTROL 0x803d 217#define BRCM_CL45VEN_EEE_CONTROL 0x803d
232#define LPI_FEATURE_EN 0x8000 218#define LPI_FEATURE_EN 0x8000
233#define LPI_FEATURE_EN_DIG1000X 0x4000 219#define LPI_FEATURE_EN_DIG1000X 0x4000
234 220
221/* Core register definitions*/
222#define MII_BRCM_CORE_BASE1E 0x1E
223#define MII_BRCM_CORE_EXPB0 0xB0
224#define MII_BRCM_CORE_EXPB1 0xB1
225
235#endif /* _LINUX_BRCMPHY_H */ 226#endif /* _LINUX_BRCMPHY_H */